^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * UHCI HCD (Host Controller Driver) for GRLIB GRUSBHC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2011 Jan Andersson <jan@gaisler.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is based on UHCI PCI HCD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (C) Copyright 1999 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * (C) Copyright 1999 Randy Dunlap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * (C) Copyright 1999 Georg Acher, acher@in.tum.de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int uhci_grlib_init(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct uhci_hcd *uhci = hcd_to_uhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Probe to determine the endianness of the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * We know that bit 7 of the PORTSC1 register is always set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * and bit 15 is always clear. If uhci_readw() yields a value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * with bit 7 (0x80) turned on then the current little-endian
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * setting is correct. Otherwise we assume the value was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * byte-swapped; hence the register interface and presumably
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * also the descriptors are big-endian.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (!(uhci_readw(uhci, USBPORTSC1) & 0x80)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) uhci->big_endian_mmio = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) uhci->big_endian_desc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) uhci->rh_numports = uhci_count_ports(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Set up pointers to to generic functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) uhci->reset_hc = uhci_generic_reset_hc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* No special actions need to be taken for the functions below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) uhci->configure_hc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) uhci->resume_detect_interrupts_are_broken = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) uhci->global_suspend_mode_is_broken = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Reset if the controller isn't already safely quiescent. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) check_and_reset_hc(uhci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static const struct hc_driver uhci_grlib_hc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .description = hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .product_desc = "GRLIB GRUSBHC UHCI Host Controller",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .hcd_priv_size = sizeof(struct uhci_hcd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Generic hardware linkage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .irq = uhci_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .flags = HCD_MEMORY | HCD_DMA | HCD_USB11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Basic lifecycle operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .reset = uhci_grlib_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .start = uhci_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .pci_suspend = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .pci_resume = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .bus_suspend = uhci_rh_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .bus_resume = uhci_rh_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .stop = uhci_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .urb_enqueue = uhci_urb_enqueue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .urb_dequeue = uhci_urb_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .endpoint_disable = uhci_hcd_endpoint_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .get_frame_number = uhci_hcd_get_frame_number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .hub_status_data = uhci_hub_status_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .hub_control = uhci_hub_control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int uhci_hcd_grlib_probe(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct device_node *dn = op->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct uhci_hcd *uhci = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) dev_dbg(&op->dev, "initializing GRUSBHC UHCI USB Controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) rv = of_address_to_resource(dn, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (rv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* usb_create_hcd requires dma_mask != NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) op->dev.dma_mask = &op->dev.coherent_dma_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) hcd = usb_create_hcd(&uhci_grlib_hc_driver, &op->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) "GRUSBHC UHCI USB");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (!hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) hcd->rsrc_start = res.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) hcd->rsrc_len = resource_size(&res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) irq = irq_of_parse_and_map(dn, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (irq == NO_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) rv = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) goto err_usb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) hcd->regs = devm_ioremap_resource(&op->dev, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (IS_ERR(hcd->regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) rv = PTR_ERR(hcd->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) uhci = hcd_to_uhci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) uhci->regs = hcd->regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) rv = usb_add_hcd(hcd, irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (rv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) device_wakeup_enable(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) irq_dispose_mapping(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) err_usb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static int uhci_hcd_grlib_remove(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct usb_hcd *hcd = platform_get_drvdata(op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_dbg(&op->dev, "stopping GRLIB GRUSBHC UHCI USB Controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) irq_dispose_mapping(hcd->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* Make sure the controller is quiescent and that we're not using it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * any more. This is mainly for the benefit of programs which, like kexec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * expect the hardware to be idle: not doing DMA or generating IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * This routine may be called in a damaged or failing kernel. Hence we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * do not acquire the spinlock before shutting down the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static void uhci_hcd_grlib_shutdown(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct usb_hcd *hcd = platform_get_drvdata(op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) uhci_hc_died(hcd_to_uhci(hcd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const struct of_device_id uhci_hcd_grlib_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { .name = "GAISLER_UHCI", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { .name = "01_027", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MODULE_DEVICE_TABLE(of, uhci_hcd_grlib_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static struct platform_driver uhci_grlib_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .probe = uhci_hcd_grlib_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .remove = uhci_hcd_grlib_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .shutdown = uhci_hcd_grlib_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .name = "grlib-uhci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .of_match_table = uhci_hcd_grlib_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };