^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-1.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OHCI HCD (Host Controller Driver) for USB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * [ Initialisation is based on Linus' ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * [ uhci code and gregs ohci fragments ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * [ (C) Copyright 1999 Linus Torvalds ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * [ (C) Copyright 1999 Gregory P. Smith]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * PCI Bus Glue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This file is licenced under the GPL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/usb/hcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "ohci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "pci-quirks.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DRIVER_DESC "OHCI PCI platform driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const char hcd_name[] = "ohci-pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int broken_suspend(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) device_init_wakeup(&hcd->self.root_hub->dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* AMD 756, for most chips (early revs), corrupts register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * values on read ... so enable the vendor workaround.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int ohci_quirk_amd756(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ohci->flags = OHCI_QUIRK_AMD756;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* also erratum 10 (suspend/resume issues) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return broken_suspend(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Apple's OHCI driver has a lot of bizarre workarounds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * for this chip. Evidently control and bulk lists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * can get confused. (B&W G3 models, and ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int ohci_quirk_opti(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Check for NSC87560. We have to look at the bridge (fn1) to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * identify the USB (fn2). This quirk might apply to more or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * even all NSC stuff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int ohci_quirk_ns(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct pci_dev *b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) && b->vendor == PCI_VENDOR_ID_NS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ohci->flags |= OHCI_QUIRK_SUPERIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ohci_dbg (ohci, "Using NSC SuperIO setup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pci_dev_put(b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Check for Compaq's ZFMicro chipset, which needs short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * delays before control or bulk queues get re-activated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * in finish_unlinks()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ohci->flags |= OHCI_QUIRK_ZFMICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* Check for Toshiba SCC OHCI which has big endian registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * and little endian in memory data structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* That chip is only present in the southbridge of some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * cell based platforms which are supposed to select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * that was the case though.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ohci->flags |= OHCI_QUIRK_BE_MMIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* Check for NEC chip and apply quirk for allegedly lost interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void ohci_quirk_nec_worker(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) status = ohci_restart(ohci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (status != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) "ohci_restart", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int ohci_quirk_nec(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ohci->flags |= OHCI_QUIRK_NEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int ohci_quirk_amd700(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct ohci_hcd *ohci = hcd_to_ohci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (usb_amd_quirk_pll_check())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ohci->flags |= OHCI_QUIRK_AMD_PLL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* SB800 needs pre-fetch fix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (usb_amd_prefetch_quirk()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int ohci_quirk_qemu(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct ohci_hcd *ohci = hcd_to_ohci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ohci->flags |= OHCI_QUIRK_QEMU;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ohci_dbg(ohci, "enabled qemu quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* List of quirks for OHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const struct pci_device_id ohci_pci_quirks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .driver_data = (unsigned long)ohci_quirk_amd756,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .driver_data = (unsigned long)ohci_quirk_opti,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .driver_data = (unsigned long)ohci_quirk_ns,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .driver_data = (unsigned long)ohci_quirk_zfmicro,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .driver_data = (unsigned long)ohci_quirk_nec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* Toshiba portege 4000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .vendor = PCI_VENDOR_ID_AL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .device = 0x5237,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .subvendor = PCI_VENDOR_ID_TOSHIBA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .subdevice = 0x0004,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .driver_data = (unsigned long) broken_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .driver_data = (unsigned long) broken_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .driver_data = (unsigned long)ohci_quirk_amd700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .driver_data = (unsigned long)ohci_quirk_amd700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .driver_data = (unsigned long)ohci_quirk_amd700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .vendor = PCI_VENDOR_ID_APPLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .device = 0x003f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .subdevice = PCI_SUBDEVICE_ID_QEMU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .driver_data = (unsigned long)ohci_quirk_qemu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int ohci_pci_reset (struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct ohci_hcd *ohci = hcd_to_ohci (hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (hcd->self.controller) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) const struct pci_device_id *quirk_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) quirk_id = pci_match_id(ohci_pci_quirks, pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (quirk_id != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int (*quirk)(struct usb_hcd *ohci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) quirk = (void *)quirk_id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ret = quirk(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ret = ohci_setup(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * After ohci setup RWC may not be set for add-in PCI cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * This transfers PCI PM wakeup capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (device_can_wakeup(&pdev->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ohci->hc_control |= OHCI_CTRL_RWC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static struct hc_driver __read_mostly ohci_pci_hc_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static const struct ohci_driver_overrides pci_overrides __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .product_desc = "OHCI PCI host controller",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .reset = ohci_pci_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static const struct pci_device_id pci_ids[] = { {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* handle any USB OHCI controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* The device in the ConneXT I/O hub has no class reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }, { /* end: all zeroes */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MODULE_DEVICE_TABLE (pci, pci_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static int ohci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return usb_hcd_pci_probe(dev, id, &ohci_pci_hc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* pci driver glue; this is a "new style" PCI driver module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static struct pci_driver ohci_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .name = hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .id_table = pci_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .probe = ohci_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .remove = usb_hcd_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .shutdown = usb_hcd_pci_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .pm = &usb_hcd_pci_pm_ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static int __init ohci_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) pr_info("%s: " DRIVER_DESC "\n", hcd_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* Entries for the PCI suspend/resume callbacks are special */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ohci_pci_hc_driver.pci_suspend = ohci_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ohci_pci_hc_driver.pci_resume = ohci_resume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return pci_register_driver(&ohci_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) module_init(ohci_pci_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static void __exit ohci_pci_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) pci_unregister_driver(&ohci_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) module_exit(ohci_pci_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MODULE_SOFTDEP("pre: ehci_pci");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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