^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-1.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OHCI HCD (Host Controller Driver) for USB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (C) Copyright 2000-2005 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (C) Copyright 2002 Hewlett-Packard Company
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * OMAP Bus Glue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Modified for OMAP by Tony Lindgren <tony@atomide.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This file is licenced under the GPL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/usb/otg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/usb/hcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "ohci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <mach/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* OMAP-1510 OHCI has its own MMU for DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define OMAP1510_LB_CLOCK_DIV 0xfffec10c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define OMAP1510_LB_MMU_CTL 0xfffec208
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define OMAP1510_LB_MMU_LCK 0xfffec224
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define OMAP1510_LB_MMU_LD_TLB 0xfffec228
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define OMAP1510_LB_MMU_CAM_H 0xfffec22c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define OMAP1510_LB_MMU_CAM_L 0xfffec230
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define OMAP1510_LB_MMU_RAM_H 0xfffec234
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define OMAP1510_LB_MMU_RAM_L 0xfffec238
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DRIVER_DESC "OHCI OMAP driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct ohci_omap_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct clk *usb_host_ck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct clk *usb_dc_ck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct gpio_desc *power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct gpio_desc *overcurrent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static const char hcd_name[] = "ohci-omap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static struct hc_driver __read_mostly ohci_omap_hc_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define hcd_to_ohci_omap_priv(h) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ((struct ohci_omap_priv *)hcd_to_ohci(h)->priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) clk_enable(priv->usb_dc_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) clk_enable(priv->usb_host_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* guesstimate for T5 == 1x 32K clock + APLL lock time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) clk_disable(priv->usb_host_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) clk_disable(priv->usb_dc_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * Board specific gang-switched transceiver power on/off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * NOTE: OSK supplies power from DC, not battery.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int omap_ohci_transceiver_power(struct ohci_omap_priv *priv, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (machine_is_omap_innovator() && cpu_is_omap1510())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) INNOVATOR_FPGA_CAM_USB_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) else if (priv->power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) gpiod_set_value_cansleep(priv->power, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (machine_is_omap_innovator() && cpu_is_omap1510())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) INNOVATOR_FPGA_CAM_USB_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) else if (priv->power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) gpiod_set_value_cansleep(priv->power, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #ifdef CONFIG_ARCH_OMAP15XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * OMAP-1510 specific Local Bus clock on/off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int omap_1510_local_bus_power(int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) omap_writel(0, OMAP1510_LB_MMU_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * OMAP-1510 specific Local Bus initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * See also arch/mach-omap/memory.h for __virt_to_dma() and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * __dma_to_virt() which need to match with the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * Local Bus address below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int omap_1510_local_bus_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int tlb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned long lbaddr, physaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) OMAP1510_LB_CLOCK_DIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Configure the Local Bus MMU table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) physaddr = tlb * 0x00100000 + PHYS_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) OMAP1510_LB_MMU_CAM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Enable the walking table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define omap_1510_local_bus_power(x) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define omap_1510_local_bus_init() {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void start_hnp(struct ohci_hcd *ohci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct usb_hcd *hcd = ohci_to_hcd(ohci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) const unsigned port = hcd->self.otg_port - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) otg_start_hnp(hcd->usb_phy->otg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) hcd->usb_phy->otg->state = OTG_STATE_A_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) l = omap_readl(OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) l &= ~OTG_A_BUSREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) omap_writel(l, OTG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int ohci_omap_reset(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct ohci_hcd *ohci = hcd_to_ohci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct omap_usb_config *config = dev_get_platdata(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int need_transceiver = (config->otg != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) dev_dbg(hcd->self.controller, "starting USB Controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (config->otg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) hcd->self.otg_port = config->otg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* default/minimum OTG power budget: 8 mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) hcd->power_budget = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* boards can use OTG transceivers in non-OTG modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) need_transceiver = need_transceiver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) || machine_is_omap_h2() || machine_is_omap_h3();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* XXX OMAP16xx only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (config->ocpi_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) config->ocpi_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (need_transceiver) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int status = otg_set_host(hcd->usb_phy->otg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) &ohci_to_hcd(ohci)->self);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) dev_dbg(hcd->self.controller, "init %s phy, status %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) hcd->usb_phy->label, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) usb_put_phy(hcd->usb_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) hcd->skip_phy_initialization = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ohci->start_hnp = start_hnp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) omap_ohci_clock_power(priv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) omap_1510_local_bus_power(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) omap_1510_local_bus_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ret = ohci_setup(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (config->otg || config->rwc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ohci->hc_control = OHCI_CTRL_RWC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) writel(OHCI_CTRL_RWC, &ohci->regs->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* board-specific power switching and overcurrent support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (machine_is_omap_osk() || machine_is_omap_innovator()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u32 rh = roothub_a (ohci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* power switching (ganged by default) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) rh &= ~RH_A_NPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* TPS2045 switch for internal transceiver (port 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (machine_is_omap_osk()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ohci_to_hcd(ohci)->power_budget = 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) rh &= ~RH_A_NOCP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /* gpio9 for overcurrent detction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) omap_cfg_reg(W8_1610_GPIO9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* for paranoia's sake: disable USB.PUEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) omap_cfg_reg(W4_USB_HIGHZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ohci_writel(ohci, rh, &ohci->regs->roothub.a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) } else if (machine_is_nokia770()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* We require a self-powered hub, which should have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * plenty of power. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ohci_to_hcd(ohci)->power_budget = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* FIXME hub_wq hub requests should manage power switching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) omap_ohci_transceiver_power(priv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* board init will have already handled HMC and mux setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * any external transceiver should already be initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * too, so all configured ports use the right signaling now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * ohci_hcd_omap_probe - initialize OMAP-based HCDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * Context: !in_interrupt()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * Allocates basic resources for this USB host controller, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * then invokes the start() method for the HCD associated with it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * through the hotplug entry's driver_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static int ohci_hcd_omap_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int retval, irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct usb_hcd *hcd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct ohci_omap_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (pdev->num_resources != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dev_err(&pdev->dev, "invalid num_resources: %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) pdev->num_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (pdev->resource[0].flags != IORESOURCE_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) || pdev->resource[1].flags != IORESOURCE_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev_err(&pdev->dev, "invalid resource type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) hcd = usb_create_hcd(&ohci_omap_hc_driver, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dev_name(&pdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (!hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) hcd->rsrc_start = pdev->resource[0].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) priv = hcd_to_ohci_omap_priv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* Obtain two optional GPIO lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) priv->power = devm_gpiod_get_optional(&pdev->dev, "power", GPIOD_ASIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (IS_ERR(priv->power)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) retval = PTR_ERR(priv->power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (priv->power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) gpiod_set_consumer_name(priv->power, "OHCI power");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * This "overcurrent" GPIO line isn't really used in the code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * but has a designated hardware function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * TODO: implement proper overcurrent handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) priv->overcurrent = devm_gpiod_get_optional(&pdev->dev, "overcurrent",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (IS_ERR(priv->overcurrent)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) retval = PTR_ERR(priv->overcurrent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (priv->overcurrent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) gpiod_set_consumer_name(priv->overcurrent, "OHCI overcurrent");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) priv->usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (IS_ERR(priv->usb_host_ck)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) retval = PTR_ERR(priv->usb_host_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (!cpu_is_omap15xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) priv->usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) priv->usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (IS_ERR(priv->usb_dc_ck)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) retval = PTR_ERR(priv->usb_dc_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) goto err_put_host_ck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) dev_dbg(&pdev->dev, "request_mem_region failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) retval = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) goto err_put_dc_ck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (!hcd->regs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) retval = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) goto err3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) retval = usb_add_hcd(hcd, irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) goto err3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) device_wakeup_enable(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) err3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) iounmap(hcd->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) err_put_dc_ck:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) clk_put(priv->usb_dc_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) err_put_host_ck:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) clk_put(priv->usb_host_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) err_put_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* may be called with controller, bus, and devices active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * ohci_hcd_omap_remove - shutdown processing for OMAP-based HCDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * @dev: USB Host Controller being removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * Context: !in_interrupt()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * Reverses the effect of ohci_hcd_omap_probe(), first invoking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * the HCD's stop() method. It is always called from a thread
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * context, normally "rmmod", "apmd", or something similar.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static int ohci_hcd_omap_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct usb_hcd *hcd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) dev_dbg(hcd->self.controller, "stopping USB Controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) omap_ohci_clock_power(priv, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) (void) otg_set_host(hcd->usb_phy->otg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) usb_put_phy(hcd->usb_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) iounmap(hcd->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) clk_put(priv->usb_dc_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) clk_put(priv->usb_host_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static int ohci_omap_suspend(struct platform_device *pdev, pm_message_t message)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct usb_hcd *hcd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) struct ohci_hcd *ohci = hcd_to_ohci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) bool do_wakeup = device_may_wakeup(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (time_before(jiffies, ohci->next_statechange))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) ohci->next_statechange = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ret = ohci_suspend(hcd, do_wakeup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) omap_ohci_clock_power(priv, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static int ohci_omap_resume(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct usb_hcd *hcd = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct ohci_hcd *ohci = hcd_to_ohci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (time_before(jiffies, ohci->next_statechange))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) ohci->next_statechange = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) omap_ohci_clock_power(priv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ohci_resume(hcd, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * Driver definition to register with the OMAP bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static struct platform_driver ohci_hcd_omap_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .probe = ohci_hcd_omap_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .remove = ohci_hcd_omap_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .shutdown = usb_hcd_platform_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .suspend = ohci_omap_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .resume = ohci_omap_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .name = "ohci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static const struct ohci_driver_overrides omap_overrides __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .product_desc = "OMAP OHCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .reset = ohci_omap_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .extra_priv_size = sizeof(struct ohci_omap_priv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static int __init ohci_omap_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) pr_info("%s: " DRIVER_DESC "\n", hcd_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) ohci_init_driver(&ohci_omap_hc_driver, &omap_overrides);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return platform_driver_register(&ohci_hcd_omap_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) module_init(ohci_omap_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static void __exit ohci_omap_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) platform_driver_unregister(&ohci_hcd_omap_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) module_exit(ohci_omap_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) MODULE_ALIAS("platform:ohci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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