^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-1.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OHCI HCD (Host Controller Driver) for USB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is licenced under the GPL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * OHCI deals with three types of memory:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * - data used only by the HCD ... kmalloc is fine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * - async and periodic schedules, shared by HC and HCD ... these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * need to use dma_pool or dma_alloc_coherent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * - driver buffers, read/written by HC ... the hcd glue or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * device driver provides us with dma addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * There's also "register" data, which is memory mapped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * No memory seen by this driver (or any HCD) may be paged out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static void ohci_hcd_init (struct ohci_hcd *ohci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ohci->next_statechange = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) spin_lock_init (&ohci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) INIT_LIST_HEAD (&ohci->pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) INIT_LIST_HEAD(&ohci->eds_in_use);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int ohci_mem_init (struct ohci_hcd *ohci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * HCs with local memory allocate from localmem_pool so there's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * no need to create the below dma pools.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (ohci_to_hcd(ohci)->localmem_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ohci->td_cache = dma_pool_create ("ohci_td",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ohci_to_hcd(ohci)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) sizeof (struct td),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 32 /* byte alignment */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 0 /* no page-crossing issues */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (!ohci->td_cache)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ohci->ed_cache = dma_pool_create ("ohci_ed",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ohci_to_hcd(ohci)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sizeof (struct ed),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 16 /* byte alignment */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 0 /* no page-crossing issues */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (!ohci->ed_cache) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) dma_pool_destroy (ohci->td_cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static void ohci_mem_cleanup (struct ohci_hcd *ohci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dma_pool_destroy(ohci->td_cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ohci->td_cache = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) dma_pool_destroy(ohci->ed_cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ohci->ed_cache = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* ohci "done list" processing needs this mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static inline struct td *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct td *td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) td_dma &= TD_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) td = hc->td_hash [TD_HASH_FUNC(td_dma)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) while (td && td->td_dma != td_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) td = td->td_hash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* TDs ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static struct td *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) td_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct td *td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct usb_hcd *hcd = ohci_to_hcd(hc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (hcd->localmem_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) td = gen_pool_dma_zalloc_align(hcd->localmem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) sizeof(*td), &dma, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) td = dma_pool_zalloc(hc->td_cache, mem_flags, &dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (td) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* in case hc fetches it, make it look dead */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) td->hwNextTD = cpu_to_hc32 (hc, dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) td->td_dma = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* hashed in td_fill */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) td_free (struct ohci_hcd *hc, struct td *td)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct td **prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct usb_hcd *hcd = ohci_to_hcd(hc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) while (*prev && *prev != td)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) prev = &(*prev)->td_hash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (*prev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *prev = td->td_hash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ohci_dbg (hc, "no hash for td %p\n", td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (hcd->localmem_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) gen_pool_free(hcd->localmem_pool, (unsigned long)td,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) sizeof(*td));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dma_pool_free(hc->td_cache, td, td->td_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* EDs ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct ed *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct ed *ed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct usb_hcd *hcd = ohci_to_hcd(hc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (hcd->localmem_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ed = gen_pool_dma_zalloc_align(hcd->localmem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) sizeof(*ed), &dma, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ed = dma_pool_zalloc(hc->ed_cache, mem_flags, &dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (ed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) INIT_LIST_HEAD (&ed->td_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ed->dma = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return ed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ed_free (struct ohci_hcd *hc, struct ed *ed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct usb_hcd *hcd = ohci_to_hcd(hc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (hcd->localmem_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) gen_pool_free(hcd->localmem_pool, (unsigned long)ed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) sizeof(*ed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) dma_pool_free(hc->ed_cache, ed, ed->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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