^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ISP116x HCD (Host Controller Driver) for USB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Derived from the SL811 HCD, rewritten for ISP116x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Portions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2004 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Periodic scheduling is based on Roman's OHCI code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright (C) 1999 Roman Weissgaerber
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * The driver basically works. A number of people have used it with a range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * of devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * The driver passes all usbtests 1-14.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Suspending/resuming of root hub via sysfs works. Remote wakeup works too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * And suspending/resuming of platform device works too. Suspend/resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * via HCD operations vector is not implemented.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Iso transfer support is not implemented. Adding this would include
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * implementing recovery from the failure to service the processed ITL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * fifo ram in time, which will involve chip reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) + More testing of suspend/resume.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ISP116x chips require certain delays between accesses to its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) registers. The following timing options exist.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 1. Configure your memory controller (the best)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 2. Implement platform-specific delay function possibly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) combined with configuring the memory controller; see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) include/linux/usb-isp116x.h for more info. Some broken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) memory controllers line LH7A400 SMC need this. Also,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) uncomment for that to work the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) USE_PLATFORM_DELAY macro.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 3. Use ndelay (easiest, poorest). For that, uncomment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) the following USE_NDELAY macro.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define USE_PLATFORM_DELAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) //#define USE_NDELAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) //#define DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) //#define VERBOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Transfer descriptors. See dump_ptd() for printout format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) //#define PTD_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* enqueuing/finishing log of urbs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) //#define URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include <linux/usb/isp116x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include <linux/usb/hcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #include "isp116x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define DRIVER_VERSION "03 Nov 2005"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define DRIVER_DESC "ISP116x USB Host Controller Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const char hcd_name[] = "isp116x-hcd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*-----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) Write len bytes to fifo, pad till 32-bit boundary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u8 *dp = (u8 *) buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u16 *dp2 = (u16 *) buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u16 w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int quot = len % 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* buffer is already in 'usb data order', which is LE. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* When reading buffer as u16, we have to take care byte order */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* doesn't get mixed up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if ((unsigned long)dp2 & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* not aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) for (; len > 1; len -= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) w = *dp++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) w |= *dp++ << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) isp116x_raw_write_data16(isp116x, w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) isp116x_write_data16(isp116x, (u16) * dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) for (; len > 1; len -= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* Keep byte order ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) isp116x_raw_write_data16(isp116x, cpu_to_le16(*dp2++));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (quot == 1 || quot == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) isp116x_raw_write_data16(isp116x, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) Read len bytes from fifo and then read till 32-bit boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) u8 *dp = (u8 *) buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u16 *dp2 = (u16 *) buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u16 w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int quot = len % 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* buffer is already in 'usb data order', which is LE. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* When reading buffer as u16, we have to take care byte order */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* doesn't get mixed up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if ((unsigned long)dp2 & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* not aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) for (; len > 1; len -= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) w = isp116x_raw_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) *dp++ = w & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) *dp++ = (w >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) *dp = 0xff & isp116x_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) for (; len > 1; len -= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Keep byte order! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) *dp2++ = le16_to_cpu(isp116x_raw_read_data16(isp116x));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (quot == 1 || quot == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) isp116x_raw_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) Write ptd's and data for scheduled transfers into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) the fifo ram. Fifo must be empty and ready.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static void pack_fifo(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct isp116x_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct ptd *ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int buflen = isp116x->atl_last_dir == PTD_DIR_IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ? isp116x->atl_bufshrt : isp116x->atl_buflen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) for (ep = isp116x->atl_active; ep; ep = ep->active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ptd = &ep->ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dump_ptd(ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) dump_ptd_out_data(ptd, ep->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) isp116x_write_data16(isp116x, ptd->count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) isp116x_write_data16(isp116x, ptd->mps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) isp116x_write_data16(isp116x, ptd->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) isp116x_write_data16(isp116x, ptd->faddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) buflen -= sizeof(struct ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* Skip writing data for last IN PTD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) write_ptddata_to_fifo(isp116x, ep->data, ep->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) buflen -= ALIGN(ep->length, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) BUG_ON(buflen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) Read the processed ptd's and data from fifo ram back to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) URBs' buffers. Fifo must be full and done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static void unpack_fifo(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct isp116x_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct ptd *ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int buflen = isp116x->atl_last_dir == PTD_DIR_IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ? isp116x->atl_buflen : isp116x->atl_bufshrt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) isp116x_write_addr(isp116x, HCATLPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) for (ep = isp116x->atl_active; ep; ep = ep->active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ptd = &ep->ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ptd->count = isp116x_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ptd->mps = isp116x_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ptd->len = isp116x_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ptd->faddr = isp116x_read_data16(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) buflen -= sizeof(struct ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /* Skip reading data for last Setup or Out PTD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) read_ptddata_from_fifo(isp116x, ep->data, ep->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) buflen -= ALIGN(ep->length, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) dump_ptd(ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) dump_ptd_in_data(ptd, ep->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) BUG_ON(buflen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /*---------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) Set up PTD's.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static void preproc_atl_queue(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct isp116x_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct ptd *ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u16 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) for (ep = isp116x->atl_active; ep; ep = ep->active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u16 toggle = 0, dir = PTD_DIR_SETUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) BUG_ON(list_empty(&ep->hep->urb_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) urb = container_of(ep->hep->urb_list.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct urb, urb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ptd = &ep->ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) len = ep->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ep->data = (unsigned char *)urb->transfer_buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) + urb->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) switch (ep->nextpid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) case USB_PID_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dir = PTD_DIR_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) case USB_PID_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) dir = PTD_DIR_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) case USB_PID_SETUP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) len = sizeof(struct usb_ctrlrequest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ep->data = urb->setup_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) case USB_PID_ACK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) toggle = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dir = (urb->transfer_buffer_length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) && usb_pipein(urb->pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) ? PTD_DIR_OUT : PTD_DIR_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ERR("%s %d: ep->nextpid %d\n", __func__, __LINE__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ep->nextpid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ptd->mps = PTD_MPS(ep->maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) | PTD_SPD(urb->dev->speed == USB_SPEED_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) | PTD_EP(ep->epnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ptd->len = PTD_LEN(len) | PTD_DIR(dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (!ep->active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ptd->mps |= PTD_LAST_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) isp116x->atl_last_dir = dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) Take done or failed requests out of schedule. Give back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) processed urbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct urb *urb, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) __releases(isp116x->lock) __acquires(isp116x->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ep->error_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (usb_pipecontrol(urb->pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ep->nextpid = USB_PID_SETUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) urb_dbg(urb, "Finish");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) usb_hcd_unlink_urb_from_ep(isp116x_to_hcd(isp116x), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) spin_unlock(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) usb_hcd_giveback_urb(isp116x_to_hcd(isp116x), urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) spin_lock(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /* take idle endpoints out of the schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (!list_empty(&ep->hep->urb_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* async deschedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (!list_empty(&ep->schedule)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) list_del_init(&ep->schedule);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* periodic deschedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct isp116x_ep *temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct isp116x_ep **prev = &isp116x->periodic[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) while (*prev && ((temp = *prev) != ep))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) prev = &temp->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (*prev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) *prev = ep->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) isp116x->load[i] -= ep->load;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ep->branch = PERIODIC_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) isp116x_to_hcd(isp116x)->self.bandwidth_allocated -=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ep->load / ep->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* switch irq type? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (!--isp116x->periodic_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) isp116x->irqenb &= ~HCuPINT_SOF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) isp116x->irqenb |= HCuPINT_ATL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) Analyze transfer results, handle partial transfers and errors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static void postproc_atl_queue(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct isp116x_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) struct usb_device *udev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct ptd *ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) int short_not_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) u8 cc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) for (ep = isp116x->atl_active; ep; ep = ep->active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) BUG_ON(list_empty(&ep->hep->urb_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) urb =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) container_of(ep->hep->urb_list.next, struct urb, urb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) udev = urb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ptd = &ep->ptd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) cc = PTD_GET_CC(ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) short_not_ok = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* Data underrun is special. For allowed underrun
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) we clear the error and continue as normal. For
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) forbidden underrun we finish the DATA stage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) immediately while for control transfer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) we do a STATUS stage. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (cc == TD_DATAUNDERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (!(urb->transfer_flags & URB_SHORT_NOT_OK) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) usb_pipecontrol(urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) DBG("Allowed or control data underrun\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) cc = TD_CC_NOERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) short_not_ok = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ep->error_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) usb_settoggle(udev, ep->epnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ep->nextpid == USB_PID_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) PTD_GET_TOGGLE(ptd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) urb->actual_length += PTD_GET_COUNT(ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) status = cc_to_error[TD_DATAUNDERRUN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) && (++ep->error_count >= 3 || cc == TD_CC_STALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) || cc == TD_DATAOVERRUN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) status = cc_to_error[cc];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (ep->nextpid == USB_PID_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) ep->nextpid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* According to usb spec, zero-length Int transfer signals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) finishing of the urb. Hey, does this apply only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) for IN endpoints? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* Relax after previously failed, but later succeeded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) or correctly NAK'ed retransmission attempt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (ep->error_count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ep->error_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /* Take into account idiosyncracies of the isp116x chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) regarding toggle bit for failed transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (ep->nextpid == USB_PID_OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) ^ (ep->error_count > 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) else if (ep->nextpid == USB_PID_IN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ^ (ep->error_count > 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) switch (ep->nextpid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) case USB_PID_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) case USB_PID_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) urb->actual_length += PTD_GET_COUNT(ptd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (PTD_GET_ACTIVE(ptd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) || (cc != TD_CC_NOERROR && cc < 0x0E))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (urb->transfer_buffer_length != urb->actual_length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (short_not_ok)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (urb->transfer_flags & URB_ZERO_PACKET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) && ep->nextpid == USB_PID_OUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) DBG("Zero packet requested\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /* All data for this URB is transferred, let's finish */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (usb_pipecontrol(urb->pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ep->nextpid = USB_PID_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) case USB_PID_SETUP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (PTD_GET_ACTIVE(ptd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) || (cc != TD_CC_NOERROR && cc < 0x0E))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (urb->transfer_buffer_length == urb->actual_length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ep->nextpid = USB_PID_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) else if (usb_pipeout(urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) usb_settoggle(udev, 0, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ep->nextpid = USB_PID_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) usb_settoggle(udev, 0, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ep->nextpid = USB_PID_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case USB_PID_ACK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (PTD_GET_ACTIVE(ptd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) || (cc != TD_CC_NOERROR && cc < 0x0E))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ep->nextpid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (status != -EINPROGRESS || urb->unlinked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) finish_request(isp116x, ep, urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) Scan transfer lists, schedule transfers, send data off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) to chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static void start_atl_transfers(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct isp116x_ep *last_ep = NULL, *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) u16 load = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) int len, index, speed, byte_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (atomic_read(&isp116x->atl_finishing))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* FIFO not empty? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) isp116x->atl_active = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) isp116x->atl_buflen = isp116x->atl_bufshrt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* Schedule int transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (isp116x->periodic_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) isp116x->fmindex = index =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) load = isp116x->load[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (load) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* Bring all int transfers for this frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) into the active queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) isp116x->atl_active = last_ep =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) isp116x->periodic[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) while (last_ep->next)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) last_ep = (last_ep->active = last_ep->next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) last_ep->active = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* Schedule control/bulk transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) list_for_each_entry(ep, &isp116x->async, schedule) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) urb = container_of(ep->hep->urb_list.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) struct urb, urb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) speed = urb->dev->speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) byte_time = speed == USB_SPEED_LOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (ep->nextpid == USB_PID_SETUP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) len = sizeof(struct usb_ctrlrequest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) } else if (ep->nextpid == USB_PID_ACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) /* Find current free length ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) len = (MAX_LOAD_LIMIT - load) / byte_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /* ... then limit it to configured max size ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) len = min(len, speed == USB_SPEED_LOW ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) MAX_TRANSFER_SIZE_LOWSPEED :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) MAX_TRANSFER_SIZE_FULLSPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /* ... and finally cut to the multiple of MaxPacketSize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) or to the real length if there's enough room. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (len <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) (urb->transfer_buffer_length -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) urb->actual_length)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) len -= len % ep->maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (!len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) len = urb->transfer_buffer_length -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) urb->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) BUG_ON(len < 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) load += len * byte_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (load > MAX_LOAD_LIMIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ep->active = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) ep->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (last_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) last_ep->active = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) isp116x->atl_active = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) last_ep = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* Avoid starving of endpoints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if ((&isp116x->async)->next != (&isp116x->async)->prev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) list_move(&isp116x->async, (&isp116x->async)->next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (isp116x->atl_active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) preproc_atl_queue(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) pack_fifo(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) Finish the processed transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static void finish_atl_transfers(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (!isp116x->atl_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* Fifo not ready? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) atomic_inc(&isp116x->atl_finishing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) unpack_fifo(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) postproc_atl_queue(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) atomic_dec(&isp116x->atl_finishing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static irqreturn_t isp116x_irq(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u16 irqstat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) irqreturn_t ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) spin_lock(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) isp116x_write_reg16(isp116x, HCuPINTENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) irqstat = isp116x_read_reg16(isp116x, HCuPINT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) isp116x_write_reg16(isp116x, HCuPINT, irqstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) finish_atl_transfers(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (irqstat & HCuPINT_OPR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (intstat & HCINT_UE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ERR("Unrecoverable error, HC is dead!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) /* IRQ's are off, we do no DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) perfectly ready to die ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) hcd->state = HC_STATE_HALT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) usb_hc_died(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (intstat & HCINT_RHSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* When root hub or any of its ports is going
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) to come out of suspend, it may take more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) than 10ms for status bits to stabilize. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) mod_timer(&hcd->rh_timer, jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) + msecs_to_jiffies(20) + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (intstat & HCINT_RD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) DBG("---- remote wakeup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) usb_hcd_resume_root_hub(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) irqstat &= ~HCuPINT_OPR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) start_atl_transfers(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) spin_unlock(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) /*-----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* usb 1.1 says max 90% of a frame is available for periodic transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) * this driver doesn't promise that much since it's got to handle an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) * IRQ per packet; irq handling latencies also use up that time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) /* out of 1000 us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) #define MAX_PERIODIC_LOAD 600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) static int balance(struct isp116x *isp116x, u16 period, u16 load)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) int i, branch = -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* search for the least loaded schedule branch of that period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) which has enough bandwidth left unreserved. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) for (i = 0; i < period; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) for (j = i; j < PERIODIC_SIZE; j += period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if ((isp116x->load[j] + load)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) > MAX_PERIODIC_LOAD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (j < PERIODIC_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) branch = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return branch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) /* NB! ALL the code above this point runs with isp116x->lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) held, irqs off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) /*-----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static int isp116x_urb_enqueue(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct usb_device *udev = urb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) unsigned int pipe = urb->pipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) int is_out = !usb_pipein(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) int type = usb_pipetype(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) int epnum = usb_pipeendpoint(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) struct usb_host_endpoint *hep = urb->ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) struct isp116x_ep *ep = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) urb_dbg(urb, "Enqueue");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if (type == PIPE_ISOCHRONOUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) ERR("Isochronous transfers not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) urb_dbg(urb, "Refused to enqueue");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* avoid all allocations within spinlocks: request or endpoint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (!hep->hcpriv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) ep = kzalloc(sizeof *ep, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) if (!ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) if (!HC_IS_RUNNING(hcd->state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) kfree(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) goto fail_not_linked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) ret = usb_hcd_link_urb_to_ep(hcd, urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) kfree(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) goto fail_not_linked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (hep->hcpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) ep = hep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) INIT_LIST_HEAD(&ep->schedule);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) ep->udev = udev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) ep->epnum = epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) usb_settoggle(udev, epnum, is_out, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (type == PIPE_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) ep->nextpid = USB_PID_SETUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) } else if (is_out) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) ep->nextpid = USB_PID_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ep->nextpid = USB_PID_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (urb->interval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) With INT URBs submitted, the driver works with SOF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) interrupt enabled and ATL interrupt disabled. After
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) the PTDs are written to fifo ram, the chip starts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) fifo processing and usb transfers after the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) SOF and continues until the transfers are finished
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) (succeeded or failed) or the frame ends. Therefore,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) the transfers occur only in every second frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) while fifo reading/writing and data processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) occur in every other second frame. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (urb->interval < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) urb->interval = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) if (urb->interval > 2 * PERIODIC_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) urb->interval = 2 * PERIODIC_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) ep->period = urb->interval >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ep->branch = PERIODIC_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) ep->load = usb_calc_bus_time(udev->speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) !is_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) (type == PIPE_ISOCHRONOUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) usb_maxpacket(udev, pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) is_out)) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) hep->hcpriv = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) ep->hep = hep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* maybe put endpoint into schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) case PIPE_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) case PIPE_BULK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (list_empty(&ep->schedule))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) list_add_tail(&ep->schedule, &isp116x->async);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) case PIPE_INTERRUPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) urb->interval = ep->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) ep->length = min_t(u32, ep->maxpacket,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) urb->transfer_buffer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) /* urb submitted for already existing endpoint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (ep->branch < PERIODIC_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) ep->branch = ret = balance(isp116x, ep->period, ep->load);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) + ep->branch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) /* sort each schedule branch by period (slow before fast)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) to share the faster parts of the tree without needing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) dummy/placeholder nodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) struct isp116x_ep **prev = &isp116x->periodic[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) struct isp116x_ep *here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) while (here && ep != here) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (ep->period > here->period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) prev = &here->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (ep != here) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) ep->next = here;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) *prev = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) isp116x->load[i] += ep->load;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) hcd->self.bandwidth_allocated += ep->load / ep->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) /* switch over to SOFint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (!isp116x->periodic_count++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) isp116x->irqenb &= ~HCuPINT_ATL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) isp116x->irqenb |= HCuPINT_SOF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) isp116x_write_reg16(isp116x, HCuPINTENB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) isp116x->irqenb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) urb->hcpriv = hep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) start_atl_transfers(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) usb_hcd_unlink_urb_from_ep(hcd, urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) fail_not_linked:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) Dequeue URBs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) struct usb_host_endpoint *hep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) struct isp116x_ep *ep, *ep_act;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) rc = usb_hcd_check_unlink_urb(hcd, urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) hep = urb->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ep = hep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) WARN_ON(hep != ep->hep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) /* In front of queue? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) if (ep->hep->urb_list.next == &urb->urb_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) /* active? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) for (ep_act = isp116x->atl_active; ep_act;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) ep_act = ep_act->active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) if (ep_act == ep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) VDBG("dequeue, urb %p active; wait for irq\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) urb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) finish_request(isp116x, ep, urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static void isp116x_endpoint_disable(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) struct usb_host_endpoint *hep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) struct isp116x_ep *ep = hep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (!ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* assume we'd just wait for the irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) for (i = 0; i < 100 && !list_empty(&hep->urb_list); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) msleep(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) if (!list_empty(&hep->urb_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) WARNING("ep %p not empty?\n", ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) kfree(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) hep->hcpriv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) static int isp116x_get_frame(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) u32 fmnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) fmnum = isp116x_read_reg32(isp116x, HCFMNUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return (int)fmnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) Adapted from ohci-hub.c. Currently we don't support autosuspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) int ports, i, changed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (!HC_IS_RUNNING(hcd->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) /* Report no status change now, if we are scheduled to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) called later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (timer_pending(&hcd->rh_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) ports = isp116x->rhdesca & RH_A_NDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) buf[0] = changed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) buf[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) for (i = 0; i < ports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) u32 status = isp116x_read_reg32(isp116x, i ? HCRHPORT2 : HCRHPORT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) | RH_PS_OCIC | RH_PS_PRSC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) changed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) buf[0] |= 1 << (i + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) return changed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) static void isp116x_hub_descriptor(struct isp116x *isp116x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) struct usb_hub_descriptor *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) u32 reg = isp116x->rhdesca;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) desc->bDescriptorType = USB_DT_HUB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) desc->bDescLength = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) desc->bHubContrCurrent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) desc->bNbrPorts = (u8) (reg & 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) /* Power switching, device type, overcurrent. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) desc->wHubCharacteristics = cpu_to_le16((u16) ((reg >> 8) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) (HUB_CHAR_LPSM |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) HUB_CHAR_COMPOUND |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) HUB_CHAR_OCPM)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) /* ports removable, and legacy PortPwrCtrlMask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) desc->u.hs.DeviceRemovable[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) desc->u.hs.DeviceRemovable[1] = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) /* Perform reset of a given port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) It would be great to just start the reset and let the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) USB core to clear the reset in due time. However,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) root hub ports should be reset for at least 50 ms, while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) our chip stays in reset for about 10 ms. I.e., we must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) repeatedly reset it ourself here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static inline void root_port_reset(struct isp116x *isp116x, unsigned port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) unsigned long flags, t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /* Root hub reset should be 50 ms, but some devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) want it even longer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) t = jiffies + msecs_to_jiffies(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) while (time_before(jiffies, t)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) /* spin until any current reset finishes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) tmp = isp116x_read_reg32(isp116x, port ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) HCRHPORT2 : HCRHPORT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) if (!(tmp & RH_PS_PRS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) /* Don't reset a disconnected port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) if (!(tmp & RH_PS_CCS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) /* Reset lasts 10ms (claims datasheet) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) isp116x_write_reg32(isp116x, port ? HCRHPORT2 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) HCRHPORT1, (RH_PS_PRS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) /* Adapted from ohci-hub.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) static int isp116x_hub_control(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) u16 typeReq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) u16 wValue, u16 wIndex, char *buf, u16 wLength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) int ports = isp116x->rhdesca & RH_A_NDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) u32 tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) switch (typeReq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) case ClearHubFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) DBG("ClearHubFeature: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) case C_HUB_OVER_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) DBG("C_HUB_OVER_CURRENT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) case C_HUB_LOCAL_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) DBG("C_HUB_LOCAL_POWER\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) case SetHubFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) DBG("SetHubFeature: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) case C_HUB_OVER_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) case C_HUB_LOCAL_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) case GetHubDescriptor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) DBG("GetHubDescriptor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) isp116x_hub_descriptor(isp116x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) (struct usb_hub_descriptor *)buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) case GetHubStatus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) DBG("GetHubStatus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) *(__le32 *) buf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) case GetPortStatus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) DBG("GetPortStatus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) if (!wIndex || wIndex > ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) tmp = isp116x_read_reg32(isp116x, (--wIndex) ? HCRHPORT2 : HCRHPORT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) *(__le32 *) buf = cpu_to_le32(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) DBG("GetPortStatus: port[%d] %08x\n", wIndex + 1, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) case ClearPortFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) DBG("ClearPortFeature: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (!wIndex || wIndex > ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) wIndex--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) case USB_PORT_FEAT_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) DBG("USB_PORT_FEAT_ENABLE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) tmp = RH_PS_CCS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) case USB_PORT_FEAT_C_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) DBG("USB_PORT_FEAT_C_ENABLE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) tmp = RH_PS_PESC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) case USB_PORT_FEAT_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) DBG("USB_PORT_FEAT_SUSPEND\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) tmp = RH_PS_POCI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) case USB_PORT_FEAT_C_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) DBG("USB_PORT_FEAT_C_SUSPEND\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) tmp = RH_PS_PSSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) case USB_PORT_FEAT_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) DBG("USB_PORT_FEAT_POWER\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) tmp = RH_PS_LSDA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) case USB_PORT_FEAT_C_CONNECTION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) DBG("USB_PORT_FEAT_C_CONNECTION\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) tmp = RH_PS_CSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) case USB_PORT_FEAT_C_OVER_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) DBG("USB_PORT_FEAT_C_OVER_CURRENT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) tmp = RH_PS_OCIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) case USB_PORT_FEAT_C_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) DBG("USB_PORT_FEAT_C_RESET\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) tmp = RH_PS_PRSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) isp116x_write_reg32(isp116x, wIndex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) ? HCRHPORT2 : HCRHPORT1, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) case SetPortFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) DBG("SetPortFeature: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) if (!wIndex || wIndex > ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) wIndex--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) case USB_PORT_FEAT_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) DBG("USB_PORT_FEAT_SUSPEND\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) isp116x_write_reg32(isp116x, wIndex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) case USB_PORT_FEAT_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) DBG("USB_PORT_FEAT_POWER\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) isp116x_write_reg32(isp116x, wIndex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) case USB_PORT_FEAT_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) DBG("USB_PORT_FEAT_RESET\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) root_port_reset(isp116x, wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) /* "protocol stall" on error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) DBG("PROTOCOL STALL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) ret = -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) /*-----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) static void dump_irq(struct seq_file *s, char *label, u16 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) seq_printf(s, "%s %04x%s%s%s%s%s%s\n", label, mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) mask & HCuPINT_CLKRDY ? " clkrdy" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) mask & HCuPINT_SUSP ? " susp" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) mask & HCuPINT_OPR ? " opr" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) mask & HCuPINT_AIIEOT ? " eot" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) mask & HCuPINT_ATL ? " atl" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) mask & HCuPINT_SOF ? " sof" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) static void dump_int(struct seq_file *s, char *label, u32 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) seq_printf(s, "%s %08x%s%s%s%s%s%s%s\n", label, mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) mask & HCINT_MIE ? " MIE" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) mask & HCINT_RHSC ? " rhsc" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) mask & HCINT_FNO ? " fno" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) mask & HCINT_UE ? " ue" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) mask & HCINT_RD ? " rd" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) mask & HCINT_SF ? " sof" : "", mask & HCINT_SO ? " so" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) static int isp116x_debug_show(struct seq_file *s, void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) struct isp116x *isp116x = s->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) seq_printf(s, "%s\n%s version %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) isp116x_to_hcd(isp116x)->product_desc, hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) DRIVER_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) seq_printf(s, "HCD is suspended\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) seq_printf(s, "HCD not running\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) spin_lock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) dump_irq(s, "hc_irq_enable", isp116x_read_reg16(isp116x, HCuPINTENB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) dump_irq(s, "hc_irq_status", isp116x_read_reg16(isp116x, HCuPINT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) dump_int(s, "hc_int_enable", isp116x_read_reg32(isp116x, HCINTENB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) dump_int(s, "hc_int_status", isp116x_read_reg32(isp116x, HCINTSTAT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) isp116x_show_regs_seq(isp116x, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) spin_unlock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) seq_printf(s, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) DEFINE_SHOW_ATTRIBUTE(isp116x_debug);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) static void create_debug_file(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) isp116x->dentry = debugfs_create_file(hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) S_IRUGO, NULL, isp116x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) &isp116x_debug_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) static void remove_debug_file(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) debugfs_remove(isp116x->dentry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) static inline void create_debug_file(struct isp116x *isp116x) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static inline void remove_debug_file(struct isp116x *isp116x) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) #endif /* CONFIG_DEBUG_FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) /*-----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) Software reset - can be called from any contect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) static int isp116x_sw_reset(struct isp116x *isp116x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) int retries = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) while (--retries) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) /* It usually resets within 1 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) mdelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) if (!retries) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) ERR("Software reset timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) ret = -ETIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) static int isp116x_reset(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) unsigned long t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) u16 clkrdy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) int ret, timeout = 15 /* ms */ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) ret = isp116x_sw_reset(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) t = jiffies + msecs_to_jiffies(timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) while (time_before_eq(jiffies, t)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) msleep(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) spin_lock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) spin_unlock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) if (clkrdy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) if (!clkrdy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) ERR("Clock not ready after %dms\n", timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) /* After sw_reset the clock won't report to be ready, if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) H_WAKEUP pin is high. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) ERR("Please make sure that the H_WAKEUP pin is pulled low!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) static void isp116x_stop(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) isp116x_write_reg16(isp116x, HCuPINTENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) /* Switch off ports' power, some devices don't come up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) after next 'insmod' without this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) val = isp116x_read_reg32(isp116x, HCRHDESCA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) val &= ~(RH_A_NPS | RH_A_PSM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) isp116x_write_reg32(isp116x, HCRHDESCA, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) isp116x_sw_reset(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) Configure the chip. The chip must be successfully reset by now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) static int isp116x_start(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) struct isp116x_platform_data *board = isp116x->board;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) /* clear interrupt status and disable all interrupt sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) isp116x_write_reg16(isp116x, HCuPINT, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) isp116x_write_reg16(isp116x, HCuPINTENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) val = isp116x_read_reg16(isp116x, HCCHIPID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) ERR("Invalid chip ID %04x\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) /* To be removed in future */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) hcd->uses_new_polling = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) /* ----- HW conf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) if (board->sel15Kres)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) val |= HCHWCFG_15KRSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /* Remote wakeup won't work without working clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) if (board->remote_wakeup_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) val |= HCHWCFG_CLKNOTSTOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) if (board->oc_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) val |= HCHWCFG_ANALOG_OC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if (board->int_act_high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) val |= HCHWCFG_INT_POL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) if (board->int_edge_triggered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) val |= HCHWCFG_INT_TRIGGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) isp116x_write_reg16(isp116x, HCHWCFG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) /* ----- Root hub conf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) val = (25 << 24) & RH_A_POTPGT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) be always set. Yet, instead, we request individual port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) power switching. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) val |= RH_A_PSM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) /* Report overcurrent per port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) val |= RH_A_OCPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) isp116x_write_reg32(isp116x, HCRHDESCA, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) val = RH_B_PPCM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) isp116x_write_reg32(isp116x, HCRHDESCB, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) if (board->remote_wakeup_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) if (!device_can_wakeup(hcd->self.controller))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) device_init_wakeup(hcd->self.controller, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) val |= RH_HS_DRWE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) isp116x_write_reg32(isp116x, HCRHSTATUS, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) hcd->state = HC_STATE_RUNNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) /* Set up interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) if (board->remote_wakeup_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) isp116x->intenb |= HCINT_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) isp116x_write_reg32(isp116x, HCINTENB, isp116x->intenb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) /* Go operational */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) val = HCCONTROL_USB_OPER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if (board->remote_wakeup_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) val |= HCCONTROL_RWE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) isp116x_write_reg32(isp116x, HCCONTROL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) /* Disable ports to avoid race in device enumeration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) isp116x_show_regs_log(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) static int isp116x_bus_suspend(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) val = isp116x_read_reg32(isp116x, HCCONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) switch (val & HCCONTROL_HCFS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) case HCCONTROL_USB_OPER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) val |= HCCONTROL_USB_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) if (hcd->self.root_hub->do_remote_wakeup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) val |= HCCONTROL_RWE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) /* Wait for usb transfers to finish */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) msleep(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) spin_lock_irqsave(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) isp116x_write_reg32(isp116x, HCCONTROL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) /* Wait for devices to suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) case HCCONTROL_USB_RESUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) isp116x_write_reg32(isp116x, HCCONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) (val & ~HCCONTROL_HCFS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) HCCONTROL_USB_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) case HCCONTROL_USB_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) default: /* HCCONTROL_USB_SUSPEND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) spin_unlock_irqrestore(&isp116x->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) static int isp116x_bus_resume(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) struct isp116x *isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) spin_lock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) val = isp116x_read_reg32(isp116x, HCCONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) switch (val & HCCONTROL_HCFS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) case HCCONTROL_USB_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) val &= ~HCCONTROL_HCFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) val |= HCCONTROL_USB_RESUME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) isp116x_write_reg32(isp116x, HCCONTROL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) case HCCONTROL_USB_RESUME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) case HCCONTROL_USB_OPER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) spin_unlock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) /* HCCONTROL_USB_RESET: this may happen, when during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) suspension the HC lost power. Reinitialize completely */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) spin_unlock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) DBG("Chip has been reset while suspended. Reinit from scratch.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) isp116x_reset(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) isp116x_start(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) isp116x_hub_control(hcd, SetPortFeature,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) USB_PORT_FEAT_POWER, 1, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) if ((isp116x->rhdesca & RH_A_NDP) == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) isp116x_hub_control(hcd, SetPortFeature,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) USB_PORT_FEAT_POWER, 2, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) val = isp116x->rhdesca & RH_A_NDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) while (val--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) u32 stat =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) /* force global, not selective, resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (!(stat & RH_PS_PSS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) DBG("%s: Resuming port %d\n", __func__, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) isp116x_write_reg32(isp116x, RH_PS_POCI, val
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) ? HCRHPORT2 : HCRHPORT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) spin_unlock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) hcd->state = HC_STATE_RESUMING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) msleep(USB_RESUME_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) /* Go operational */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) spin_lock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) val = isp116x_read_reg32(isp116x, HCCONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) isp116x_write_reg32(isp116x, HCCONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) spin_unlock_irq(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) hcd->state = HC_STATE_RUNNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) #define isp116x_bus_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) #define isp116x_bus_resume NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) static const struct hc_driver isp116x_hc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) .description = hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) .product_desc = "ISP116x Host Controller",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) .hcd_priv_size = sizeof(struct isp116x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) .irq = isp116x_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) .flags = HCD_USB11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) .reset = isp116x_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) .start = isp116x_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) .stop = isp116x_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) .urb_enqueue = isp116x_urb_enqueue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) .urb_dequeue = isp116x_urb_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) .endpoint_disable = isp116x_endpoint_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) .get_frame_number = isp116x_get_frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) .hub_status_data = isp116x_hub_status_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) .hub_control = isp116x_hub_control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) .bus_suspend = isp116x_bus_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) .bus_resume = isp116x_bus_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) /*----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) static int isp116x_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) struct usb_hcd *hcd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) struct isp116x *isp116x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) if (!hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) remove_debug_file(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) iounmap(isp116x->data_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) release_mem_region(res->start, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) iounmap(isp116x->addr_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) release_mem_region(res->start, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) static int isp116x_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) struct isp116x *isp116x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) struct resource *addr, *data, *ires;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) void __iomem *addr_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) void __iomem *data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) unsigned long irqflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) if (pdev->num_resources < 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) goto err1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) if (!addr || !data || !ires) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) goto err1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) irq = ires->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) irqflags = ires->flags & IRQF_TRIGGER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) if (!request_mem_region(addr->start, 2, hcd_name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) goto err1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) addr_reg = ioremap(addr->start, resource_size(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) if (addr_reg == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) if (!request_mem_region(data->start, 2, hcd_name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) goto err3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) data_reg = ioremap(data->start, resource_size(data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) if (data_reg == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) goto err4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) /* allocate and initialize hcd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) hcd = usb_create_hcd(&isp116x_hc_driver, &pdev->dev, dev_name(&pdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) if (!hcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) goto err5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) /* this rsrc_start is bogus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) hcd->rsrc_start = addr->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) isp116x = hcd_to_isp116x(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) isp116x->data_reg = data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) isp116x->addr_reg = addr_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) spin_lock_init(&isp116x->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) INIT_LIST_HEAD(&isp116x->async);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) isp116x->board = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) if (!isp116x->board) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) ERR("Platform data structure not initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) goto err6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) if (isp116x_check_platform_delay(isp116x)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) ERR("USE_PLATFORM_DELAY defined, but delay function not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) "implemented.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) ERR("See comments in drivers/usb/host/isp116x-hcd.c\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) goto err6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) ret = usb_add_hcd(hcd, irq, irqflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) goto err6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) device_wakeup_enable(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) create_debug_file(isp116x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) err6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) err5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) iounmap(data_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) err4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) release_mem_region(data->start, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) err3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) iounmap(addr_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) release_mem_region(addr->start, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) err1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) ERR("init error, %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) Suspend of platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) static int isp116x_suspend(struct platform_device *dev, pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) VDBG("%s: state %x\n", __func__, state.event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) Resume platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) static int isp116x_resume(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) VDBG("%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) #define isp116x_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) #define isp116x_resume NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) /* work with hotplug and coldplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) MODULE_ALIAS("platform:isp116x-hcd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) static struct platform_driver isp116x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) .probe = isp116x_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) .remove = isp116x_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) .suspend = isp116x_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) .resume = isp116x_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) .name = hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) module_platform_driver(isp116x_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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