^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Faraday FOTG210 EHCI-like driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2013 Faraday Technology Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Feng-Hsin Chiang <john453@faraday-tech.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Po-Yu Chuang <ratbert.chuang@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Most of code borrowed from the Linux-3.7 EHCI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/dmapool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/hrtimer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/usb/hcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/iopoll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DRIVER_AUTHOR "Yuan-Hsin Chen"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define DRIVER_DESC "FOTG210 Host Controller (EHCI) Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static const char hcd_name[] = "fotg210_hcd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #undef FOTG210_URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define FOTG210_STATS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* magic numbers that can affect system performance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define FOTG210_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define FOTG210_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define FOTG210_TUNE_RL_TT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define FOTG210_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define FOTG210_TUNE_MULT_TT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Some drivers think it's safe to schedule isochronous transfers more than 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * ms into the future (partly as a result of an old bug in the scheduling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * code). In an attempt to avoid trouble, we will use a minimum scheduling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * length of 512 frames instead of 256.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define FOTG210_TUNE_FLS 1 /* (medium) 512-frame schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Initial IRQ latency: faster than hw default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int log2_irq_thresh; /* 0 to 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) module_param(log2_irq_thresh, int, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* initial park setting: slower than hw default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static unsigned park;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) module_param(park, uint, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* for link power management(LPM) feature */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static unsigned int hird;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) module_param(hird, int, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #include "fotg210.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define fotg210_dbg(fotg210, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define fotg210_err(fotg210, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define fotg210_info(fotg210, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define fotg210_warn(fotg210, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* check the values in the HCSPARAMS register (host controller _Structural_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * parameters) see EHCI spec, Table 2-4 for each value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static void dbg_hcs_params(struct fotg210_hcd *fotg210, char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u32 params = fotg210_readl(fotg210, &fotg210->caps->hcs_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) fotg210_dbg(fotg210, "%s hcs_params 0x%x ports=%d\n", label, params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) HCS_N_PORTS(params));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* check the values in the HCCPARAMS register (host controller _Capability_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * parameters) see EHCI Spec, Table 2-5 for each value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static void dbg_hcc_params(struct fotg210_hcd *fotg210, char *label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u32 params = fotg210_readl(fotg210, &fotg210->caps->hcc_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) fotg210_dbg(fotg210, "%s hcc_params %04x uframes %s%s\n", label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) HCC_CANPARK(params) ? " park" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static void __maybe_unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dbg_qtd(const char *label, struct fotg210_hcd *fotg210, struct fotg210_qtd *qtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) fotg210_dbg(fotg210, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) hc32_to_cpup(fotg210, &qtd->hw_next),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) hc32_to_cpup(fotg210, &qtd->hw_alt_next),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) hc32_to_cpup(fotg210, &qtd->hw_token),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) hc32_to_cpup(fotg210, &qtd->hw_buf[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (qtd->hw_buf[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) fotg210_dbg(fotg210, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) hc32_to_cpup(fotg210, &qtd->hw_buf[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) hc32_to_cpup(fotg210, &qtd->hw_buf[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) hc32_to_cpup(fotg210, &qtd->hw_buf[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) hc32_to_cpup(fotg210, &qtd->hw_buf[4]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static void __maybe_unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dbg_qh(const char *label, struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct fotg210_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) fotg210_dbg(fotg210, "%s qh %p n%08x info %x %x qtd %x\n", label, qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) hw->hw_next, hw->hw_info1, hw->hw_info2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) hw->hw_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) dbg_qtd("overlay", fotg210, (struct fotg210_qtd *) &hw->hw_qtd_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static void __maybe_unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) dbg_itd(const char *label, struct fotg210_hcd *fotg210, struct fotg210_itd *itd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) fotg210_dbg(fotg210, "%s[%d] itd %p, next %08x, urb %p\n", label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) itd->frame, itd, hc32_to_cpu(fotg210, itd->hw_next),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) itd->urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) hc32_to_cpu(fotg210, itd->hw_transaction[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) hc32_to_cpu(fotg210, itd->hw_transaction[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) hc32_to_cpu(fotg210, itd->hw_transaction[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) hc32_to_cpu(fotg210, itd->hw_transaction[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) hc32_to_cpu(fotg210, itd->hw_transaction[4]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) hc32_to_cpu(fotg210, itd->hw_transaction[5]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) hc32_to_cpu(fotg210, itd->hw_transaction[6]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) hc32_to_cpu(fotg210, itd->hw_transaction[7]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) " buf: %08x %08x %08x %08x %08x %08x %08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) hc32_to_cpu(fotg210, itd->hw_bufp[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) hc32_to_cpu(fotg210, itd->hw_bufp[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) hc32_to_cpu(fotg210, itd->hw_bufp[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) hc32_to_cpu(fotg210, itd->hw_bufp[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) hc32_to_cpu(fotg210, itd->hw_bufp[4]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) hc32_to_cpu(fotg210, itd->hw_bufp[5]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) hc32_to_cpu(fotg210, itd->hw_bufp[6]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) fotg210_dbg(fotg210, " index: %d %d %d %d %d %d %d %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) itd->index[0], itd->index[1], itd->index[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) itd->index[3], itd->index[4], itd->index[5],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) itd->index[6], itd->index[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static int __maybe_unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) label, label[0] ? " " : "", status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) (status & STS_ASS) ? " Async" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) (status & STS_PSS) ? " Periodic" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) (status & STS_RECL) ? " Recl" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) (status & STS_HALT) ? " Halt" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) (status & STS_IAA) ? " IAA" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) (status & STS_FATAL) ? " FATAL" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) (status & STS_FLR) ? " FLR" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) (status & STS_PCD) ? " PCD" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) (status & STS_ERR) ? " ERR" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) (status & STS_INT) ? " INT" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int __maybe_unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) label, label[0] ? " " : "", enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) (enable & STS_IAA) ? " IAA" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) (enable & STS_FATAL) ? " FATAL" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) (enable & STS_FLR) ? " FLR" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) (enable & STS_PCD) ? " PCD" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) (enable & STS_ERR) ? " ERR" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) (enable & STS_INT) ? " INT" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const char *const fls_strings[] = { "1024", "512", "256", "??" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int dbg_command_buf(char *buf, unsigned len, const char *label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) u32 command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return scnprintf(buf, len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) "%s%scommand %07x %s=%d ithresh=%d%s%s%s period=%s%s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) label, label[0] ? " " : "", command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) (command & CMD_PARK) ? " park" : "(park)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) CMD_PARK_CNT(command),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) (command >> 16) & 0x3f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) (command & CMD_IAAD) ? " IAAD" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) (command & CMD_ASE) ? " Async" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) (command & CMD_PSE) ? " Periodic" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) fls_strings[(command >> 2) & 0x3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) (command & CMD_RESET) ? " Reset" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) (command & CMD_RUN) ? "RUN" : "HALT");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static char *dbg_port_buf(char *buf, unsigned len, const char *label, int port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u32 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) char *sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* signaling state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) switch (status & (3 << 10)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) case 0 << 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) sig = "se0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) case 1 << 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) sig = "k";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) break; /* low speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) case 2 << 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) sig = "j";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) sig = "?";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) scnprintf(buf, len, "%s%sport:%d status %06x %d sig=%s%s%s%s%s%s%s%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) label, label[0] ? " " : "", port, status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) status >> 25, /*device address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) sig,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) (status & PORT_RESET) ? " RESET" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) (status & PORT_SUSPEND) ? " SUSPEND" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) (status & PORT_RESUME) ? " RESUME" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) (status & PORT_PEC) ? " PEC" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) (status & PORT_PE) ? " PE" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) (status & PORT_CSC) ? " CSC" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) (status & PORT_CONNECT) ? " CONNECT" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* functions have the "wrong" filename when they're output... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define dbg_status(fotg210, label, status) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) char _buf[80]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dbg_status_buf(_buf, sizeof(_buf), label, status); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) fotg210_dbg(fotg210, "%s\n", _buf); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define dbg_cmd(fotg210, label, command) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) char _buf[80]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) dbg_command_buf(_buf, sizeof(_buf), label, command); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) fotg210_dbg(fotg210, "%s\n", _buf); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define dbg_port(fotg210, label, port, status) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) char _buf[80]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) fotg210_dbg(fotg210, "%s\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* troubleshooting help: expose state in debugfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static int debug_async_open(struct inode *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static int debug_periodic_open(struct inode *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static int debug_registers_open(struct inode *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int debug_async_open(struct inode *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static int debug_close(struct inode *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static const struct file_operations debug_async_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .open = debug_async_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .read = debug_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .release = debug_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .llseek = default_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const struct file_operations debug_periodic_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .open = debug_periodic_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .read = debug_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .release = debug_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .llseek = default_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static const struct file_operations debug_registers_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .open = debug_registers_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .read = debug_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .release = debug_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .llseek = default_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static struct dentry *fotg210_debug_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct debug_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct usb_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct mutex mutex; /* protect filling of buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) size_t count; /* number of characters filled into buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) char *output_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) size_t alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static inline char speed_char(u32 scratch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) switch (scratch & (3 << 12)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case QH_FULL_SPEED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return 'f';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case QH_LOW_SPEED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return 'l';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) case QH_HIGH_SPEED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return 'h';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return '?';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static inline char token_mark(struct fotg210_hcd *fotg210, __hc32 token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) __u32 v = hc32_to_cpu(fotg210, token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (v & QTD_STS_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return '*';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (v & QTD_STS_HALT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return '-';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (!IS_SHORT_READ(v))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* tries to advance through hw_alt_next */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return '/';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static void qh_lines(struct fotg210_hcd *fotg210, struct fotg210_qh *qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) char **nextp, unsigned *sizep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u32 scratch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u32 hw_curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct fotg210_qtd *td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) unsigned temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) unsigned size = *sizep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) char *next = *nextp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) char mark;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) __le32 list_end = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct fotg210_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (hw->hw_qtd_next == list_end) /* NEC does this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) mark = '@';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) mark = token_mark(fotg210, hw->hw_token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (mark == '/') { /* qh_alt_next controls qh advance? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if ((hw->hw_alt_next & QTD_MASK(fotg210)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) fotg210->async->hw->hw_alt_next)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) mark = '#'; /* blocked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) else if (hw->hw_alt_next == list_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) mark = '.'; /* use hw_qtd_next */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* else alt_next points to some other qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) scratch = hc32_to_cpup(fotg210, &hw->hw_info1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) hw_curr = (mark == '*') ? hc32_to_cpup(fotg210, &hw->hw_current) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) temp = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) "qh/%p dev%d %cs ep%d %08x %08x(%08x%c %s nak%d)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) qh, scratch & 0x007f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) speed_char(scratch),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) (scratch >> 8) & 0x000f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) scratch, hc32_to_cpup(fotg210, &hw->hw_info2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) hc32_to_cpup(fotg210, &hw->hw_token), mark,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) (cpu_to_hc32(fotg210, QTD_TOGGLE) & hw->hw_token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ? "data1" : "data0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) (hc32_to_cpup(fotg210, &hw->hw_alt_next) >> 1) & 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* hc may be modifying the list as we read it ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) list_for_each_entry(td, &qh->qtd_list, qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) scratch = hc32_to_cpup(fotg210, &td->hw_token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) mark = ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (hw_curr == td->qtd_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) mark = '*';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) else if (hw->hw_qtd_next == cpu_to_hc32(fotg210, td->qtd_dma))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) mark = '+';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) else if (QTD_LENGTH(scratch)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (td->hw_alt_next == fotg210->async->hw->hw_alt_next)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) mark = '#';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) else if (td->hw_alt_next != list_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) mark = '/';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) temp = snprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) "\n\t%p%c%s len=%d %08x urb %p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) td, mark, ({ char *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) switch ((scratch>>8)&0x03) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) tmp = "out";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) tmp = "in";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) tmp = "setup";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) tmp = "?";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) } tmp; }),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) (scratch >> 16) & 0x7fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) scratch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) td->urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (size < temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) temp = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (temp == size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) temp = snprintf(next, size, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (size < temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) temp = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) *sizep = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) *nextp = next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static ssize_t fill_async_buffer(struct debug_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) struct fotg210_hcd *fotg210;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) unsigned temp, size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) char *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) hcd = bus_to_hcd(buf->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) next = buf->output_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) size = buf->alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) *next = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* dumps a snapshot of the async schedule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * usually empty except for long-term bulk reads, or head.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * one QH per line, and TDs we know about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) for (qh = fotg210->async->qh_next.qh; size > 0 && qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) qh = qh->qh_next.qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) qh_lines(fotg210, qh, &next, &size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (fotg210->async_unlink && size > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) temp = scnprintf(next, size, "\nunlink =\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) for (qh = fotg210->async_unlink; size > 0 && qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) qh = qh->unlink_next)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) qh_lines(fotg210, qh, &next, &size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return strlen(buf->output_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* count tds, get ep direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static unsigned output_buf_tds_dir(char *buf, struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct fotg210_qh_hw *hw, struct fotg210_qh *qh, unsigned size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u32 scratch = hc32_to_cpup(fotg210, &hw->hw_info1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) struct fotg210_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) char *type = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) unsigned temp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /* count tds, get ep direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) temp++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) switch ((hc32_to_cpu(fotg210, qtd->hw_token) >> 8) & 0x03) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) type = "out";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) type = "in";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return scnprintf(buf, size, "(%c%d ep%d%s [%d/%d] q%d p%d)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) speed_char(scratch), scratch & 0x007f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) (scratch >> 8) & 0x000f, type, qh->usecs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) qh->c_usecs, temp, (scratch >> 16) & 0x7ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define DBG_SCHED_LIMIT 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) struct fotg210_hcd *fotg210;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) union fotg210_shadow p, *seen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) unsigned temp, size, seen_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) char *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) __hc32 tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (!seen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) seen_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) hcd = bus_to_hcd(buf->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) next = buf->output_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) size = buf->alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) temp = scnprintf(next, size, "size = %d\n", fotg210->periodic_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* dump a snapshot of the periodic schedule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * iso changes, interrupt usually doesn't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) for (i = 0; i < fotg210->periodic_size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) p = fotg210->pshadow[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (likely(!p.ptr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) tag = Q_NEXT_TYPE(fotg210, fotg210->periodic[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) temp = scnprintf(next, size, "%4d: ", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) struct fotg210_qh_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) switch (hc32_to_cpu(fotg210, tag)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) case Q_TYPE_QH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) hw = p.qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) temp = scnprintf(next, size, " qh%d-%04x/%p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) p.qh->period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) hc32_to_cpup(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) &hw->hw_info2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /* uframe masks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) & (QH_CMASK | QH_SMASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) p.qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* don't repeat what follows this qh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) for (temp = 0; temp < seen_count; temp++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (seen[temp].ptr != p.ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (p.qh->qh_next.ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) temp = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) " ...");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* show more info the first time around */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (temp == seen_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) temp = output_buf_tds_dir(next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) fotg210, hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) p.qh, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (seen_count < DBG_SCHED_LIMIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) seen[seen_count++].qh = p.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) temp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) tag = Q_NEXT_TYPE(fotg210, hw->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) p = p.qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) case Q_TYPE_FSTN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) temp = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) " fstn-%8x/%p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) p.fstn->hw_prev, p.fstn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) tag = Q_NEXT_TYPE(fotg210, p.fstn->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) p = p.fstn->fstn_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) case Q_TYPE_ITD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) temp = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) " itd/%p", p.itd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) tag = Q_NEXT_TYPE(fotg210, p.itd->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) p = p.itd->itd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) } while (p.ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) temp = scnprintf(next, size, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) kfree(seen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return buf->alloc_size - size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) #undef DBG_SCHED_LIMIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static const char *rh_state_string(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) switch (fotg210->rh_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) case FOTG210_RH_HALTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) return "halted";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) case FOTG210_RH_SUSPENDED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) return "suspended";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) case FOTG210_RH_RUNNING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) return "running";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) case FOTG210_RH_STOPPING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return "stopping";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return "?";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static ssize_t fill_registers_buffer(struct debug_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) struct fotg210_hcd *fotg210;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) unsigned temp, size, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) char *next, scratch[80];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static const char fmt[] = "%*s\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static const char label[] = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) hcd = bus_to_hcd(buf->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) next = buf->output_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) size = buf->alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (!HCD_HW_ACCESSIBLE(hcd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) size = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) "bus %s, device %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "%s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "SUSPENDED(no register access)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) hcd->self.controller->bus->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) dev_name(hcd->self.controller),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) hcd->product_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* Capability Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) i = HC_VERSION(fotg210, fotg210_readl(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) &fotg210->caps->hc_capbase));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) temp = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) "bus %s, device %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) "%s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) "EHCI %x.%02x, rh state %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) hcd->self.controller->bus->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) dev_name(hcd->self.controller),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) hcd->product_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) i >> 8, i & 0x0ff, rh_state_string(fotg210));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /* FIXME interpret both types of params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) i = fotg210_readl(fotg210, &fotg210->caps->hcs_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) temp = scnprintf(next, size, "structural params 0x%08x\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) i = fotg210_readl(fotg210, &fotg210->caps->hcc_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) temp = scnprintf(next, size, "capability params 0x%08x\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) /* Operational Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) temp = dbg_status_buf(scratch, sizeof(scratch), label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) fotg210_readl(fotg210, &fotg210->regs->status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) temp = scnprintf(next, size, fmt, temp, scratch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) temp = dbg_command_buf(scratch, sizeof(scratch), label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) fotg210_readl(fotg210, &fotg210->regs->command));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) temp = scnprintf(next, size, fmt, temp, scratch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) temp = dbg_intr_buf(scratch, sizeof(scratch), label,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) fotg210_readl(fotg210, &fotg210->regs->intr_enable));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) temp = scnprintf(next, size, fmt, temp, scratch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) temp = scnprintf(next, size, "uframe %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) fotg210_read_frame_index(fotg210));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (fotg210->async_unlink) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) temp = scnprintf(next, size, "async unlink qh %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) fotg210->async_unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) #ifdef FOTG210_STATS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) temp = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) "irq normal %ld err %ld iaa %ld(lost %ld)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) fotg210->stats.normal, fotg210->stats.error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) fotg210->stats.iaa, fotg210->stats.lost_iaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) temp = scnprintf(next, size, "complete %ld unlink %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) fotg210->stats.complete, fotg210->stats.unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) size -= temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) next += temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) return buf->alloc_size - size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static struct debug_buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) *alloc_buffer(struct usb_bus *bus, ssize_t (*fill_func)(struct debug_buffer *))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) struct debug_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) buf->bus = bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) buf->fill_func = fill_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) mutex_init(&buf->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) buf->alloc_size = PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) static int fill_buffer(struct debug_buffer *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (!buf->output_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) buf->output_buf = vmalloc(buf->alloc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (!buf->output_buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) ret = buf->fill_func(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (ret >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) buf->count = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static ssize_t debug_output(struct file *file, char __user *user_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) size_t len, loff_t *offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) struct debug_buffer *buf = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) mutex_lock(&buf->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) if (buf->count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) ret = fill_buffer(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) mutex_unlock(&buf->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) mutex_unlock(&buf->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) ret = simple_read_from_buffer(user_buf, len, offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) buf->output_buf, buf->count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static int debug_close(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) struct debug_buffer *buf = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) vfree(buf->output_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) static int debug_async_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return file->private_data ? 0 : -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static int debug_periodic_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) struct debug_buffer *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) file->private_data = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) static int debug_registers_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) file->private_data = alloc_buffer(inode->i_private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) fill_registers_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return file->private_data ? 0 : -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static inline void create_debug_files(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) struct usb_bus *bus = &fotg210_to_hcd(fotg210)->self;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) struct dentry *root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) root = debugfs_create_dir(bus->bus_name, fotg210_debug_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) fotg210->debug_dir = root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) debugfs_create_file("async", S_IRUGO, root, bus, &debug_async_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) debugfs_create_file("periodic", S_IRUGO, root, bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) &debug_periodic_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) debugfs_create_file("registers", S_IRUGO, root, bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) &debug_registers_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static inline void remove_debug_files(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) debugfs_remove_recursive(fotg210->debug_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* handshake - spin reading hc until handshake completes or fails
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * @ptr: address of hc register to be read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) * @mask: bits to look at in result of read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * @done: value of those bits when handshake succeeds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * @usec: timeout in microseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * Returns negative errno, or zero on success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * Success happens when the "mask" bits have the specified value (hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) * handshake done). There are two failure modes: "usec" have passed (major
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * hardware flakeout), or the register reads as all-ones (hardware removed).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) * That last failure should_only happen in cases like physical cardbus eject
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) * before driver shutdown. But it also seems to be caused by bugs in cardbus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) * bridge shutdown: shutting down the bridge before the devices using it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) static int handshake(struct fotg210_hcd *fotg210, void __iomem *ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) u32 mask, u32 done, int usec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) u32 result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) ret = readl_poll_timeout_atomic(ptr, result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) ((result & mask) == done ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) result == U32_MAX), 1, usec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (result == U32_MAX) /* card removed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) /* Force HC to halt state from unknown (EHCI spec section 2.3).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) * Must be called with interrupts enabled and the lock not held.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static int fotg210_halt(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) spin_lock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /* disable any irqs left enabled by previous code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) fotg210_writel(fotg210, 0, &fotg210->regs->intr_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) * This routine gets called during probe before fotg210->command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) * has been initialized, so we can't rely on its value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) fotg210->command &= ~CMD_RUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) temp = fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) temp &= ~(CMD_RUN | CMD_IAAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) fotg210_writel(fotg210, temp, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) spin_unlock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) synchronize_irq(fotg210_to_hcd(fotg210)->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) return handshake(fotg210, &fotg210->regs->status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) STS_HALT, STS_HALT, 16 * 125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) /* Reset a non-running (STS_HALT == 1) controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) * Must be called with interrupts enabled and the lock not held.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) static int fotg210_reset(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) u32 command = fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) /* If the EHCI debug controller is active, special care must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) * taken before and after a host controller reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if (fotg210->debug && !dbgp_reset_prep(fotg210_to_hcd(fotg210)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) fotg210->debug = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) command |= CMD_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) dbg_cmd(fotg210, "reset", command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) fotg210_writel(fotg210, command, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) fotg210->rh_state = FOTG210_RH_HALTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) fotg210->next_statechange = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) retval = handshake(fotg210, &fotg210->regs->command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) CMD_RESET, 0, 250 * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) if (fotg210->debug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) dbgp_external_startup(fotg210_to_hcd(fotg210));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) fotg210->port_c_suspend = fotg210->suspended_ports =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) fotg210->resuming_ports = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) /* Idle the controller (turn off the schedules).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) * Must be called with interrupts enabled and the lock not held.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) static void fotg210_quiesce(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (fotg210->rh_state != FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) /* wait for any schedule enables/disables to take effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) temp = (fotg210->command << 10) & (STS_ASS | STS_PSS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) handshake(fotg210, &fotg210->regs->status, STS_ASS | STS_PSS, temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) 16 * 125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) /* then disable anything that's still active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) spin_lock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) fotg210->command &= ~(CMD_ASE | CMD_PSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) spin_unlock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) /* hardware can take 16 microframes to turn off ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) handshake(fotg210, &fotg210->regs->status, STS_ASS | STS_PSS, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) 16 * 125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static void end_unlink_async(struct fotg210_hcd *fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) static void unlink_empty_async(struct fotg210_hcd *fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) static void fotg210_work(struct fotg210_hcd *fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static void start_unlink_intr(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) struct fotg210_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static void end_unlink_intr(struct fotg210_hcd *fotg210, struct fotg210_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /* Set a bit in the USBCMD register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) static void fotg210_set_command_bit(struct fotg210_hcd *fotg210, u32 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) fotg210->command |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) /* unblock posted write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) /* Clear a bit in the USBCMD register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) static void fotg210_clear_command_bit(struct fotg210_hcd *fotg210, u32 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) fotg210->command &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) /* unblock posted write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) /* EHCI timer support... Now using hrtimers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) * Lots of different events are triggered from fotg210->hrtimer. Whenever
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * the timer routine runs, it checks each possible event; events that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * currently enabled and whose expiration time has passed get handled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * The set of enabled events is stored as a collection of bitflags in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * fotg210->enabled_hrtimer_events, and they are numbered in order of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * increasing delay values (ranging between 1 ms and 100 ms).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * Rather than implementing a sorted list or tree of all pending events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * we keep track only of the lowest-numbered pending event, in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * expiration time is set to the timeout value for this event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * As a result, events might not get handled right away; the actual delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) * could be anywhere up to twice the requested delay. This doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) * matter, because none of the events are especially time-critical. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * ones that matter most all have a delay of 1 ms, so they will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) * handled after 2 ms at most, which is okay. In addition to this, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) * allow for an expiration range of 1 ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) /* Delay lengths for the hrtimer event types.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * Keep this list sorted by delay length, in the same order as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) static unsigned event_delays_ns[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 1 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_POLL_ASS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 1 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_POLL_PSS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) 1 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_POLL_DEAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 1125 * NSEC_PER_USEC, /* FOTG210_HRTIMER_UNLINK_INTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) 2 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_FREE_ITDS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) 6 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_ASYNC_UNLINKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) 10 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_IAA_WATCHDOG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) 10 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_DISABLE_PERIODIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 15 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_DISABLE_ASYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 100 * NSEC_PER_MSEC, /* FOTG210_HRTIMER_IO_WATCHDOG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) /* Enable a pending hrtimer event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) static void fotg210_enable_event(struct fotg210_hcd *fotg210, unsigned event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) bool resched)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) ktime_t *timeout = &fotg210->hr_timeouts[event];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) if (resched)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) *timeout = ktime_add(ktime_get(), event_delays_ns[event]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) fotg210->enabled_hrtimer_events |= (1 << event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) /* Track only the lowest-numbered pending event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (event < fotg210->next_hrtimer_event) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) fotg210->next_hrtimer_event = event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) hrtimer_start_range_ns(&fotg210->hrtimer, *timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) NSEC_PER_MSEC, HRTIMER_MODE_ABS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static void fotg210_poll_ASS(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) unsigned actual, want;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) /* Don't enable anything if the controller isn't running (e.g., died) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) if (fotg210->rh_state != FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) want = (fotg210->command & CMD_ASE) ? STS_ASS : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) actual = fotg210_readl(fotg210, &fotg210->regs->status) & STS_ASS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) if (want != actual) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) /* Poll again later, but give up after about 20 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (fotg210->ASS_poll_count++ < 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) fotg210_enable_event(fotg210, FOTG210_HRTIMER_POLL_ASS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) fotg210_dbg(fotg210, "Waited too long for the async schedule status (%x/%x), giving up\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) want, actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) fotg210->ASS_poll_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) /* The status is up-to-date; restart or stop the schedule as needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) if (want == 0) { /* Stopped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (fotg210->async_count > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) fotg210_set_command_bit(fotg210, CMD_ASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) } else { /* Running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) if (fotg210->async_count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) /* Turn off the schedule after a while */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) fotg210_enable_event(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) FOTG210_HRTIMER_DISABLE_ASYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) /* Turn off the async schedule after a brief delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) static void fotg210_disable_ASE(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) fotg210_clear_command_bit(fotg210, CMD_ASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) static void fotg210_poll_PSS(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) unsigned actual, want;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) /* Don't do anything if the controller isn't running (e.g., died) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) if (fotg210->rh_state != FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) want = (fotg210->command & CMD_PSE) ? STS_PSS : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) actual = fotg210_readl(fotg210, &fotg210->regs->status) & STS_PSS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) if (want != actual) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) /* Poll again later, but give up after about 20 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) if (fotg210->PSS_poll_count++ < 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) fotg210_enable_event(fotg210, FOTG210_HRTIMER_POLL_PSS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) fotg210_dbg(fotg210, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) want, actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) fotg210->PSS_poll_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) /* The status is up-to-date; restart or stop the schedule as needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) if (want == 0) { /* Stopped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (fotg210->periodic_count > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) fotg210_set_command_bit(fotg210, CMD_PSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) } else { /* Running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) if (fotg210->periodic_count == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) /* Turn off the schedule after a while */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) fotg210_enable_event(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) FOTG210_HRTIMER_DISABLE_PERIODIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) /* Turn off the periodic schedule after a brief delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) static void fotg210_disable_PSE(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) fotg210_clear_command_bit(fotg210, CMD_PSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) /* Poll the STS_HALT status bit; see when a dead controller stops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static void fotg210_handle_controller_death(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if (!(fotg210_readl(fotg210, &fotg210->regs->status) & STS_HALT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) /* Give up after a few milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) if (fotg210->died_poll_count++ < 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) /* Try again later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) fotg210_enable_event(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) FOTG210_HRTIMER_POLL_DEAD, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) fotg210_warn(fotg210, "Waited too long for the controller to stop, giving up\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) /* Clean up the mess */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) fotg210->rh_state = FOTG210_RH_HALTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) fotg210_writel(fotg210, 0, &fotg210->regs->intr_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) fotg210_work(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) end_unlink_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) /* Not in process context, so don't try to reset the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) /* Handle unlinked interrupt QHs once they are gone from the hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) static void fotg210_handle_intr_unlinks(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) bool stopped = (fotg210->rh_state < FOTG210_RH_RUNNING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) * Process all the QHs on the intr_unlink list that were added
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * before the current unlink cycle began. The list is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) * temporal order, so stop when we reach the first entry in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) * current cycle. But if the root hub isn't running then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) * process all the QHs on the list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) fotg210->intr_unlinking = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) while (fotg210->intr_unlink) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) struct fotg210_qh *qh = fotg210->intr_unlink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) if (!stopped && qh->unlink_cycle == fotg210->intr_unlink_cycle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) fotg210->intr_unlink = qh->unlink_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) qh->unlink_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) end_unlink_intr(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) /* Handle remaining entries later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) if (fotg210->intr_unlink) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) fotg210_enable_event(fotg210, FOTG210_HRTIMER_UNLINK_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) ++fotg210->intr_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) fotg210->intr_unlinking = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /* Start another free-iTDs/siTDs cycle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) static void start_free_itds(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) if (!(fotg210->enabled_hrtimer_events &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) BIT(FOTG210_HRTIMER_FREE_ITDS))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) fotg210->last_itd_to_free = list_entry(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) fotg210->cached_itd_list.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) struct fotg210_itd, itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) fotg210_enable_event(fotg210, FOTG210_HRTIMER_FREE_ITDS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) /* Wait for controller to stop using old iTDs and siTDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) static void end_free_itds(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) struct fotg210_itd *itd, *n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) if (fotg210->rh_state < FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) fotg210->last_itd_to_free = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) list_for_each_entry_safe(itd, n, &fotg210->cached_itd_list, itd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) list_del(&itd->itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) dma_pool_free(fotg210->itd_pool, itd, itd->itd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) if (itd == fotg210->last_itd_to_free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) if (!list_empty(&fotg210->cached_itd_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) start_free_itds(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) /* Handle lost (or very late) IAA interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) static void fotg210_iaa_watchdog(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) if (fotg210->rh_state != FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) * Lost IAA irqs wedge things badly; seen first with a vt8235.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) * So we need this watchdog, but must protect it against both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) * (a) SMP races against real IAA firing and retriggering, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) * (b) clean HC shutdown, when IAA watchdog was pending.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) if (fotg210->async_iaa) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) u32 cmd, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) /* If we get here, IAA is *REALLY* late. It's barely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) * conceivable that the system is so busy that CMD_IAAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) * is still legitimately set, so let's be sure it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) * clear before we read STS_IAA. (The HC should clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) * CMD_IAAD when it sets STS_IAA.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) cmd = fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) * If IAA is set here it either legitimately triggered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) * after the watchdog timer expired (_way_ late, so we'll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) * still count it as lost) ... or a silicon erratum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) * - VIA seems to set IAA without triggering the IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) * - IAAD potentially cleared without setting IAA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) status = fotg210_readl(fotg210, &fotg210->regs->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) INCR(fotg210->stats.lost_iaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) fotg210_writel(fotg210, STS_IAA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) &fotg210->regs->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) fotg210_dbg(fotg210, "IAA watchdog: status %x cmd %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) status, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) end_unlink_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) /* Enable the I/O watchdog, if appropriate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) static void turn_on_io_watchdog(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) /* Not needed if the controller isn't running or it's already enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (fotg210->rh_state != FOTG210_RH_RUNNING ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) (fotg210->enabled_hrtimer_events &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) BIT(FOTG210_HRTIMER_IO_WATCHDOG)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) * Isochronous transfers always need the watchdog.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) * For other sorts we use it only if the flag is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) if (fotg210->isoc_count > 0 || (fotg210->need_io_watchdog &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) fotg210->async_count + fotg210->intr_count > 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) fotg210_enable_event(fotg210, FOTG210_HRTIMER_IO_WATCHDOG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) /* Handler functions for the hrtimer event types.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) * Keep this array in the same order as the event types indexed by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) * enum fotg210_hrtimer_event in fotg210.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) static void (*event_handlers[])(struct fotg210_hcd *) = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) fotg210_poll_ASS, /* FOTG210_HRTIMER_POLL_ASS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) fotg210_poll_PSS, /* FOTG210_HRTIMER_POLL_PSS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) fotg210_handle_controller_death, /* FOTG210_HRTIMER_POLL_DEAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) fotg210_handle_intr_unlinks, /* FOTG210_HRTIMER_UNLINK_INTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) end_free_itds, /* FOTG210_HRTIMER_FREE_ITDS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) unlink_empty_async, /* FOTG210_HRTIMER_ASYNC_UNLINKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) fotg210_iaa_watchdog, /* FOTG210_HRTIMER_IAA_WATCHDOG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) fotg210_disable_PSE, /* FOTG210_HRTIMER_DISABLE_PERIODIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) fotg210_disable_ASE, /* FOTG210_HRTIMER_DISABLE_ASYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) fotg210_work, /* FOTG210_HRTIMER_IO_WATCHDOG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) static enum hrtimer_restart fotg210_hrtimer_func(struct hrtimer *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) struct fotg210_hcd *fotg210 =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) container_of(t, struct fotg210_hcd, hrtimer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) ktime_t now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) unsigned long events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) unsigned e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) events = fotg210->enabled_hrtimer_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) fotg210->enabled_hrtimer_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) fotg210->next_hrtimer_event = FOTG210_HRTIMER_NO_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) * Check each pending event. If its time has expired, handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) * the event; otherwise re-enable it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) now = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) for_each_set_bit(e, &events, FOTG210_HRTIMER_NUM_EVENTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) if (ktime_compare(now, fotg210->hr_timeouts[e]) >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) event_handlers[e](fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) fotg210_enable_event(fotg210, e, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) return HRTIMER_NORESTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) #define fotg210_bus_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) #define fotg210_bus_resume NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) static int check_reset_complete(struct fotg210_hcd *fotg210, int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) u32 __iomem *status_reg, int port_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) if (!(port_status & PORT_CONNECT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) return port_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) /* if reset finished and it's still not enabled -- handoff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) if (!(port_status & PORT_PE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) /* with integrated TT, there's nobody to hand it to! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) fotg210_dbg(fotg210, "Failed to enable port %d on root hub TT\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) index + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) fotg210_dbg(fotg210, "port %d reset complete, port enabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) index + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) return port_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /* build "status change" packet (one or two bytes) from HC registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) static int fotg210_hub_status_data(struct usb_hcd *hcd, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) u32 temp, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) /* init status to no-changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) buf[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) /* Inform the core about resumes-in-progress by returning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) * a non-zero value even if there are no status changes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) status = fotg210->resuming_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) mask = PORT_CSC | PORT_PEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) /* no hub change reports (bit 0) for now (power, ...) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) /* port N changes (bit N)? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) temp = fotg210_readl(fotg210, &fotg210->regs->port_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) * Return status information even for ports with OWNER set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) * Otherwise hub_wq wouldn't see the disconnect event when a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) * high-speed device is switched over to the companion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) * controller by the user.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) if ((temp & mask) != 0 || test_bit(0, &fotg210->port_c_suspend) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) (fotg210->reset_done[0] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) time_after_eq(jiffies, fotg210->reset_done[0]))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) buf[0] |= 1 << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) status = STS_PCD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) /* FIXME autosuspend idle root hubs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) return status ? retval : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) static void fotg210_hub_descriptor(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) struct usb_hub_descriptor *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) int ports = HCS_N_PORTS(fotg210->hcs_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) u16 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) desc->bDescriptorType = USB_DT_HUB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) desc->bPwrOn2PwrGood = 10; /* fotg210 1.0, 2.3.9 says 20ms max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) desc->bHubContrCurrent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) desc->bNbrPorts = ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) temp = 1 + (ports / 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) desc->bDescLength = 7 + 2 * temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) temp |= HUB_CHAR_NO_LPSM; /* no power switching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) desc->wHubCharacteristics = cpu_to_le16(temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) static int fotg210_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) u16 wIndex, char *buf, u16 wLength)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) int ports = HCS_N_PORTS(fotg210->hcs_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) u32 __iomem *status_reg = &fotg210->regs->port_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) u32 temp, temp1, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) unsigned selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) * HCS_INDICATOR may say we can change LEDs to off/amber/green.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) * (track current state ourselves) ... blink for diagnostics,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) * power, "this is the one", etc. EHCI spec supports this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) switch (typeReq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) case ClearHubFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) case C_HUB_LOCAL_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) case C_HUB_OVER_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) /* no hub-wide feature/status flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) case ClearPortFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) if (!wIndex || wIndex > ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) wIndex--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) temp = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) temp &= ~PORT_RWC_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) * Even if OWNER is set, so the port is owned by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) * companion controller, hub_wq needs to be able to clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) * the port-change status bits (especially
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) * USB_PORT_STAT_C_CONNECTION).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) case USB_PORT_FEAT_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) fotg210_writel(fotg210, temp & ~PORT_PE, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) case USB_PORT_FEAT_C_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) fotg210_writel(fotg210, temp | PORT_PEC, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) case USB_PORT_FEAT_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) if (temp & PORT_RESET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) if (!(temp & PORT_SUSPEND))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) if ((temp & PORT_PE) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) /* resume signaling for 20 msec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) fotg210_writel(fotg210, temp | PORT_RESUME, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) fotg210->reset_done[wIndex] = jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) + msecs_to_jiffies(USB_RESUME_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) case USB_PORT_FEAT_C_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) clear_bit(wIndex, &fotg210->port_c_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) case USB_PORT_FEAT_C_CONNECTION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) fotg210_writel(fotg210, temp | PORT_CSC, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) case USB_PORT_FEAT_C_OVER_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) fotg210_writel(fotg210, temp | OTGISR_OVC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) &fotg210->regs->otgisr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) case USB_PORT_FEAT_C_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) /* GetPortStatus clears reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) case GetHubDescriptor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) fotg210_hub_descriptor(fotg210, (struct usb_hub_descriptor *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) case GetHubStatus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) /* no hub-wide feature/status flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) memset(buf, 0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) /*cpu_to_le32s ((u32 *) buf); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) case GetPortStatus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) if (!wIndex || wIndex > ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) wIndex--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) temp = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) /* wPortChange bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) if (temp & PORT_CSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) status |= USB_PORT_STAT_C_CONNECTION << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) if (temp & PORT_PEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) status |= USB_PORT_STAT_C_ENABLE << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) temp1 = fotg210_readl(fotg210, &fotg210->regs->otgisr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) if (temp1 & OTGISR_OVC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) status |= USB_PORT_STAT_C_OVERCURRENT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) /* whoever resumes must GetPortStatus to complete it!! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) if (temp & PORT_RESUME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) /* Remote Wakeup received? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) if (!fotg210->reset_done[wIndex]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) /* resume signaling for 20 msec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) fotg210->reset_done[wIndex] = jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) + msecs_to_jiffies(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) /* check the port again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) mod_timer(&fotg210_to_hcd(fotg210)->rh_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) fotg210->reset_done[wIndex]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) /* resume completed? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) else if (time_after_eq(jiffies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) fotg210->reset_done[wIndex])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) clear_bit(wIndex, &fotg210->suspended_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) set_bit(wIndex, &fotg210->port_c_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) fotg210->reset_done[wIndex] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) /* stop resume signaling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) temp = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) fotg210_writel(fotg210, temp &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) ~(PORT_RWC_BITS | PORT_RESUME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) clear_bit(wIndex, &fotg210->resuming_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) retval = handshake(fotg210, status_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) PORT_RESUME, 0, 2000);/* 2ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) if (retval != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) fotg210_err(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) "port %d resume error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) wIndex + 1, retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) /* whoever resets must GetPortStatus to complete it!! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) if ((temp & PORT_RESET) && time_after_eq(jiffies,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) fotg210->reset_done[wIndex])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) status |= USB_PORT_STAT_C_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) fotg210->reset_done[wIndex] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) clear_bit(wIndex, &fotg210->resuming_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) /* force reset to complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) fotg210_writel(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) temp & ~(PORT_RWC_BITS | PORT_RESET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) /* REVISIT: some hardware needs 550+ usec to clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) * this bit; seems too long to spin routinely...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) retval = handshake(fotg210, status_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) PORT_RESET, 0, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) if (retval != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) fotg210_err(fotg210, "port %d reset error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) wIndex + 1, retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) /* see what we found out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) temp = check_reset_complete(fotg210, wIndex, status_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) fotg210_readl(fotg210, status_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) /* restart schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) fotg210->command |= CMD_RUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) if (!(temp & (PORT_RESUME|PORT_RESET))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) fotg210->reset_done[wIndex] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) clear_bit(wIndex, &fotg210->resuming_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) /* transfer dedicated ports to the companion hc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) if ((temp & PORT_CONNECT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) test_bit(wIndex, &fotg210->companion_ports)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) temp &= ~PORT_RWC_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) fotg210_writel(fotg210, temp, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) fotg210_dbg(fotg210, "port %d --> companion\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) wIndex + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) temp = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) * Even if OWNER is set, there's no harm letting hub_wq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) * see the wPortStatus values (they should all be 0 except
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) * for PORT_POWER anyway).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) if (temp & PORT_CONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) status |= USB_PORT_STAT_CONNECTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) status |= fotg210_port_speed(fotg210, temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) if (temp & PORT_PE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) status |= USB_PORT_STAT_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) /* maybe the port was unsuspended without our knowledge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) if (temp & (PORT_SUSPEND|PORT_RESUME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) status |= USB_PORT_STAT_SUSPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) } else if (test_bit(wIndex, &fotg210->suspended_ports)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) clear_bit(wIndex, &fotg210->suspended_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) clear_bit(wIndex, &fotg210->resuming_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) fotg210->reset_done[wIndex] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) if (temp & PORT_PE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) set_bit(wIndex, &fotg210->port_c_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) temp1 = fotg210_readl(fotg210, &fotg210->regs->otgisr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) if (temp1 & OTGISR_OVC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) status |= USB_PORT_STAT_OVERCURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) if (temp & PORT_RESET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) status |= USB_PORT_STAT_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) if (test_bit(wIndex, &fotg210->port_c_suspend))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) status |= USB_PORT_STAT_C_SUSPEND << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) if (status & ~0xffff) /* only if wPortChange is interesting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) dbg_port(fotg210, "GetStatus", wIndex + 1, temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) put_unaligned_le32(status, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) case SetHubFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) case C_HUB_LOCAL_POWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) case C_HUB_OVER_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) /* no hub-wide feature/status flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) case SetPortFeature:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) selector = wIndex >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) wIndex &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) if (!wIndex || wIndex > ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) wIndex--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) temp = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) temp &= ~PORT_RWC_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) switch (wValue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) case USB_PORT_FEAT_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) if ((temp & PORT_PE) == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) || (temp & PORT_RESET) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) /* After above check the port must be connected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) * Set appropriate bit thus could put phy into low power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) * mode if we have hostpc feature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) fotg210_writel(fotg210, temp | PORT_SUSPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) set_bit(wIndex, &fotg210->suspended_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) case USB_PORT_FEAT_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) if (temp & PORT_RESUME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) /* line status bits may report this as low speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) * which can be fine if this root hub has a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) * transaction translator built in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) fotg210_dbg(fotg210, "port %d reset\n", wIndex + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) temp |= PORT_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) temp &= ~PORT_PE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) * caller must wait, then call GetPortStatus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) * usb 2.0 spec says 50 ms resets on root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) fotg210->reset_done[wIndex] = jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) + msecs_to_jiffies(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) fotg210_writel(fotg210, temp, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) /* For downstream facing ports (these): one hub port is put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) * into test mode according to USB2 11.24.2.13, then the hub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) * must be reset (which for root hub now means rmmod+modprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) * or else system reboot). See EHCI 2.3.9 and 4.14 for info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) * about the EHCI-specific stuff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) case USB_PORT_FEAT_TEST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) if (!selector || selector > 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) fotg210_quiesce(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) /* Put all enabled ports into suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) temp = fotg210_readl(fotg210, status_reg) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) ~PORT_RWC_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) if (temp & PORT_PE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) fotg210_writel(fotg210, temp | PORT_SUSPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) fotg210_halt(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) temp = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) temp |= selector << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) fotg210_writel(fotg210, temp, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) /* "stall" on error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) retval = -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) static void __maybe_unused fotg210_relinquish_port(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) int portnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) static int __maybe_unused fotg210_port_handed_over(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) int portnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) /* There's basically three types of memory:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) * - data used only by the HCD ... kmalloc is fine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) * - async and periodic schedules, shared by HC and HCD ... these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) * need to use dma_pool or dma_alloc_coherent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) * - driver buffers, read/written by HC ... single shot DMA mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) * No memory seen by this driver is pageable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) /* Allocate the key transfer structures from the previously allocated pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) static inline void fotg210_qtd_init(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) struct fotg210_qtd *qtd, dma_addr_t dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) memset(qtd, 0, sizeof(*qtd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) qtd->qtd_dma = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) qtd->hw_token = cpu_to_hc32(fotg210, QTD_STS_HALT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) qtd->hw_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) qtd->hw_alt_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) INIT_LIST_HEAD(&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) static struct fotg210_qtd *fotg210_qtd_alloc(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) struct fotg210_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) qtd = dma_pool_alloc(fotg210->qtd_pool, flags, &dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) if (qtd != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) fotg210_qtd_init(fotg210, qtd, dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) return qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) static inline void fotg210_qtd_free(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) struct fotg210_qtd *qtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) dma_pool_free(fotg210->qtd_pool, qtd, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) static void qh_destroy(struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) /* clean qtds first, and know this is not linked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) fotg210_dbg(fotg210, "unused qh not empty!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) if (qh->dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) fotg210_qtd_free(fotg210, qh->dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) dma_pool_free(fotg210->qh_pool, qh->hw, qh->qh_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) kfree(qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) static struct fotg210_qh *fotg210_qh_alloc(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) qh = kzalloc(sizeof(*qh), GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) if (!qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) qh->hw = dma_pool_zalloc(fotg210->qh_pool, flags, &dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) if (!qh->hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) qh->qh_dma = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) INIT_LIST_HEAD(&qh->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) /* dummy td enables safe urb queuing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) qh->dummy = fotg210_qtd_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) if (qh->dummy == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) fotg210_dbg(fotg210, "no dummy td\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) goto fail1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) fail1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) dma_pool_free(fotg210->qh_pool, qh->hw, qh->qh_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) kfree(qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) /* The queue heads and transfer descriptors are managed from pools tied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) * to each of the "per device" structures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) * This is the initialisation and cleanup code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) static void fotg210_mem_cleanup(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) if (fotg210->async)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) qh_destroy(fotg210, fotg210->async);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) fotg210->async = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) if (fotg210->dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) qh_destroy(fotg210, fotg210->dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) fotg210->dummy = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) /* DMA consistent memory and pools */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) dma_pool_destroy(fotg210->qtd_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) fotg210->qtd_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) dma_pool_destroy(fotg210->qh_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) fotg210->qh_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) dma_pool_destroy(fotg210->itd_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) fotg210->itd_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) if (fotg210->periodic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) dma_free_coherent(fotg210_to_hcd(fotg210)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) fotg210->periodic_size * sizeof(u32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) fotg210->periodic, fotg210->periodic_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) fotg210->periodic = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) /* shadow periodic table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) kfree(fotg210->pshadow);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) fotg210->pshadow = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) /* remember to add cleanup code (above) if you add anything here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) static int fotg210_mem_init(struct fotg210_hcd *fotg210, gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) /* QTDs for control/bulk/intr transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) fotg210->qtd_pool = dma_pool_create("fotg210_qtd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) fotg210_to_hcd(fotg210)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) sizeof(struct fotg210_qtd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) 32 /* byte alignment (for hw parts) */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) 4096 /* can't cross 4K */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) if (!fotg210->qtd_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) /* QHs for control/bulk/intr transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) fotg210->qh_pool = dma_pool_create("fotg210_qh",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) fotg210_to_hcd(fotg210)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) sizeof(struct fotg210_qh_hw),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) 32 /* byte alignment (for hw parts) */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) 4096 /* can't cross 4K */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) if (!fotg210->qh_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) fotg210->async = fotg210_qh_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) if (!fotg210->async)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) /* ITD for high speed ISO transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) fotg210->itd_pool = dma_pool_create("fotg210_itd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) fotg210_to_hcd(fotg210)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) sizeof(struct fotg210_itd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) 64 /* byte alignment (for hw parts) */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) 4096 /* can't cross 4K */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) if (!fotg210->itd_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) /* Hardware periodic table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) fotg210->periodic = (__le32 *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) dma_alloc_coherent(fotg210_to_hcd(fotg210)->self.controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) fotg210->periodic_size * sizeof(__le32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) &fotg210->periodic_dma, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) if (fotg210->periodic == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) for (i = 0; i < fotg210->periodic_size; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) fotg210->periodic[i] = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) /* software shadow of hardware table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) fotg210->pshadow = kcalloc(fotg210->periodic_size, sizeof(void *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) if (fotg210->pshadow != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) fotg210_dbg(fotg210, "couldn't init memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) fotg210_mem_cleanup(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) * buffers needed for the larger number). We use one QH per endpoint, queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) * multiple urbs (all three types) per endpoint. URBs may need several qtds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) * ISO traffic uses "ISO TD" (itd) records, and (along with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) * interrupts) needs careful scheduling. Performance improvements can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) * an ongoing challenge. That's in "ehci-sched.c".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) * (b) special fields in qh entries or (c) split iso entries. TTs will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) * buffer low/full speed data so the host collects it at high speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) /* fill a qtd, returning how much of the buffer we were able to queue up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) static int qtd_fill(struct fotg210_hcd *fotg210, struct fotg210_qtd *qtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) dma_addr_t buf, size_t len, int token, int maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) int i, count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) u64 addr = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) /* one buffer entry per 4K ... first might be short or unaligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) qtd->hw_buf[0] = cpu_to_hc32(fotg210, (u32)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) qtd->hw_buf_hi[0] = cpu_to_hc32(fotg210, (u32)(addr >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) count = 0x1000 - (buf & 0x0fff); /* rest of that page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) if (likely(len < count)) /* ... iff needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) count = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) buf += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) buf &= ~0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) /* per-qtd limit: from 16K to 20K (best alignment) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) for (i = 1; count < len && i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) addr = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) qtd->hw_buf[i] = cpu_to_hc32(fotg210, (u32)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) qtd->hw_buf_hi[i] = cpu_to_hc32(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) (u32)(addr >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) buf += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) if ((count + 0x1000) < len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) count += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) count = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) /* short packets may only terminate transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) if (count != len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) count -= (count % maxpacket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) qtd->hw_token = cpu_to_hc32(fotg210, (count << 16) | token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) qtd->length = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) static inline void qh_update(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) struct fotg210_qh *qh, struct fotg210_qtd *qtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) struct fotg210_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) /* writes to an active overlay are unsafe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) BUG_ON(qh->qh_state != QH_STATE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) hw->hw_qtd_next = QTD_NEXT(fotg210, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) hw->hw_alt_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) /* Except for control endpoints, we make hardware maintain data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) * and set the pseudo-toggle in udev. Only usb_clear_halt() will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) * ever clear it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) if (!(hw->hw_info1 & cpu_to_hc32(fotg210, QH_TOGGLE_CTL))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) unsigned is_out, epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) is_out = qh->is_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) epnum = (hc32_to_cpup(fotg210, &hw->hw_info1) >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) hw->hw_token &= ~cpu_to_hc32(fotg210, QTD_TOGGLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) usb_settoggle(qh->dev, epnum, is_out, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) hw->hw_token &= cpu_to_hc32(fotg210, QTD_TOGGLE | QTD_STS_PING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) /* if it weren't for a common silicon quirk (writing the dummy into the qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) * recovery (including urb dequeue) would need software changes to a QH...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) static void qh_refresh(struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) struct fotg210_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) if (list_empty(&qh->qtd_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) qtd = qh->dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) qtd = list_entry(qh->qtd_list.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) struct fotg210_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) * first qtd may already be partially processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) * If we come here during unlink, the QH overlay region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) * might have reference to the just unlinked qtd. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) * qtd is updated in qh_completions(). Update the QH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) * overlay here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) if (cpu_to_hc32(fotg210, qtd->qtd_dma) == qh->hw->hw_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) qh->hw->hw_qtd_next = qtd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) qtd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) if (qtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) qh_update(fotg210, qh, qtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) static void qh_link_async(struct fotg210_hcd *fotg210, struct fotg210_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) static void fotg210_clear_tt_buffer_complete(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) struct fotg210_qh *qh = ep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) qh->clearing_tt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) && fotg210->rh_state == FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) qh_link_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) static void fotg210_clear_tt_buffer(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) struct fotg210_qh *qh, struct urb *urb, u32 token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) /* If an async split transaction gets an error or is unlinked,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) * the TT buffer may be left in an indeterminate state. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) * have to clear the TT buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) * Note: this routine is never called for Isochronous transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) struct usb_device *tt = urb->dev->tt->hub;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) dev_dbg(&tt->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) "clear tt buffer port %d, a%d ep%d t%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) urb->dev->ttport, urb->dev->devnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) usb_pipeendpoint(urb->pipe), token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) if (urb->dev->tt->hub !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) fotg210_to_hcd(fotg210)->self.root_hub) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) if (usb_hub_clear_tt_buffer(urb) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) qh->clearing_tt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) static int qtd_copy_status(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) size_t length, u32 token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) int status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) /* count IN/OUT bytes, not SETUP (even short packets) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) if (likely(QTD_PID(token) != 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) urb->actual_length += length - QTD_LENGTH(token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) /* don't modify error codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) if (unlikely(urb->unlinked))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) /* force cleanup after short read; not always an error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) if (unlikely(IS_SHORT_READ(token)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) status = -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) /* serious "can't proceed" faults reported by the hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) if (token & QTD_STS_HALT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) if (token & QTD_STS_BABBLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) /* FIXME "must" disable babbling device's port too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) status = -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) /* CERR nonzero + halt --> stall */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) } else if (QTD_CERR(token)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) status = -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) /* In theory, more than one of the following bits can be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) * since they are sticky and the transaction is retried.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) * Which to test first is rather arbitrary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) } else if (token & QTD_STS_MMF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) /* fs/ls interrupt xfer missed the complete-split */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) } else if (token & QTD_STS_DBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) status = (QTD_PID(token) == 1) /* IN ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) ? -ENOSR /* hc couldn't read data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) : -ECOMM; /* hc couldn't write data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) } else if (token & QTD_STS_XACT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) /* timeout, bad CRC, wrong PID, etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) fotg210_dbg(fotg210, "devpath %s ep%d%s 3strikes\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) urb->dev->devpath,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) usb_pipeendpoint(urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) usb_pipein(urb->pipe) ? "in" : "out");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) } else { /* unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) "dev%d ep%d%s qtd token %08x --> status %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) usb_pipedevice(urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) usb_pipeendpoint(urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) usb_pipein(urb->pipe) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) token, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) static void fotg210_urb_done(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) __releases(fotg210->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) __acquires(fotg210->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) if (likely(urb->hcpriv != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) struct fotg210_qh *qh = (struct fotg210_qh *) urb->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) /* S-mask in a QH means it's an interrupt urb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) if ((qh->hw->hw_info2 & cpu_to_hc32(fotg210, QH_SMASK)) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) /* ... update hc-wide periodic stats (for usbfs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) fotg210_to_hcd(fotg210)->self.bandwidth_int_reqs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) if (unlikely(urb->unlinked)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) INCR(fotg210->stats.unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) /* report non-error and short read status as zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) if (status == -EINPROGRESS || status == -EREMOTEIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) INCR(fotg210->stats.complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) #ifdef FOTG210_URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) "%s %s urb %p ep%d%s status %d len %d/%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) __func__, urb->dev->devpath, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) usb_pipeendpoint(urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) usb_pipein(urb->pipe) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) urb->actual_length, urb->transfer_buffer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) /* complete() can reenter this HCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) usb_hcd_unlink_urb_from_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) spin_unlock(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) usb_hcd_giveback_urb(fotg210_to_hcd(fotg210), urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) spin_lock(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) static int qh_schedule(struct fotg210_hcd *fotg210, struct fotg210_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) /* Process and free completed qtds for a qh, returning URBs to drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) * Chases up to qh->hw_current. Returns number of completions called,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) * indicating how much "real" work we did.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) static unsigned qh_completions(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) struct fotg210_qtd *last, *end = qh->dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) struct fotg210_qtd *qtd, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) int last_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) int stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) unsigned count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) u8 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) struct fotg210_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) if (unlikely(list_empty(&qh->qtd_list)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) /* completions (or tasks on other cpus) must never clobber HALT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) * till we've gone through and cleaned everything up, even when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) * they add urbs to this qh's queue or mark them for unlinking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) * NOTE: unlinking expects to be done in queue order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) * It's a bug for qh->qh_state to be anything other than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) * QH_STATE_IDLE, unless our caller is scan_async() or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) * scan_intr().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) state = qh->qh_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) qh->qh_state = QH_STATE_COMPLETING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) stopped = (state == QH_STATE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) rescan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) last = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) last_status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) qh->needs_rescan = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) /* remove de-activated QTDs from front of queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) * after faults (including short reads), cleanup this urb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) * then let the queue advance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) * if queue is stopped, handles unlinks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) u32 token = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) urb = qtd->urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) /* clean up any state from previous QTD ...*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) if (last) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) if (likely(last->urb != urb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) fotg210_urb_done(fotg210, last->urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) last_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) last_status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) fotg210_qtd_free(fotg210, last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) last = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) /* ignore urbs submitted during completions we reported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) if (qtd == end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) /* hardware copies qtd out of qh overlay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) rmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) token = hc32_to_cpu(fotg210, qtd->hw_token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) /* always clean up qtds the hc de-activated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) retry_xacterr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) if ((token & QTD_STS_ACTIVE) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) /* Report Data Buffer Error: non-fatal but useful */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) if (token & QTD_STS_DBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) urb, usb_endpoint_num(&urb->ep->desc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) usb_endpoint_dir_in(&urb->ep->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) urb->transfer_buffer_length, qtd, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) /* on STALL, error, and short reads this urb must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) * complete and all its qtds must be recycled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) if ((token & QTD_STS_HALT) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) /* retry transaction errors until we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) * reach the software xacterr limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) if ((token & QTD_STS_XACT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) QTD_CERR(token) == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) ++qh->xacterrs < QH_XACTERR_MAX &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) !urb->unlinked) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) "detected XactErr len %zu/%zu retry %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) qtd->length - QTD_LENGTH(token),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) qtd->length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) qh->xacterrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) /* reset the token in the qtd and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) * qh overlay (which still contains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) * the qtd) so that we pick up from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) * where we left off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) token &= ~QTD_STS_HALT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) token |= QTD_STS_ACTIVE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) (FOTG210_TUNE_CERR << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) qtd->hw_token = cpu_to_hc32(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) hw->hw_token = cpu_to_hc32(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) goto retry_xacterr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) /* magic dummy for some short reads; qh won't advance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) * that silicon quirk can kick in with this dummy too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) * other short reads won't stop the queue, including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) * control transfers (status stage handles that) or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) * most other single-qtd reads ... the queue stops if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) * URB_SHORT_NOT_OK was set so the driver submitting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) * the urbs could clean it up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) } else if (IS_SHORT_READ(token) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) !(qtd->hw_alt_next &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) FOTG210_LIST_END(fotg210))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) /* stop scanning when we reach qtds the hc is using */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) } else if (likely(!stopped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) && fotg210->rh_state >= FOTG210_RH_RUNNING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) /* scan the whole queue for unlinks whenever it stops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) /* cancel everything if we halt, suspend, etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) if (fotg210->rh_state < FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) last_status = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) /* this qtd is active; skip it unless a previous qtd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) * for its urb faulted, or its urb was canceled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) else if (last_status == -EINPROGRESS && !urb->unlinked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) /* qh unlinked; token in overlay may be most current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) if (state == QH_STATE_IDLE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) cpu_to_hc32(fotg210, qtd->qtd_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) == hw->hw_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) token = hc32_to_cpu(fotg210, hw->hw_token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) /* An unlink may leave an incomplete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) * async transaction in the TT buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) * We have to clear it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) fotg210_clear_tt_buffer(fotg210, qh, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) /* unless we already know the urb's status, collect qtd status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) * and update count of bytes transferred. in common short read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) * cases with only one data qtd (including control transfers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) * queue processing won't halt. but with two or more qtds (for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) * example, with a 32 KB transfer), when the first qtd gets a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) * short read the second must be removed by hand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) if (last_status == -EINPROGRESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) last_status = qtd_copy_status(fotg210, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) qtd->length, token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) if (last_status == -EREMOTEIO &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) (qtd->hw_alt_next &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) FOTG210_LIST_END(fotg210)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) last_status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) /* As part of low/full-speed endpoint-halt processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) * we must clear the TT buffer (11.17.5).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) if (unlikely(last_status != -EINPROGRESS &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) last_status != -EREMOTEIO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) /* The TT's in some hubs malfunction when they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) * receive this request following a STALL (they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) * stop sending isochronous packets). Since a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) * STALL can't leave the TT buffer in a busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) * state (if you believe Figures 11-48 - 11-51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) * in the USB 2.0 spec), we won't clear the TT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) * buffer in this case. Strictly speaking this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) * is a violation of the spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) if (last_status != -EPIPE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) fotg210_clear_tt_buffer(fotg210, qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) urb, token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) /* if we're removing something not at the queue head,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) * patch the hardware queue pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) last = list_entry(qtd->qtd_list.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) struct fotg210_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) last->hw_next = qtd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) /* remove qtd; it's recycled after possible urb completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) list_del(&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) last = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) /* reinit the xacterr counter for the next qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) qh->xacterrs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) /* last urb's completion might still need calling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) if (likely(last != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) fotg210_urb_done(fotg210, last->urb, last_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) fotg210_qtd_free(fotg210, last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) /* Do we need to rescan for URBs dequeued during a giveback? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) if (unlikely(qh->needs_rescan)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) /* If the QH is already unlinked, do the rescan now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) if (state == QH_STATE_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) goto rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) /* Otherwise we have to wait until the QH is fully unlinked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) * Our caller will start an unlink if qh->needs_rescan is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) * set. But if an unlink has already started, nothing needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) * to be done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) if (state != QH_STATE_LINKED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) qh->needs_rescan = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) /* restore original state; caller must unlink or relink */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) qh->qh_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) /* be sure the hardware's done with the qh before refreshing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) * it after fault cleanup, or recovering from silicon wrongly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) * overlaying the dummy qtd (which reduces DMA chatter).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) if (stopped != 0 || hw->hw_qtd_next == FOTG210_LIST_END(fotg210)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) case QH_STATE_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) qh_refresh(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) case QH_STATE_LINKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) /* We won't refresh a QH that's linked (after the HC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) * stopped the queue). That avoids a race:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) * - HC reads first part of QH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) * - CPU updates that first part and the token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) * - HC reads rest of that QH, including token
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) * Result: HC gets an inconsistent image, and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) * DMAs to/from the wrong memory (corrupting it).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) * That should be rare for interrupt transfers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) * except maybe high bandwidth ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) /* Tell the caller to start an unlink */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) qh->needs_rescan = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) /* otherwise, unlink already started */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) /* reverse of qh_urb_transaction: free a list of TDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) * used for cleanup after errors, before HC sees an URB's TDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) static void qtd_list_free(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) struct list_head *head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) struct fotg210_qtd *qtd, *temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) list_for_each_entry_safe(qtd, temp, head, qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) list_del(&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) fotg210_qtd_free(fotg210, qtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) /* create a list of filled qtds for this URB; won't link into qh.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) static struct list_head *qh_urb_transaction(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) struct urb *urb, struct list_head *head, gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) struct fotg210_qtd *qtd, *qtd_prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) dma_addr_t buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) int len, this_sg_len, maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) int is_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) u32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) * URBs map to sequences of QTDs: one logical transaction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) qtd = fotg210_qtd_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) if (unlikely(!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) list_add_tail(&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) token = QTD_STS_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) token |= (FOTG210_TUNE_CERR << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) /* for split transactions, SplitXState initialized to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) len = urb->transfer_buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) is_input = usb_pipein(urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) if (usb_pipecontrol(urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) /* SETUP pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) qtd_fill(fotg210, qtd, urb->setup_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) sizeof(struct usb_ctrlrequest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) token | (2 /* "setup" */ << 8), 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) /* ... and always at least one more pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) token ^= QTD_TOGGLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) qtd = fotg210_qtd_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) if (unlikely(!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) qtd_prev->hw_next = QTD_NEXT(fotg210, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) list_add_tail(&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) /* for zero length DATA stages, STATUS is always IN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) if (len == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) token |= (1 /* "in" */ << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) * data transfer stage: buffer setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) i = urb->num_mapped_sgs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) if (len > 0 && i > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) sg = urb->sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) buf = sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) /* urb->transfer_buffer_length may be smaller than the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) * size of the scatterlist (or vice versa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) this_sg_len = min_t(int, sg_dma_len(sg), len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) sg = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) buf = urb->transfer_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) this_sg_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) if (is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) token |= (1 /* "in" */ << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) /* else it's already initted to "out" pid (0 << 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) maxpacket = usb_maxpacket(urb->dev, urb->pipe, !is_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) * buffer gets wrapped in one or more qtds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) * last one may be "short" (including zero len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) * and may serve as a control status ack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) int this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) this_qtd_len = qtd_fill(fotg210, qtd, buf, this_sg_len, token,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) maxpacket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) this_sg_len -= this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) len -= this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) buf += this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) * short reads advance to a "magic" dummy instead of the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) * qtd ... that forces the queue to stop, for manual cleanup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) * (this will usually be overridden later.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) if (is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) qtd->hw_alt_next = fotg210->async->hw->hw_alt_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) /* qh makes control packets use qtd toggle; maybe switch it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) token ^= QTD_TOGGLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) if (likely(this_sg_len <= 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) if (--i <= 0 || len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) sg = sg_next(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) buf = sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) this_sg_len = min_t(int, sg_dma_len(sg), len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) qtd = fotg210_qtd_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) if (unlikely(!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) qtd_prev->hw_next = QTD_NEXT(fotg210, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) list_add_tail(&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) * unless the caller requires manual cleanup after short reads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) * have the alt_next mechanism keep the queue running after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) * last data qtd (the only one, for control and most other cases).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) usb_pipecontrol(urb->pipe)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) qtd->hw_alt_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) * control requests may need a terminating data "status" ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) * other OUT ones may need a terminating short packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) * (zero length).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) if (likely(urb->transfer_buffer_length != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) int one_more = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) if (usb_pipecontrol(urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) one_more = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) token ^= 0x0100; /* "in" <--> "out" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) token |= QTD_TOGGLE; /* force DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) } else if (usb_pipeout(urb->pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) && (urb->transfer_flags & URB_ZERO_PACKET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) && !(urb->transfer_buffer_length % maxpacket)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) one_more = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) if (one_more) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) qtd = fotg210_qtd_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) if (unlikely(!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) qtd_prev->hw_next = QTD_NEXT(fotg210, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) list_add_tail(&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) /* never any data in such packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) qtd_fill(fotg210, qtd, 0, 0, token, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) /* by default, enable interrupt on urb completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) qtd->hw_token |= cpu_to_hc32(fotg210, QTD_IOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) return head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) qtd_list_free(fotg210, urb, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) /* Would be best to create all qh's from config descriptors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) * when each interface/altsetting is established. Unlink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) * any previous qh and cancel its urbs first; endpoints are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) * implicitly reset then (data toggle too).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) * That'd mean updating how usbcore talks to HCDs. (2.7?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) /* Each QH holds a qtd list; a QH is used for everything except iso.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) * For interrupt urbs, the scheduler must set the microframe scheduling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) * mask(s) each time the QH gets scheduled. For highspeed, that's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) * just one microframe in the s-mask. For split interrupt transactions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) * there are additional complications: c-mask, maybe FSTNs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) static struct fotg210_qh *qh_make(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) struct fotg210_qh *qh = fotg210_qh_alloc(fotg210, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) struct usb_host_endpoint *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) u32 info1 = 0, info2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) int is_input, type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) int maxp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) int mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) struct usb_tt *tt = urb->dev->tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) struct fotg210_qh_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) if (!qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) * init endpoint/device data for this QH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) info1 |= usb_pipeendpoint(urb->pipe) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) info1 |= usb_pipedevice(urb->pipe) << 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) is_input = usb_pipein(urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) type = usb_pipetype(urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) ep = usb_pipe_endpoint(urb->dev, urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) maxp = usb_endpoint_maxp(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) mult = usb_endpoint_maxp_mult(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) * acts like up to 3KB, but is built from smaller packets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) if (maxp > 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) fotg210_dbg(fotg210, "bogus qh maxpacket %d\n", maxp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) /* Compute interrupt scheduling parameters just once, and save.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) * - allowing for high bandwidth, how many nsec/uframe are used?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) * - split transactions need a second CSPLIT uframe; same question
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) * - splits also need a schedule gap (for full/low speed I/O)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) * - qh has a polling interval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) * For control/bulk requests, the HC or TT handles these.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) if (type == PIPE_INTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) is_input, 0, mult * maxp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) qh->start = NO_FRAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) if (urb->dev->speed == USB_SPEED_HIGH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) qh->c_usecs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) qh->gap_uf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) qh->period = urb->interval >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) if (qh->period == 0 && urb->interval != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) /* NOTE interval 2 or 4 uframes could work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) * But interval 1 scheduling is simpler, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) * includes high bandwidth.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) urb->interval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) } else if (qh->period > fotg210->periodic_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) qh->period = fotg210->periodic_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) urb->interval = qh->period << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) int think_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) /* gap is f(FS/LS transfer times) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) is_input, 0, maxp) / (125 * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) /* FIXME this just approximates SPLIT/CSPLIT times */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) if (is_input) { /* SPLIT, gap, CSPLIT+DATA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) qh->c_usecs = qh->usecs + HS_USECS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) qh->usecs = HS_USECS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) } else { /* SPLIT+DATA, gap, CSPLIT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) qh->usecs += HS_USECS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) qh->c_usecs = HS_USECS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) think_time = tt ? tt->think_time : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) qh->tt_usecs = NS_TO_US(think_time +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) usb_calc_bus_time(urb->dev->speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) is_input, 0, maxp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) qh->period = urb->interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) if (qh->period > fotg210->periodic_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) qh->period = fotg210->periodic_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) urb->interval = qh->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) /* support for tt scheduling, and access to toggles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) qh->dev = urb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) /* using TT? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) switch (urb->dev->speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) case USB_SPEED_LOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) info1 |= QH_LOW_SPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) case USB_SPEED_FULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) /* EPS 0 means "full" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) if (type != PIPE_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) info1 |= (FOTG210_TUNE_RL_TT << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) if (type == PIPE_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) info1 |= QH_CONTROL_EP; /* for TT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) info1 |= maxp << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) info2 |= (FOTG210_TUNE_MULT_TT << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) /* Some Freescale processors have an erratum in which the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) * port number in the queue head was 0..N-1 instead of 1..N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) if (fotg210_has_fsl_portno_bug(fotg210))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) info2 |= (urb->dev->ttport-1) << 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) info2 |= urb->dev->ttport << 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) /* set the address of the TT; for TDI's integrated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) * root hub tt, leave it zeroed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) if (tt && tt->hub != fotg210_to_hcd(fotg210)->self.root_hub)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) info2 |= tt->hub->devnum << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) case USB_SPEED_HIGH: /* no TT involved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) info1 |= QH_HIGH_SPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) if (type == PIPE_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) info1 |= (FOTG210_TUNE_RL_HS << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) info1 |= 64 << 16; /* usb2 fixed maxpacket */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) info2 |= (FOTG210_TUNE_MULT_HS << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) } else if (type == PIPE_BULK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) info1 |= (FOTG210_TUNE_RL_HS << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) /* The USB spec says that high speed bulk endpoints
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) * always use 512 byte maxpacket. But some device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) * vendors decided to ignore that, and MSFT is happy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) * to help them do so. So now people expect to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) * such nonconformant devices with Linux too; sigh.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) info1 |= maxp << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) info2 |= (FOTG210_TUNE_MULT_HS << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) } else { /* PIPE_INTERRUPT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) info1 |= maxp << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) info2 |= mult << 30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) fotg210_dbg(fotg210, "bogus dev %p speed %d\n", urb->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) urb->dev->speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) qh_destroy(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) /* init as live, toggle clear, advance to dummy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) qh->qh_state = QH_STATE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) hw->hw_info1 = cpu_to_hc32(fotg210, info1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) hw->hw_info2 = cpu_to_hc32(fotg210, info2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) qh->is_out = !is_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) qh_refresh(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) static void enable_async(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) if (fotg210->async_count++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) /* Stop waiting to turn off the async schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) fotg210->enabled_hrtimer_events &= ~BIT(FOTG210_HRTIMER_DISABLE_ASYNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) /* Don't start the schedule until ASS is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) fotg210_poll_ASS(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) turn_on_io_watchdog(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) static void disable_async(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) if (--fotg210->async_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) /* The async schedule and async_unlink list are supposed to be empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) WARN_ON(fotg210->async->qh_next.qh || fotg210->async_unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) /* Don't turn off the schedule until ASS is 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) fotg210_poll_ASS(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) /* move qh (and its qtds) onto async queue; maybe enable queue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) static void qh_link_async(struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) __hc32 dma = QH_NEXT(fotg210, qh->qh_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) struct fotg210_qh *head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) /* Don't link a QH if there's a Clear-TT-Buffer pending */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) if (unlikely(qh->clearing_tt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) WARN_ON(qh->qh_state != QH_STATE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) /* clear halt and/or toggle; and maybe recover from silicon quirk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) qh_refresh(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) /* splice right after start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) head = fotg210->async;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) qh->qh_next = head->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) qh->hw->hw_next = head->hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) head->qh_next.qh = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) head->hw->hw_next = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) qh->xacterrs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) qh->qh_state = QH_STATE_LINKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) /* qtd completions reported later by interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) enable_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) /* For control/bulk/interrupt, return QH with these TDs appended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) * Allocates and initializes the QH if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) * Returns null if it can't allocate a QH it needs to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) * If the QH has TDs (urbs) already, that's great.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) static struct fotg210_qh *qh_append_tds(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) struct urb *urb, struct list_head *qtd_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) int epnum, void **ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) struct fotg210_qh *qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) __hc32 qh_addr_mask = cpu_to_hc32(fotg210, 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) qh = (struct fotg210_qh *) *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) if (unlikely(qh == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) /* can't sleep here, we have fotg210->lock... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) qh = qh_make(fotg210, urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) *ptr = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) if (likely(qh != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) struct fotg210_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) if (unlikely(list_empty(qtd_list)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) qtd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) qtd = list_entry(qtd_list->next, struct fotg210_qtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) /* control qh may need patching ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) if (unlikely(epnum == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) /* usb_reset_device() briefly reverts to address 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) if (usb_pipedevice(urb->pipe) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) qh->hw->hw_info1 &= ~qh_addr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) /* just one way to queue requests: swap with the dummy qtd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) * only hc or qh_refresh() ever modify the overlay.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) if (likely(qtd != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) struct fotg210_qtd *dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) __hc32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) /* to avoid racing the HC, use the dummy td instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) * the first td of our list (becomes new dummy). both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) * tds stay deactivated until we're done, when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) * HC is allowed to fetch the old dummy (4.10.2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) token = qtd->hw_token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) qtd->hw_token = HALT_BIT(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) dummy = qh->dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) dma = dummy->qtd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) *dummy = *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) dummy->qtd_dma = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) list_del(&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) list_add(&dummy->qtd_list, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) list_splice_tail(qtd_list, &qh->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) fotg210_qtd_init(fotg210, qtd, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) qh->dummy = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) /* hc must see the new dummy at list end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) dma = qtd->qtd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) qtd = list_entry(qh->qtd_list.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) struct fotg210_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) qtd->hw_next = QTD_NEXT(fotg210, dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) /* let the hc process these next qtds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) dummy->hw_token = token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) urb->hcpriv = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) static int submit_async(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) struct list_head *qtd_list, gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) int epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) struct fotg210_qh *qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) epnum = urb->ep->desc.bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) #ifdef FOTG210_URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) struct fotg210_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) qtd = list_entry(qtd_list->next, struct fotg210_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) __func__, urb->dev->devpath, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) epnum & 0x0f, (epnum & USB_DIR_IN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) urb->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) qtd, urb->ep->hcpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) if (unlikely(!HCD_HW_ACCESSIBLE(fotg210_to_hcd(fotg210)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) rc = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) rc = usb_hcd_link_urb_to_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) qh = qh_append_tds(fotg210, urb, qtd_list, epnum, &urb->ep->hcpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) if (unlikely(qh == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) usb_hcd_unlink_urb_from_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) /* Control/bulk operations through TTs don't need scheduling,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) * the HC and TT handle it when the TT has a buffer ready.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) if (likely(qh->qh_state == QH_STATE_IDLE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) qh_link_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) if (unlikely(qh == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) qtd_list_free(fotg210, urb, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) static void single_unlink_async(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) struct fotg210_qh *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) /* Add to the end of the list of QHs waiting for the next IAAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) qh->qh_state = QH_STATE_UNLINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) if (fotg210->async_unlink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) fotg210->async_unlink_last->unlink_next = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) fotg210->async_unlink = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) fotg210->async_unlink_last = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) /* Unlink it from the schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) prev = fotg210->async;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) while (prev->qh_next.qh != qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) prev = prev->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) prev->hw->hw_next = qh->hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) prev->qh_next = qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) if (fotg210->qh_scan_next == qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) fotg210->qh_scan_next = qh->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) static void start_iaa_cycle(struct fotg210_hcd *fotg210, bool nested)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) * Do nothing if an IAA cycle is already running or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) * if one will be started shortly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) if (fotg210->async_iaa || fotg210->async_unlinking)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) /* Do all the waiting QHs at once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) fotg210->async_iaa = fotg210->async_unlink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) fotg210->async_unlink = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) /* If the controller isn't running, we don't have to wait for it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) if (unlikely(fotg210->rh_state < FOTG210_RH_RUNNING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) if (!nested) /* Avoid recursion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) end_unlink_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) /* Otherwise start a new IAA cycle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) } else if (likely(fotg210->rh_state == FOTG210_RH_RUNNING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) /* Make sure the unlinks are all visible to the hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) fotg210_writel(fotg210, fotg210->command | CMD_IAAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) fotg210_enable_event(fotg210, FOTG210_HRTIMER_IAA_WATCHDOG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) /* the async qh for the qtds being unlinked are now gone from the HC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) static void end_unlink_async(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) /* Process the idle QHs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) restart:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) fotg210->async_unlinking = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) while (fotg210->async_iaa) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) qh = fotg210->async_iaa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) fotg210->async_iaa = qh->unlink_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) qh->unlink_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) qh->qh_state = QH_STATE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) qh->qh_next.qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) qh_completions(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) if (!list_empty(&qh->qtd_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) fotg210->rh_state == FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) qh_link_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) disable_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) fotg210->async_unlinking = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) /* Start a new IAA cycle if any QHs are waiting for it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) if (fotg210->async_unlink) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) start_iaa_cycle(fotg210, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) if (unlikely(fotg210->rh_state < FOTG210_RH_RUNNING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) goto restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) static void unlink_empty_async(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) struct fotg210_qh *qh, *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) bool stopped = (fotg210->rh_state < FOTG210_RH_RUNNING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) bool check_unlinks_later = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) /* Unlink all the async QHs that have been empty for a timer cycle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) next = fotg210->async->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) while (next) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) qh = next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) next = qh->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) if (list_empty(&qh->qtd_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) qh->qh_state == QH_STATE_LINKED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) if (!stopped && qh->unlink_cycle ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) fotg210->async_unlink_cycle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) check_unlinks_later = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) single_unlink_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) /* Start a new IAA cycle if any QHs are waiting for it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) if (fotg210->async_unlink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) start_iaa_cycle(fotg210, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) /* QHs that haven't been empty for long enough will be handled later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) if (check_unlinks_later) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) fotg210_enable_event(fotg210, FOTG210_HRTIMER_ASYNC_UNLINKS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) ++fotg210->async_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) /* makes sure the async qh will become idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) /* caller must own fotg210->lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) static void start_unlink_async(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) * If the QH isn't linked then there's nothing we can do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) * unless we were called during a giveback, in which case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) * qh_completions() has to deal with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) if (qh->qh_state != QH_STATE_LINKED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) if (qh->qh_state == QH_STATE_COMPLETING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) qh->needs_rescan = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) single_unlink_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) start_iaa_cycle(fotg210, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) static void scan_async(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) bool check_unlinks_later = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) fotg210->qh_scan_next = fotg210->async->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) while (fotg210->qh_scan_next) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) qh = fotg210->qh_scan_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) fotg210->qh_scan_next = qh->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) rescan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) /* clean any finished work for this qh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) if (!list_empty(&qh->qtd_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) * Unlinks could happen here; completion reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) * drops the lock. That's why fotg210->qh_scan_next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) * always holds the next qh to scan; if the next qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) * gets unlinked then fotg210->qh_scan_next is adjusted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) * in single_unlink_async().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) temp = qh_completions(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) if (qh->needs_rescan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) start_unlink_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) } else if (list_empty(&qh->qtd_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) && qh->qh_state == QH_STATE_LINKED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) qh->unlink_cycle = fotg210->async_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) check_unlinks_later = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) } else if (temp != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) goto rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) * Unlink empty entries, reducing DMA usage as well
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) * as HCD schedule-scanning costs. Delay for any qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) * we just scanned, there's a not-unusual case that it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) * doesn't stay idle for long.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) if (check_unlinks_later && fotg210->rh_state == FOTG210_RH_RUNNING &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) !(fotg210->enabled_hrtimer_events &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) BIT(FOTG210_HRTIMER_ASYNC_UNLINKS))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) fotg210_enable_event(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) FOTG210_HRTIMER_ASYNC_UNLINKS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) ++fotg210->async_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) /* EHCI scheduled transaction support: interrupt, iso, split iso
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) * These are called "periodic" transactions in the EHCI spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) * Note that for interrupt transfers, the QH/QTD manipulation is shared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) * with the "asynchronous" transaction support (control/bulk transfers).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) * The only real difference is in how interrupt transfers are scheduled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) * For ISO, we make an "iso_stream" head to serve the same role as a QH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) * It keeps track of every ITD (or SITD) that's linked, and holds enough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) * pre-calculated schedule data to make appending to the queue be quick.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) static int fotg210_get_frame(struct usb_hcd *hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) /* periodic_next_shadow - return "next" pointer on shadow list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) * @periodic: host pointer to qh/itd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) * @tag: hardware tag for type of this record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) static union fotg210_shadow *periodic_next_shadow(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) union fotg210_shadow *periodic, __hc32 tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) switch (hc32_to_cpu(fotg210, tag)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) case Q_TYPE_QH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) return &periodic->qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) case Q_TYPE_FSTN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) return &periodic->fstn->fstn_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) return &periodic->itd->itd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) static __hc32 *shadow_next_periodic(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) union fotg210_shadow *periodic, __hc32 tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) switch (hc32_to_cpu(fotg210, tag)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) /* our fotg210_shadow.qh is actually software part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) case Q_TYPE_QH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) return &periodic->qh->hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) /* others are hw parts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) return periodic->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) /* caller must hold fotg210->lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) static void periodic_unlink(struct fotg210_hcd *fotg210, unsigned frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) void *ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) union fotg210_shadow *prev_p = &fotg210->pshadow[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) __hc32 *hw_p = &fotg210->periodic[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) union fotg210_shadow here = *prev_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) /* find predecessor of "ptr"; hw and shadow lists are in sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) while (here.ptr && here.ptr != ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) prev_p = periodic_next_shadow(fotg210, prev_p,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) Q_NEXT_TYPE(fotg210, *hw_p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) hw_p = shadow_next_periodic(fotg210, &here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) Q_NEXT_TYPE(fotg210, *hw_p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) here = *prev_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) /* an interrupt entry (at list end) could have been shared */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) if (!here.ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) /* update shadow and hardware lists ... the old "next" pointers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) * from ptr may still be in use, the caller updates them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) *prev_p = *periodic_next_shadow(fotg210, &here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) Q_NEXT_TYPE(fotg210, *hw_p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) *hw_p = *shadow_next_periodic(fotg210, &here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) Q_NEXT_TYPE(fotg210, *hw_p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) /* how many of the uframe's 125 usecs are allocated? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) static unsigned short periodic_usecs(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) unsigned frame, unsigned uframe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) __hc32 *hw_p = &fotg210->periodic[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) union fotg210_shadow *q = &fotg210->pshadow[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) unsigned usecs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) struct fotg210_qh_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) while (q->ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) switch (hc32_to_cpu(fotg210, Q_NEXT_TYPE(fotg210, *hw_p))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) case Q_TYPE_QH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) hw = q->qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) /* is it in the S-mask? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) if (hw->hw_info2 & cpu_to_hc32(fotg210, 1 << uframe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) usecs += q->qh->usecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) /* ... or C-mask? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) if (hw->hw_info2 & cpu_to_hc32(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) 1 << (8 + uframe)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) usecs += q->qh->c_usecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) hw_p = &hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) q = &q->qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) /* case Q_TYPE_FSTN: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) /* for "save place" FSTNs, count the relevant INTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) * bandwidth from the previous frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) if (q->fstn->hw_prev != FOTG210_LIST_END(fotg210))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) fotg210_dbg(fotg210, "ignoring FSTN cost ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) hw_p = &q->fstn->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) q = &q->fstn->fstn_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) case Q_TYPE_ITD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) if (q->itd->hw_transaction[uframe])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) usecs += q->itd->stream->usecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) hw_p = &q->itd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) q = &q->itd->itd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) if (usecs > fotg210->uframe_periodic_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) fotg210_err(fotg210, "uframe %d sched overrun: %d usecs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) frame * 8 + uframe, usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) return usecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) static int same_tt(struct usb_device *dev1, struct usb_device *dev2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) if (!dev1->tt || !dev2->tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) if (dev1->tt != dev2->tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) if (dev1->tt->multi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) return dev1->ttport == dev2->ttport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) /* return true iff the device's transaction translator is available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) * for a periodic transfer starting at the specified frame, using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) * all the uframes in the mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) static int tt_no_collision(struct fotg210_hcd *fotg210, unsigned period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) struct usb_device *dev, unsigned frame, u32 uf_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) if (period == 0) /* error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) /* note bandwidth wastage: split never follows csplit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) * (different dev or endpoint) until the next uframe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) * calling convention doesn't make that distinction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) for (; frame < fotg210->periodic_size; frame += period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) union fotg210_shadow here;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) __hc32 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) struct fotg210_qh_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) here = fotg210->pshadow[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) type = Q_NEXT_TYPE(fotg210, fotg210->periodic[frame]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) while (here.ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) switch (hc32_to_cpu(fotg210, type)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) case Q_TYPE_ITD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) type = Q_NEXT_TYPE(fotg210, here.itd->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) here = here.itd->itd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) case Q_TYPE_QH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) hw = here.qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) if (same_tt(dev, here.qh->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) mask = hc32_to_cpu(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) hw->hw_info2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) /* "knows" no gap is needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) mask |= mask >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) if (mask & uf_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) type = Q_NEXT_TYPE(fotg210, hw->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) here = here.qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) /* case Q_TYPE_FSTN: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) "periodic frame %d bogus type %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) frame, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) /* collision or error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) /* no collision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) static void enable_periodic(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) if (fotg210->periodic_count++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) /* Stop waiting to turn off the periodic schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) fotg210->enabled_hrtimer_events &=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) ~BIT(FOTG210_HRTIMER_DISABLE_PERIODIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) /* Don't start the schedule until PSS is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) fotg210_poll_PSS(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) turn_on_io_watchdog(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) static void disable_periodic(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) if (--fotg210->periodic_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) /* Don't turn off the schedule until PSS is 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) fotg210_poll_PSS(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) /* periodic schedule slots have iso tds (normal or split) first, then a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) * sparse tree for active interrupt transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) * this just links in a qh; caller guarantees uframe masks are set right.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) * no FSTN support (yet; fotg210 0.96+)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) static void qh_link_periodic(struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) unsigned period = qh->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) dev_dbg(&qh->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) "link qh%d-%04x/%p start %d [%d/%d us]\n", period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) hc32_to_cpup(fotg210, &qh->hw->hw_info2) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) (QH_CMASK | QH_SMASK), qh, qh->start, qh->usecs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) qh->c_usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) /* high bandwidth, or otherwise every microframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) if (period == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) period = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) for (i = qh->start; i < fotg210->periodic_size; i += period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) union fotg210_shadow *prev = &fotg210->pshadow[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) __hc32 *hw_p = &fotg210->periodic[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) union fotg210_shadow here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) __hc32 type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) /* skip the iso nodes at list head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) while (here.ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) type = Q_NEXT_TYPE(fotg210, *hw_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) if (type == cpu_to_hc32(fotg210, Q_TYPE_QH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) prev = periodic_next_shadow(fotg210, prev, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) hw_p = shadow_next_periodic(fotg210, &here, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) /* sorting each branch by period (slow-->fast)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) * enables sharing interior tree nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) while (here.ptr && qh != here.qh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) if (qh->period > here.qh->period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) prev = &here.qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) hw_p = &here.qh->hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) /* link in this qh, unless some earlier pass did that */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) if (qh != here.qh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) qh->qh_next = here;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) if (here.qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) qh->hw->hw_next = *hw_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) prev->qh = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) *hw_p = QH_NEXT(fotg210, qh->qh_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) qh->qh_state = QH_STATE_LINKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) qh->xacterrs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) /* update per-qh bandwidth for usbfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) fotg210_to_hcd(fotg210)->self.bandwidth_allocated += qh->period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) ? ((qh->usecs + qh->c_usecs) / qh->period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) : (qh->usecs * 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) list_add(&qh->intr_node, &fotg210->intr_qh_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) /* maybe enable periodic schedule processing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) ++fotg210->intr_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) enable_periodic(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) static void qh_unlink_periodic(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) unsigned period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) * If qh is for a low/full-speed device, simply unlinking it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) * could interfere with an ongoing split transaction. To unlink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) * it safely would require setting the QH_INACTIVATE bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) * waiting at least one frame, as described in EHCI 4.12.2.5.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) * We won't bother with any of this. Instead, we assume that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) * only reason for unlinking an interrupt QH while the current URB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) * is still active is to dequeue all the URBs (flush the whole
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) * endpoint queue).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) * If rebalancing the periodic schedule is ever implemented, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) * approach will no longer be valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) /* high bandwidth, or otherwise part of every microframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) period = qh->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) if (!period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) period = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) for (i = qh->start; i < fotg210->periodic_size; i += period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) periodic_unlink(fotg210, i, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) /* update per-qh bandwidth for usbfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) fotg210_to_hcd(fotg210)->self.bandwidth_allocated -= qh->period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) ? ((qh->usecs + qh->c_usecs) / qh->period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) : (qh->usecs * 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) dev_dbg(&qh->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) qh->period, hc32_to_cpup(fotg210, &qh->hw->hw_info2) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) (QH_CMASK | QH_SMASK), qh, qh->start, qh->usecs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) qh->c_usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) /* qh->qh_next still "live" to HC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) qh->qh_state = QH_STATE_UNLINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) qh->qh_next.ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) if (fotg210->qh_scan_next == qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) fotg210->qh_scan_next = list_entry(qh->intr_node.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) struct fotg210_qh, intr_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) list_del(&qh->intr_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) static void start_unlink_intr(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) /* If the QH isn't linked then there's nothing we can do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) * unless we were called during a giveback, in which case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) * qh_completions() has to deal with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) if (qh->qh_state != QH_STATE_LINKED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) if (qh->qh_state == QH_STATE_COMPLETING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) qh->needs_rescan = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) qh_unlink_periodic(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) /* Make sure the unlinks are visible before starting the timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) * The EHCI spec doesn't say how long it takes the controller to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) * stop accessing an unlinked interrupt QH. The timer delay is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) * 9 uframes; presumably that will be long enough.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) qh->unlink_cycle = fotg210->intr_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) /* New entries go at the end of the intr_unlink list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) if (fotg210->intr_unlink)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) fotg210->intr_unlink_last->unlink_next = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) fotg210->intr_unlink = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) fotg210->intr_unlink_last = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) if (fotg210->intr_unlinking)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) ; /* Avoid recursive calls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) else if (fotg210->rh_state < FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) fotg210_handle_intr_unlinks(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) else if (fotg210->intr_unlink == qh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) fotg210_enable_event(fotg210, FOTG210_HRTIMER_UNLINK_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) ++fotg210->intr_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) static void end_unlink_intr(struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) struct fotg210_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) qh->qh_state = QH_STATE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) hw->hw_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) qh_completions(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) /* reschedule QH iff another request is queued */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) if (!list_empty(&qh->qtd_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) fotg210->rh_state == FOTG210_RH_RUNNING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) rc = qh_schedule(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) /* An error here likely indicates handshake failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) * or no space left in the schedule. Neither fault
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) * should happen often ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) * FIXME kill the now-dysfunctional queued urbs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) if (rc != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) fotg210_err(fotg210, "can't reschedule qh %p, err %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) qh, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) /* maybe turn off periodic schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) --fotg210->intr_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) disable_periodic(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) static int check_period(struct fotg210_hcd *fotg210, unsigned frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) unsigned uframe, unsigned period, unsigned usecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) int claimed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) /* complete split running into next frame?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) * given FSTN support, we could sometimes check...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) if (uframe >= 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) /* convert "usecs we need" to "max already claimed" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) usecs = fotg210->uframe_periodic_max - usecs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) /* we "know" 2 and 4 uframe intervals were rejected; so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) * for period 0, check _every_ microframe in the schedule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) if (unlikely(period == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) for (uframe = 0; uframe < 7; uframe++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) claimed = periodic_usecs(fotg210, frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) uframe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) if (claimed > usecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) } while ((frame += 1) < fotg210->periodic_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) /* just check the specified uframe, at that period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) claimed = periodic_usecs(fotg210, frame, uframe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) if (claimed > usecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) } while ((frame += period) < fotg210->periodic_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) /* success! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) static int check_intr_schedule(struct fotg210_hcd *fotg210, unsigned frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) unsigned uframe, const struct fotg210_qh *qh, __hc32 *c_maskp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) int retval = -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) u8 mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) if (!check_period(fotg210, frame, uframe, qh->period, qh->usecs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) if (!qh->c_usecs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) *c_maskp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) /* Make sure this tt's buffer is also available for CSPLITs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) * We pessimize a bit; probably the typical full speed case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) * doesn't need the second CSPLIT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) * NOTE: both SPLIT and CSPLIT could be checked in just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) * one smart pass...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) mask = 0x03 << (uframe + qh->gap_uf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) *c_maskp = cpu_to_hc32(fotg210, mask << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) mask |= 1 << uframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) if (tt_no_collision(fotg210, qh->period, qh->dev, frame, mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) if (!check_period(fotg210, frame, uframe + qh->gap_uf + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) qh->period, qh->c_usecs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) if (!check_period(fotg210, frame, uframe + qh->gap_uf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) qh->period, qh->c_usecs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) /* "first fit" scheduling policy used the first time through,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) * or when the previous schedule slot can't be re-used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) static int qh_schedule(struct fotg210_hcd *fotg210, struct fotg210_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) unsigned uframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) __hc32 c_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) struct fotg210_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) qh_refresh(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) hw->hw_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) frame = qh->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) /* reuse the previous schedule slots, if we can */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) if (frame < qh->period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) uframe = ffs(hc32_to_cpup(fotg210, &hw->hw_info2) & QH_SMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) status = check_intr_schedule(fotg210, frame, --uframe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) qh, &c_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) uframe = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) c_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) status = -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) /* else scan the schedule to find a group of slots such that all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) * uframes have enough periodic bandwidth available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) /* "normal" case, uframing flexible except with splits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) if (qh->period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) for (i = qh->period; status && i > 0; --i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) frame = ++fotg210->random_frame % qh->period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) for (uframe = 0; uframe < 8; uframe++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) status = check_intr_schedule(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) frame, uframe, qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) &c_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) if (status == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) /* qh->period == 0 means every uframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) frame = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) status = check_intr_schedule(fotg210, 0, 0, qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) &c_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) qh->start = frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) /* reset S-frame and (maybe) C-frame masks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) hw->hw_info2 &= cpu_to_hc32(fotg210, ~(QH_CMASK | QH_SMASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) hw->hw_info2 |= qh->period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) ? cpu_to_hc32(fotg210, 1 << uframe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) : cpu_to_hc32(fotg210, QH_SMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) hw->hw_info2 |= c_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) fotg210_dbg(fotg210, "reused qh %p schedule\n", qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) /* stuff into the periodic schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) qh_link_periodic(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) static int intr_submit(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) struct list_head *qtd_list, gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) unsigned epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) struct list_head empty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) /* get endpoint and transfer/schedule data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) epnum = urb->ep->desc.bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) if (unlikely(!HCD_HW_ACCESSIBLE(fotg210_to_hcd(fotg210)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) status = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) goto done_not_linked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) status = usb_hcd_link_urb_to_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) if (unlikely(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) goto done_not_linked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) /* get qh and force any scheduling errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) INIT_LIST_HEAD(&empty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) qh = qh_append_tds(fotg210, urb, &empty, epnum, &urb->ep->hcpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) if (qh == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) status = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) if (qh->qh_state == QH_STATE_IDLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) status = qh_schedule(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) /* then queue the urb's tds to the qh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) qh = qh_append_tds(fotg210, urb, qtd_list, epnum, &urb->ep->hcpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) BUG_ON(qh == NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) /* ... update usbfs periodic stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) fotg210_to_hcd(fotg210)->self.bandwidth_int_reqs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) if (unlikely(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) usb_hcd_unlink_urb_from_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) done_not_linked:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) qtd_list_free(fotg210, urb, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) static void scan_intr(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) list_for_each_entry_safe(qh, fotg210->qh_scan_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) &fotg210->intr_qh_list, intr_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) rescan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) /* clean any finished work for this qh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) if (!list_empty(&qh->qtd_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) * Unlinks could happen here; completion reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) * drops the lock. That's why fotg210->qh_scan_next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) * always holds the next qh to scan; if the next qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) * gets unlinked then fotg210->qh_scan_next is adjusted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) * in qh_unlink_periodic().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) temp = qh_completions(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) if (unlikely(qh->needs_rescan ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) (list_empty(&qh->qtd_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) qh->qh_state == QH_STATE_LINKED)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) start_unlink_intr(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) else if (temp != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897) goto rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) /* fotg210_iso_stream ops work with both ITD and SITD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) static struct fotg210_iso_stream *iso_stream_alloc(gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) struct fotg210_iso_stream *stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) stream = kzalloc(sizeof(*stream), mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) if (likely(stream != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) INIT_LIST_HEAD(&stream->td_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) INIT_LIST_HEAD(&stream->free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) stream->next_uframe = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) return stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) static void iso_stream_init(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) struct fotg210_iso_stream *stream, struct usb_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) int pipe, unsigned interval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) u32 buf1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) unsigned epnum, maxp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) int is_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) long bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) unsigned multi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) struct usb_host_endpoint *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) * this might be a "high bandwidth" highspeed endpoint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) * as encoded in the ep descriptor's wMaxPacket field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) epnum = usb_pipeendpoint(pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) is_input = usb_pipein(pipe) ? USB_DIR_IN : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) ep = usb_pipe_endpoint(dev, pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) maxp = usb_endpoint_maxp(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) if (is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) buf1 = (1 << 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) buf1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) multi = usb_endpoint_maxp_mult(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942) buf1 |= maxp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) maxp *= multi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) stream->buf0 = cpu_to_hc32(fotg210, (epnum << 8) | dev->devnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) stream->buf1 = cpu_to_hc32(fotg210, buf1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) stream->buf2 = cpu_to_hc32(fotg210, multi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) /* usbfs wants to report the average usecs per frame tied up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) * when transfers on this endpoint are scheduled ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952) if (dev->speed == USB_SPEED_FULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) interval <<= 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) stream->usecs = NS_TO_US(usb_calc_bus_time(dev->speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) is_input, 1, maxp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) stream->usecs /= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) stream->highspeed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) stream->usecs = HS_USECS_ISO(maxp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) bandwidth = stream->usecs * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) bandwidth /= interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) stream->bandwidth = bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) stream->udev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) stream->bEndpointAddress = is_input | epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) stream->interval = interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) stream->maxp = maxp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) static struct fotg210_iso_stream *iso_stream_find(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) unsigned epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) struct fotg210_iso_stream *stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) struct usb_host_endpoint *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) epnum = usb_pipeendpoint(urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) if (usb_pipein(urb->pipe))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) ep = urb->dev->ep_in[epnum];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) ep = urb->dev->ep_out[epnum];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) stream = ep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) if (unlikely(stream == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) stream = iso_stream_alloc(GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) if (likely(stream != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) ep->hcpriv = stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) stream->ep = ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) iso_stream_init(fotg210, stream, urb->dev, urb->pipe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) urb->interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) /* if dev->ep[epnum] is a QH, hw is set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) } else if (unlikely(stream->hw != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) fotg210_dbg(fotg210, "dev %s ep%d%s, not iso??\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) urb->dev->devpath, epnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) usb_pipein(urb->pipe) ? "in" : "out");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) stream = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) return stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) /* fotg210_iso_sched ops can be ITD-only or SITD-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) static struct fotg210_iso_sched *iso_sched_alloc(unsigned packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) struct fotg210_iso_sched *iso_sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) int size = sizeof(*iso_sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) size += packets * sizeof(struct fotg210_iso_packet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) iso_sched = kzalloc(size, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) if (likely(iso_sched != NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) INIT_LIST_HEAD(&iso_sched->td_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) return iso_sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) static inline void itd_sched_init(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) struct fotg210_iso_sched *iso_sched,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027) struct fotg210_iso_stream *stream, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) dma_addr_t dma = urb->transfer_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) /* how many uframes are needed for these transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) iso_sched->span = urb->number_of_packets * stream->interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) /* figure out per-uframe itd fields that we'll need later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) * when we fit new itds into the schedule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) for (i = 0; i < urb->number_of_packets; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) struct fotg210_iso_packet *uframe = &iso_sched->packet[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) unsigned length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) dma_addr_t buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) u32 trans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) length = urb->iso_frame_desc[i].length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) buf = dma + urb->iso_frame_desc[i].offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) trans = FOTG210_ISOC_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) trans |= buf & 0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) if (unlikely(((i + 1) == urb->number_of_packets))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) && !(urb->transfer_flags & URB_NO_INTERRUPT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) trans |= FOTG210_ITD_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) trans |= length << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) uframe->transaction = cpu_to_hc32(fotg210, trans);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) /* might need to cross a buffer page within a uframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) uframe->bufp = (buf & ~(u64)0x0fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) buf += length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) if (unlikely((uframe->bufp != (buf & ~(u64)0x0fff))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) uframe->cross = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) static void iso_sched_free(struct fotg210_iso_stream *stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) struct fotg210_iso_sched *iso_sched)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) if (!iso_sched)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) /* caller must hold fotg210->lock!*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) list_splice(&iso_sched->td_list, &stream->free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) kfree(iso_sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) static int itd_urb_transaction(struct fotg210_iso_stream *stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) struct fotg210_hcd *fotg210, struct urb *urb, gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) struct fotg210_itd *itd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) dma_addr_t itd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) unsigned num_itds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) struct fotg210_iso_sched *sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) if (unlikely(sched == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) itd_sched_init(fotg210, sched, stream, urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) if (urb->interval < 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090) num_itds = 1 + (sched->span + 7) / 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) num_itds = urb->number_of_packets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) /* allocate/init ITDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) for (i = 0; i < num_itds; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) * Use iTDs from the free list, but not iTDs that may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) * still be in use by the hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) if (likely(!list_empty(&stream->free_list))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) itd = list_first_entry(&stream->free_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) struct fotg210_itd, itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) if (itd->frame == fotg210->now_frame)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) goto alloc_itd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) list_del(&itd->itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) itd_dma = itd->itd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110) alloc_itd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) itd = dma_pool_zalloc(fotg210->itd_pool, mem_flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) &itd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) if (!itd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) iso_sched_free(stream, sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) itd->itd_dma = itd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) list_add(&itd->itd_list, &sched->td_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) /* temporarily store schedule info in hcpriv */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) urb->hcpriv = sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) urb->error_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) static inline int itd_slot_ok(struct fotg210_hcd *fotg210, u32 mod, u32 uframe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134) u8 usecs, u32 period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) uframe %= period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) /* can't commit more than uframe_periodic_max usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) if (periodic_usecs(fotg210, uframe >> 3, uframe & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) > (fotg210->uframe_periodic_max - usecs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) /* we know urb->interval is 2^N uframes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) uframe += period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) } while (uframe < mod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) /* This scheduler plans almost as far into the future as it has actual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) * "as small as possible" to be cache-friendlier.) That limits the size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) * transfers you can stream reliably; avoid more than 64 msec per urb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) * Also avoid queue depths of less than fotg210's worst irq latency (affected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) * and other factors); or more than about 230 msec total (for portability,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159) #define SCHEDULE_SLOP 80 /* microframes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) static int iso_stream_schedule(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) struct fotg210_iso_stream *stream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) u32 now, next, start, period, span;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) unsigned mod = fotg210->periodic_size << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) struct fotg210_iso_sched *sched = urb->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) period = urb->interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) span = sched->span;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) if (span > mod - SCHEDULE_SLOP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) fotg210_dbg(fotg210, "iso request %p too long\n", urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) status = -EFBIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) now = fotg210_read_frame_index(fotg210) & (mod - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) /* Typical case: reuse current schedule, stream is still active.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) * Hopefully there are no gaps from the host falling behind
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) * (irq delays etc), but if there are we'll take the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) * slot in the schedule, implicitly assuming URB_ISO_ASAP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) if (likely(!list_empty(&stream->td_list))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) u32 excess;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) /* For high speed devices, allow scheduling within the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) * isochronous scheduling threshold. For full speed devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) * and Intel PCI-based controllers, don't (work around for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) * Intel ICH9 bug).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) if (!stream->highspeed && fotg210->fs_i_thresh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) next = now + fotg210->i_thresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) next = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) /* Fell behind (by up to twice the slop amount)?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) * We decide based on the time of the last currently-scheduled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) * slot, not the time of the next available slot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) excess = (stream->next_uframe - period - next) & (mod - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) if (excess >= mod - 2 * SCHEDULE_SLOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) start = next + excess - mod + period *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) DIV_ROUND_UP(mod - excess, period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) start = next + excess + period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) if (start - now >= mod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) fotg210_dbg(fotg210, "request %p would overflow (%d+%d >= %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) urb, start - now - period, period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) mod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) status = -EFBIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) /* need to schedule; when's the next (u)frame we could start?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) * this is bigger than fotg210->i_thresh allows; scheduling itself
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) * isn't free, the slop should handle reasonably slow cpus. it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) * can also help high bandwidth if the dma and irq loads don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) * jump until after the queue is primed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) int done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) start = SCHEDULE_SLOP + (now & ~0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) /* find a uframe slot with enough bandwidth.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) * Early uframes are more precious because full-speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) * iso IN transfers can't use late uframes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) * and therefore they should be allocated last.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) next = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) start += period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238) start--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) /* check schedule: enough space? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) if (itd_slot_ok(fotg210, mod, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) stream->usecs, period))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242) done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) } while (start > next && !done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) /* no room in the schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246) if (!done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) fotg210_dbg(fotg210, "iso resched full %p (now %d max %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248) urb, now, now + mod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) status = -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254) /* Tried to schedule too far into the future? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) if (unlikely(start - now + span - period >=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) mod - 2 * SCHEDULE_SLOP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) fotg210_dbg(fotg210, "request %p would overflow (%d+%d >= %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) urb, start - now, span - period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259) mod - 2 * SCHEDULE_SLOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260) status = -EFBIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264) stream->next_uframe = start & (mod - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) /* report high speed start in uframes; full speed, in frames */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) urb->start_frame = stream->next_uframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) if (!stream->highspeed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) urb->start_frame >>= 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) /* Make sure scan_isoc() sees these */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) if (fotg210->isoc_count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273) fotg210->next_frame = now >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277) iso_sched_free(stream, sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) urb->hcpriv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) static inline void itd_init(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283) struct fotg210_iso_stream *stream, struct fotg210_itd *itd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) /* it's been recently zeroed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) itd->hw_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) itd->hw_bufp[0] = stream->buf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) itd->hw_bufp[1] = stream->buf1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) itd->hw_bufp[2] = stream->buf2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) for (i = 0; i < 8; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) itd->index[i] = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) /* All other fields are filled when scheduling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) static inline void itd_patch(struct fotg210_hcd *fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) struct fotg210_itd *itd, struct fotg210_iso_sched *iso_sched,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) unsigned index, u16 uframe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) struct fotg210_iso_packet *uf = &iso_sched->packet[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) unsigned pg = itd->pg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) uframe &= 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) itd->index[uframe] = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) itd->hw_transaction[uframe] = uf->transaction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) itd->hw_transaction[uframe] |= cpu_to_hc32(fotg210, pg << 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) itd->hw_bufp[pg] |= cpu_to_hc32(fotg210, uf->bufp & ~(u32)0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) itd->hw_bufp_hi[pg] |= cpu_to_hc32(fotg210, (u32)(uf->bufp >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) /* iso_frame_desc[].offset must be strictly increasing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) if (unlikely(uf->cross)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) u64 bufp = uf->bufp + 4096;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) itd->pg = ++pg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) itd->hw_bufp[pg] |= cpu_to_hc32(fotg210, bufp & ~(u32)0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320) itd->hw_bufp_hi[pg] |= cpu_to_hc32(fotg210, (u32)(bufp >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) static inline void itd_link(struct fotg210_hcd *fotg210, unsigned frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) struct fotg210_itd *itd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) union fotg210_shadow *prev = &fotg210->pshadow[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) __hc32 *hw_p = &fotg210->periodic[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) union fotg210_shadow here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) __hc32 type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) /* skip any iso nodes which might belong to previous microframes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333) while (here.ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) type = Q_NEXT_TYPE(fotg210, *hw_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) if (type == cpu_to_hc32(fotg210, Q_TYPE_QH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) prev = periodic_next_shadow(fotg210, prev, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) hw_p = shadow_next_periodic(fotg210, &here, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339) here = *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) itd->itd_next = here;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) itd->hw_next = *hw_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344) prev->itd = itd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) itd->frame = frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347) *hw_p = cpu_to_hc32(fotg210, itd->itd_dma | Q_TYPE_ITD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) /* fit urb's itds into the selected schedule slot; activate as needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) static void itd_link_urb(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) unsigned mod, struct fotg210_iso_stream *stream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) int packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) unsigned next_uframe, uframe, frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) struct fotg210_iso_sched *iso_sched = urb->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) struct fotg210_itd *itd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) next_uframe = stream->next_uframe & (mod - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) if (unlikely(list_empty(&stream->td_list))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362) fotg210_to_hcd(fotg210)->self.bandwidth_allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363) += stream->bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) urb->dev->devpath, stream->bEndpointAddress & 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) urb->interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) next_uframe >> 3, next_uframe & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) /* fill iTDs uframe by uframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) for (packet = 0, itd = NULL; packet < urb->number_of_packets;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) if (itd == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) /* ASSERT: we have all necessary itds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) /* ASSERT: no itds for this endpoint in this uframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) itd = list_entry(iso_sched->td_list.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380) struct fotg210_itd, itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) list_move_tail(&itd->itd_list, &stream->td_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382) itd->stream = stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) itd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384) itd_init(fotg210, stream, itd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) uframe = next_uframe & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) frame = next_uframe >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) itd_patch(fotg210, itd, iso_sched, packet, uframe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) next_uframe += stream->interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) next_uframe &= mod - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394) packet++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) /* link completed itds into the schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) if (((next_uframe >> 3) != frame)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398) || packet == urb->number_of_packets) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) itd_link(fotg210, frame & (fotg210->periodic_size - 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) itd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401) itd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) stream->next_uframe = next_uframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) /* don't need that schedule data any more */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) iso_sched_free(stream, iso_sched);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408) urb->hcpriv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) ++fotg210->isoc_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411) enable_periodic(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415) FOTG210_ISOC_XACTERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) /* Process and recycle a completed ITD. Return true iff its urb completed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) * and hence its completion callback probably added things to the hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) * schedule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) * Note that we carefully avoid recycling this descriptor until after any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) * completion callback runs, so that it won't be reused quickly. That is,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423) * assuming (a) no more than two urbs per frame on this endpoint, and also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) * (b) only this endpoint's completions submit URBs. It seems some silicon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) * corrupts things if you reuse completed descriptors very quickly...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) static bool itd_complete(struct fotg210_hcd *fotg210, struct fotg210_itd *itd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429) struct urb *urb = itd->urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430) struct usb_iso_packet_descriptor *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) u32 t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) unsigned uframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) int urb_index = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) struct fotg210_iso_stream *stream = itd->stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) struct usb_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) bool retval = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438) /* for each uframe with a packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) for (uframe = 0; uframe < 8; uframe++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) if (likely(itd->index[uframe] == -1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) urb_index = itd->index[uframe];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) desc = &urb->iso_frame_desc[urb_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) t = hc32_to_cpup(fotg210, &itd->hw_transaction[uframe]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446) itd->hw_transaction[uframe] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) /* report transfer status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) if (unlikely(t & ISO_ERRS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) urb->error_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) if (t & FOTG210_ISOC_BUF_ERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452) desc->status = usb_pipein(urb->pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) ? -ENOSR /* hc couldn't read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) : -ECOMM; /* hc couldn't write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455) else if (t & FOTG210_ISOC_BABBLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) desc->status = -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457) else /* (t & FOTG210_ISOC_XACTERR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) desc->status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) /* HC need not update length with this error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461) if (!(t & FOTG210_ISOC_BABBLE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) desc->actual_length = FOTG210_ITD_LENGTH(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) urb->actual_length += desc->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) } else if (likely((t & FOTG210_ISOC_ACTIVE) == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466) desc->status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) desc->actual_length = FOTG210_ITD_LENGTH(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) urb->actual_length += desc->actual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470) /* URB was too late */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) desc->status = -EXDEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475) /* handle completion now? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) if (likely((urb_index + 1) != urb->number_of_packets))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) /* ASSERT: it's really the last itd for this urb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) * list_for_each_entry (itd, &stream->td_list, itd_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) * BUG_ON (itd->urb == urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) /* give urb back to the driver; completion often (re)submits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485) dev = urb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486) fotg210_urb_done(fotg210, urb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) retval = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488) urb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) --fotg210->isoc_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) disable_periodic(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) if (unlikely(list_is_singular(&stream->td_list))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) fotg210_to_hcd(fotg210)->self.bandwidth_allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495) -= stream->bandwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) "deschedule devp %s ep%d%s-iso\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498) dev->devpath, stream->bEndpointAddress & 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) itd->urb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) /* Add to the end of the free list for later reuse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) list_move_tail(&itd->itd_list, &stream->free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509) if (list_empty(&stream->td_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) list_splice_tail_init(&stream->free_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) &fotg210->cached_itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512) start_free_itds(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) static int itd_submit(struct fotg210_hcd *fotg210, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521) int status = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) struct fotg210_iso_stream *stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525) /* Get iso_stream head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) stream = iso_stream_find(fotg210, urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) if (unlikely(stream == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) fotg210_dbg(fotg210, "can't get iso stream\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531) if (unlikely(urb->interval != stream->interval &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) fotg210_port_speed(fotg210, 0) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) USB_PORT_STAT_HIGH_SPEED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) fotg210_dbg(fotg210, "can't change iso interval %d --> %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) stream->interval, urb->interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) #ifdef FOTG210_URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) fotg210_dbg(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) "%s %s urb %p ep%d%s len %d, %d pkts %d uframes[%p]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542) __func__, urb->dev->devpath, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543) usb_pipeendpoint(urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) usb_pipein(urb->pipe) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) urb->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) urb->number_of_packets, urb->interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) /* allocate ITDs w/o locking anything */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) status = itd_urb_transaction(stream, fotg210, urb, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) if (unlikely(status < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) fotg210_dbg(fotg210, "can't init itds\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557) /* schedule ... need to lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) if (unlikely(!HCD_HW_ACCESSIBLE(fotg210_to_hcd(fotg210)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) status = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) goto done_not_linked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563) status = usb_hcd_link_urb_to_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) if (unlikely(status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) goto done_not_linked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566) status = iso_stream_schedule(fotg210, urb, stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) if (likely(status == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568) itd_link_urb(fotg210, urb, fotg210->periodic_size << 3, stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) usb_hcd_unlink_urb_from_ep(fotg210_to_hcd(fotg210), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) done_not_linked:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) static inline int scan_frame_queue(struct fotg210_hcd *fotg210, unsigned frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578) unsigned now_frame, bool live)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580) unsigned uf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581) bool modified;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) union fotg210_shadow q, *q_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583) __hc32 type, *hw_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) /* scan each element in frame's queue for completions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586) q_p = &fotg210->pshadow[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587) hw_p = &fotg210->periodic[frame];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) q.ptr = q_p->ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) type = Q_NEXT_TYPE(fotg210, *hw_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590) modified = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592) while (q.ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593) switch (hc32_to_cpu(fotg210, type)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) case Q_TYPE_ITD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595) /* If this ITD is still active, leave it for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596) * later processing ... check the next entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597) * No need to check for activity unless the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598) * frame is current.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) if (frame == now_frame && live) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601) rmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602) for (uf = 0; uf < 8; uf++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603) if (q.itd->hw_transaction[uf] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) ITD_ACTIVE(fotg210))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) if (uf < 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) q_p = &q.itd->itd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) hw_p = &q.itd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610) type = Q_NEXT_TYPE(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611) q.itd->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612) q = *q_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617) /* Take finished ITDs out of the schedule
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618) * and process them: recycle, maybe report
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619) * URB completion. HC won't cache the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) * pointer for much longer, if at all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) *q_p = q.itd->itd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) *hw_p = q.itd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624) type = Q_NEXT_TYPE(fotg210, q.itd->hw_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626) modified = itd_complete(fotg210, q.itd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627) q = *q_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630) fotg210_dbg(fotg210, "corrupt type %d frame %d shadow %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) type, frame, q.ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633) case Q_TYPE_QH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634) case Q_TYPE_FSTN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635) /* End of the iTDs and siTDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636) q.ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) /* assume completion callbacks modify the queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641) if (unlikely(modified && fotg210->isoc_count > 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647) static void scan_isoc(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) unsigned uf, now_frame, frame, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) unsigned fmask = fotg210->periodic_size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651) bool live;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654) * When running, scan from last scan point up to "now"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) * else clean up by scanning everything that's left.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) * Touches as few pages as possible: cache-friendly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) if (fotg210->rh_state >= FOTG210_RH_RUNNING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) uf = fotg210_read_frame_index(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660) now_frame = (uf >> 3) & fmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) live = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) now_frame = (fotg210->next_frame - 1) & fmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664) live = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666) fotg210->now_frame = now_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) frame = fotg210->next_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671) while (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672) ret = scan_frame_queue(fotg210, frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) now_frame, live);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) /* Stop when we have reached the current frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676) if (frame == now_frame)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678) frame = (frame + 1) & fmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680) fotg210->next_frame = now_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) /* Display / Set uframe_periodic_max
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685) static ssize_t uframe_periodic_max_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688) struct fotg210_hcd *fotg210;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689) int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) fotg210 = hcd_to_fotg210(bus_to_hcd(dev_get_drvdata(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692) n = scnprintf(buf, PAGE_SIZE, "%d\n", fotg210->uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693) return n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697) static ssize_t uframe_periodic_max_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) struct device_attribute *attr, const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) struct fotg210_hcd *fotg210;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) unsigned uframe_periodic_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702) unsigned frame, uframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) unsigned short allocated_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705) ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) fotg210 = hcd_to_fotg210(bus_to_hcd(dev_get_drvdata(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) if (kstrtouint(buf, 0, &uframe_periodic_max) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) fotg210_info(fotg210, "rejecting invalid request for uframe_periodic_max=%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713) uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720) * lock, so that our checking does not race with possible periodic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721) * bandwidth allocation through submitting new urbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726) * for request to decrease max periodic bandwidth, we have to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) * every microframe in the schedule to see whether the decrease is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) * possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4730) if (uframe_periodic_max < fotg210->uframe_periodic_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4731) allocated_max = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4733) for (frame = 0; frame < fotg210->periodic_size; ++frame)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4734) for (uframe = 0; uframe < 7; ++uframe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4735) allocated_max = max(allocated_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4736) periodic_usecs(fotg210, frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4737) uframe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4739) if (allocated_max > uframe_periodic_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4740) fotg210_info(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4741) "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4742) allocated_max, uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4743) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4747) /* increasing is always ok */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4749) fotg210_info(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4750) "setting max periodic bandwidth to %u%% (== %u usec/uframe)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4751) 100 * uframe_periodic_max/125, uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4753) if (uframe_periodic_max != 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4754) fotg210_warn(fotg210, "max periodic bandwidth set is non-standard\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4756) fotg210->uframe_periodic_max = uframe_periodic_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4757) ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4759) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4760) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4761) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4764) static DEVICE_ATTR_RW(uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4766) static inline int create_sysfs_files(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4767) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4768) struct device *controller = fotg210_to_hcd(fotg210)->self.controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4770) return device_create_file(controller, &dev_attr_uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4773) static inline void remove_sysfs_files(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4774) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4775) struct device *controller = fotg210_to_hcd(fotg210)->self.controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4777) device_remove_file(controller, &dev_attr_uframe_periodic_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4779) /* On some systems, leaving remote wakeup enabled prevents system shutdown.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4780) * The firmware seems to think that powering off is a wakeup event!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4781) * This routine turns off remote wakeup and everything else, on all ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4782) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4783) static void fotg210_turn_off_all_ports(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4785) u32 __iomem *status_reg = &fotg210->regs->port_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4787) fotg210_writel(fotg210, PORT_RWC_BITS, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4790) /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4791) * Must be called with interrupts enabled and the lock not held.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4792) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4793) static void fotg210_silence_controller(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4795) fotg210_halt(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4797) spin_lock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4798) fotg210->rh_state = FOTG210_RH_HALTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4799) fotg210_turn_off_all_ports(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4800) spin_unlock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4803) /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4804) * This forcibly disables dma and IRQs, helping kexec and other cases
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4805) * where the next system software may expect clean state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4806) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4807) static void fotg210_shutdown(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4808) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4809) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4811) spin_lock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4812) fotg210->shutdown = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4813) fotg210->rh_state = FOTG210_RH_STOPPING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4814) fotg210->enabled_hrtimer_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4815) spin_unlock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4817) fotg210_silence_controller(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4819) hrtimer_cancel(&fotg210->hrtimer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4822) /* fotg210_work is called from some interrupts, timers, and so on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4823) * it calls driver completion functions, after dropping fotg210->lock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4824) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4825) static void fotg210_work(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4827) /* another CPU may drop fotg210->lock during a schedule scan while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4828) * it reports urb completions. this flag guards against bogus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4829) * attempts at re-entrant schedule scanning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4830) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4831) if (fotg210->scanning) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4832) fotg210->need_rescan = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4833) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4835) fotg210->scanning = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4837) rescan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4838) fotg210->need_rescan = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4839) if (fotg210->async_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4840) scan_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4841) if (fotg210->intr_count > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4842) scan_intr(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4843) if (fotg210->isoc_count > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4844) scan_isoc(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4845) if (fotg210->need_rescan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4846) goto rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4847) fotg210->scanning = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4849) /* the IO watchdog guards against hardware or driver bugs that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4850) * misplace IRQs, and should let us run completely without IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4851) * such lossage has been observed on both VT6202 and VT8235.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4852) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4853) turn_on_io_watchdog(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4856) /* Called when the fotg210_hcd module is removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4857) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4858) static void fotg210_stop(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4859) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4860) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4862) fotg210_dbg(fotg210, "stop\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4864) /* no more interrupts ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4866) spin_lock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4867) fotg210->enabled_hrtimer_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4868) spin_unlock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4870) fotg210_quiesce(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4871) fotg210_silence_controller(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4872) fotg210_reset(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4874) hrtimer_cancel(&fotg210->hrtimer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4875) remove_sysfs_files(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4876) remove_debug_files(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4878) /* root hub is shut down separately (first, when possible) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4879) spin_lock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4880) end_free_itds(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4881) spin_unlock_irq(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4882) fotg210_mem_cleanup(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4884) #ifdef FOTG210_STATS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4885) fotg210_dbg(fotg210, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4886) fotg210->stats.normal, fotg210->stats.error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4887) fotg210->stats.iaa, fotg210->stats.lost_iaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4888) fotg210_dbg(fotg210, "complete %ld unlink %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4889) fotg210->stats.complete, fotg210->stats.unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4890) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4892) dbg_status(fotg210, "fotg210_stop completed",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4893) fotg210_readl(fotg210, &fotg210->regs->status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4896) /* one-time init, only for memory state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4897) static int hcd_fotg210_init(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4898) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4899) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4900) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4901) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4902) u32 hcc_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4903) struct fotg210_qh_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4905) spin_lock_init(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4907) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4908) * keep io watchdog by default, those good HCDs could turn off it later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4909) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4910) fotg210->need_io_watchdog = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4912) hrtimer_init(&fotg210->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4913) fotg210->hrtimer.function = fotg210_hrtimer_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4914) fotg210->next_hrtimer_event = FOTG210_HRTIMER_NO_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4916) hcc_params = fotg210_readl(fotg210, &fotg210->caps->hcc_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4918) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4919) * by default set standard 80% (== 100 usec/uframe) max periodic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4920) * bandwidth as required by USB 2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4921) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4922) fotg210->uframe_periodic_max = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4924) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4925) * hw default: 1K periodic list heads, one per frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4926) * periodic_size can shrink by USBCMD update if hcc_params allows.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4927) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4928) fotg210->periodic_size = DEFAULT_I_TDPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4929) INIT_LIST_HEAD(&fotg210->intr_qh_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4930) INIT_LIST_HEAD(&fotg210->cached_itd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4932) if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4933) /* periodic schedule size can be smaller than default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4934) switch (FOTG210_TUNE_FLS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4935) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4936) fotg210->periodic_size = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4937) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4938) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4939) fotg210->periodic_size = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4940) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4941) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4942) fotg210->periodic_size = 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4943) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4944) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4945) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4947) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4948) retval = fotg210_mem_init(fotg210, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4949) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4950) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4952) /* controllers may cache some of the periodic schedule ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4953) fotg210->i_thresh = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4955) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4956) * dedicate a qh for the async ring head, since we couldn't unlink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4957) * a 'real' qh without stopping the async schedule [4.8]. use it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4958) * as the 'reclamation list head' too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4959) * its dummy is used in hw_alt_next of many tds, to prevent the qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4960) * from automatically advancing to the next td after short reads.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4961) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4962) fotg210->async->qh_next.qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4963) hw = fotg210->async->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4964) hw->hw_next = QH_NEXT(fotg210, fotg210->async->qh_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4965) hw->hw_info1 = cpu_to_hc32(fotg210, QH_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4966) hw->hw_token = cpu_to_hc32(fotg210, QTD_STS_HALT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4967) hw->hw_qtd_next = FOTG210_LIST_END(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4968) fotg210->async->qh_state = QH_STATE_LINKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4969) hw->hw_alt_next = QTD_NEXT(fotg210, fotg210->async->dummy->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4971) /* clear interrupt enables, set irq latency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4972) if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4973) log2_irq_thresh = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4974) temp = 1 << (16 + log2_irq_thresh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4975) if (HCC_CANPARK(hcc_params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4976) /* HW default park == 3, on hardware that supports it (like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4977) * NVidia and ALI silicon), maximizes throughput on the async
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4978) * schedule by avoiding QH fetches between transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4979) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4980) * With fast usb storage devices and NForce2, "park" seems to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4981) * make problems: throughput reduction (!), data errors...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4982) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4983) if (park) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4984) park = min_t(unsigned, park, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4985) temp |= CMD_PARK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4986) temp |= park << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4988) fotg210_dbg(fotg210, "park %d\n", park);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4989) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4990) if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4991) /* periodic schedule size can be smaller than default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4992) temp &= ~(3 << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4993) temp |= (FOTG210_TUNE_FLS << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4995) fotg210->command = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4997) /* Accept arbitrarily long scatter-gather lists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4998) if (!hcd->localmem_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4999) hcd->self.sg_tablesize = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5000) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5003) /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5004) static int fotg210_run(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5005) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5006) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5007) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5009) hcd->uses_new_polling = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5011) /* EHCI spec section 4.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5013) fotg210_writel(fotg210, fotg210->periodic_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5014) &fotg210->regs->frame_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5015) fotg210_writel(fotg210, (u32)fotg210->async->qh_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5016) &fotg210->regs->async_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5018) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5019) * hcc_params controls whether fotg210->regs->segment must (!!!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5020) * be used; it constrains QH/ITD/SITD and QTD locations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5021) * dma_pool consistent memory always uses segment zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5022) * streaming mappings for I/O buffers, like pci_map_single(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5023) * can return segments above 4GB, if the device allows.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5024) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5025) * NOTE: the dma mask is visible through dev->dma_mask, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5026) * drivers can pass this info along ... like NETIF_F_HIGHDMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5027) * Scsi_Host.highmem_io, and so forth. It's readonly to all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5028) * host side drivers though.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5029) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5030) fotg210_readl(fotg210, &fotg210->caps->hcc_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5032) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5033) * Philips, Intel, and maybe others need CMD_RUN before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5034) * root hub will detect new devices (why?); NEC doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5035) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5036) fotg210->command &= ~(CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5037) fotg210->command |= CMD_RUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5038) fotg210_writel(fotg210, fotg210->command, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5039) dbg_cmd(fotg210, "init", fotg210->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5041) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5042) * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5043) * are explicitly handed to companion controller(s), so no TT is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5044) * involved with the root hub. (Except where one is integrated,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5045) * and there's no companion controller unless maybe for USB OTG.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5046) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5047) * Turning on the CF flag will transfer ownership of all ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5048) * from the companions to the EHCI controller. If any of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5049) * companions are in the middle of a port reset at the time, it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5050) * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5051) * guarantees that no resets are in progress. After we set CF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5052) * a short delay lets the hardware catch up; new resets shouldn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5053) * be started before the port switching actions could complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5054) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5055) down_write(&ehci_cf_port_reset_rwsem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5056) fotg210->rh_state = FOTG210_RH_RUNNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5057) /* unblock posted writes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5058) fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5059) usleep_range(5000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5060) up_write(&ehci_cf_port_reset_rwsem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5061) fotg210->last_periodic_enable = ktime_get_real();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5063) temp = HC_VERSION(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5064) fotg210_readl(fotg210, &fotg210->caps->hc_capbase));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5065) fotg210_info(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5066) "USB %x.%x started, EHCI %x.%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5067) ((fotg210->sbrn & 0xf0) >> 4), (fotg210->sbrn & 0x0f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5068) temp >> 8, temp & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5070) fotg210_writel(fotg210, INTR_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5071) &fotg210->regs->intr_enable); /* Turn On Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5073) /* GRR this is run-once init(), being done every time the HC starts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5074) * So long as they're part of class devices, we can't do it init()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5075) * since the class device isn't created that early.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5076) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5077) create_debug_files(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5078) create_sysfs_files(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5080) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5083) static int fotg210_setup(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5084) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5085) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5086) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5088) fotg210->regs = (void __iomem *)fotg210->caps +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5089) HC_LENGTH(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5090) fotg210_readl(fotg210, &fotg210->caps->hc_capbase));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5091) dbg_hcs_params(fotg210, "reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5092) dbg_hcc_params(fotg210, "reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5094) /* cache this readonly data; minimize chip reads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5095) fotg210->hcs_params = fotg210_readl(fotg210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5096) &fotg210->caps->hcs_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5098) fotg210->sbrn = HCD_USB2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5100) /* data structure init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5101) retval = hcd_fotg210_init(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5102) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5103) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5105) retval = fotg210_halt(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5106) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5107) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5109) fotg210_reset(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5114) static irqreturn_t fotg210_irq(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5116) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5117) u32 status, masked_status, pcd_status = 0, cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5118) int bh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5120) spin_lock(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5122) status = fotg210_readl(fotg210, &fotg210->regs->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5124) /* e.g. cardbus physical eject */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5125) if (status == ~(u32) 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5126) fotg210_dbg(fotg210, "device removed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5127) goto dead;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5130) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5131) * We don't use STS_FLR, but some controllers don't like it to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5132) * remain on, so mask it out along with the other status bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5134) masked_status = status & (INTR_MASK | STS_FLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5136) /* Shared IRQ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5137) if (!masked_status ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5138) unlikely(fotg210->rh_state == FOTG210_RH_HALTED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5139) spin_unlock(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5140) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5143) /* clear (just) interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5144) fotg210_writel(fotg210, masked_status, &fotg210->regs->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5145) cmd = fotg210_readl(fotg210, &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5146) bh = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5148) /* unrequested/ignored: Frame List Rollover */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5149) dbg_status(fotg210, "irq", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5151) /* INT, ERR, and IAA interrupt rates can be throttled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5153) /* normal [4.15.1.2] or error [4.15.1.1] completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5154) if (likely((status & (STS_INT|STS_ERR)) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5155) if (likely((status & STS_ERR) == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5156) INCR(fotg210->stats.normal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5157) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5158) INCR(fotg210->stats.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5159) bh = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5162) /* complete the unlinking of some qh [4.15.2.3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5163) if (status & STS_IAA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5165) /* Turn off the IAA watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5166) fotg210->enabled_hrtimer_events &=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5167) ~BIT(FOTG210_HRTIMER_IAA_WATCHDOG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5170) * Mild optimization: Allow another IAAD to reset the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5171) * hrtimer, if one occurs before the next expiration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5172) * In theory we could always cancel the hrtimer, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5173) * tests show that about half the time it will be reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5174) * for some other event anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5176) if (fotg210->next_hrtimer_event == FOTG210_HRTIMER_IAA_WATCHDOG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5177) ++fotg210->next_hrtimer_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5179) /* guard against (alleged) silicon errata */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5180) if (cmd & CMD_IAAD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5181) fotg210_dbg(fotg210, "IAA with IAAD still set?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5182) if (fotg210->async_iaa) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5183) INCR(fotg210->stats.iaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5184) end_unlink_async(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5185) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5186) fotg210_dbg(fotg210, "IAA with nothing unlinked?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5189) /* remote wakeup [4.3.1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5190) if (status & STS_PCD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5191) int pstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5192) u32 __iomem *status_reg = &fotg210->regs->port_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5194) /* kick root hub later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5195) pcd_status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5197) /* resume root hub? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5198) if (fotg210->rh_state == FOTG210_RH_SUSPENDED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5199) usb_hcd_resume_root_hub(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5201) pstatus = fotg210_readl(fotg210, status_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5203) if (test_bit(0, &fotg210->suspended_ports) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5204) ((pstatus & PORT_RESUME) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5205) !(pstatus & PORT_SUSPEND)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5206) (pstatus & PORT_PE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5207) fotg210->reset_done[0] == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5209) /* start 20 msec resume signaling from this port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5210) * and make hub_wq collect PORT_STAT_C_SUSPEND to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5211) * stop that signaling. Use 5 ms extra for safety,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5212) * like usb_port_resume() does.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5214) fotg210->reset_done[0] = jiffies + msecs_to_jiffies(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5215) set_bit(0, &fotg210->resuming_ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5216) fotg210_dbg(fotg210, "port 1 remote wakeup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5217) mod_timer(&hcd->rh_timer, fotg210->reset_done[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5221) /* PCI errors [4.15.2.4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5222) if (unlikely((status & STS_FATAL) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5223) fotg210_err(fotg210, "fatal error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5224) dbg_cmd(fotg210, "fatal", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5225) dbg_status(fotg210, "fatal", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5226) dead:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5227) usb_hc_died(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5229) /* Don't let the controller do anything more */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5230) fotg210->shutdown = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5231) fotg210->rh_state = FOTG210_RH_STOPPING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5232) fotg210->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5233) fotg210_writel(fotg210, fotg210->command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5234) &fotg210->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5235) fotg210_writel(fotg210, 0, &fotg210->regs->intr_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5236) fotg210_handle_controller_death(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5238) /* Handle completions when the controller stops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5239) bh = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5242) if (bh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5243) fotg210_work(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5244) spin_unlock(&fotg210->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5245) if (pcd_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5246) usb_hcd_poll_rh_status(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5247) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5250) /* non-error returns are a promise to giveback() the urb later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5251) * we drop ownership so next owner (or urb unlink) can get it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5252) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5253) * urb + dev is in hcd.self.controller.urb_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5254) * we're queueing TDs onto software and hardware lists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5255) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5256) * hcd-specific init for hcpriv hasn't been done yet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5257) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5258) * NOTE: control, bulk, and interrupt share the same code to append TDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5259) * to a (possibly active) QH, and the same QH scanning code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5261) static int fotg210_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5262) gfp_t mem_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5264) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5265) struct list_head qtd_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5267) INIT_LIST_HEAD(&qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5269) switch (usb_pipetype(urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5270) case PIPE_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5271) /* qh_completions() code doesn't handle all the fault cases
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5272) * in multi-TD control transfers. Even 1KB is rare anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5274) if (urb->transfer_buffer_length > (16 * 1024))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5275) return -EMSGSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5276) /* FALLTHROUGH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5277) /* case PIPE_BULK: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5278) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5279) if (!qh_urb_transaction(fotg210, urb, &qtd_list, mem_flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5280) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5281) return submit_async(fotg210, urb, &qtd_list, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5283) case PIPE_INTERRUPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5284) if (!qh_urb_transaction(fotg210, urb, &qtd_list, mem_flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5285) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5286) return intr_submit(fotg210, urb, &qtd_list, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5288) case PIPE_ISOCHRONOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5289) return itd_submit(fotg210, urb, mem_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5293) /* remove from hardware lists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5294) * completions normally happen asynchronously
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5297) static int fotg210_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5299) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5300) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5301) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5302) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5304) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5305) rc = usb_hcd_check_unlink_urb(hcd, urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5306) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5307) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5309) switch (usb_pipetype(urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5310) /* case PIPE_CONTROL: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5311) /* case PIPE_BULK:*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5312) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5313) qh = (struct fotg210_qh *) urb->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5314) if (!qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5315) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5316) switch (qh->qh_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5317) case QH_STATE_LINKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5318) case QH_STATE_COMPLETING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5319) start_unlink_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5320) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5321) case QH_STATE_UNLINK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5322) case QH_STATE_UNLINK_WAIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5323) /* already started */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5324) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5325) case QH_STATE_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5326) /* QH might be waiting for a Clear-TT-Buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5327) qh_completions(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5328) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5332) case PIPE_INTERRUPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5333) qh = (struct fotg210_qh *) urb->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5334) if (!qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5336) switch (qh->qh_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5337) case QH_STATE_LINKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5338) case QH_STATE_COMPLETING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5339) start_unlink_intr(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5340) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5341) case QH_STATE_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5342) qh_completions(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5344) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5345) fotg210_dbg(fotg210, "bogus qh %p state %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5346) qh, qh->qh_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5347) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5349) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5351) case PIPE_ISOCHRONOUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5352) /* itd... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5354) /* wait till next completion, do it then. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5355) /* completion irqs can wait up to 1024 msec, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5356) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5358) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5359) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5360) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5363) /* bulk qh holds the data toggle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5365) static void fotg210_endpoint_disable(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5366) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5368) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5369) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5370) struct fotg210_qh *qh, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5372) /* ASSERT: any requests/urbs are being unlinked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5373) /* ASSERT: nobody can be submitting urbs for this any more */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5375) rescan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5376) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5377) qh = ep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5378) if (!qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5379) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5381) /* endpoints can be iso streams. for now, we don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5382) * accelerate iso completions ... so spin a while.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5384) if (qh->hw == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5385) struct fotg210_iso_stream *stream = ep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5387) if (!list_empty(&stream->td_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5388) goto idle_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5390) /* BUG_ON(!list_empty(&stream->free_list)); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5391) kfree(stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5392) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5395) if (fotg210->rh_state < FOTG210_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5396) qh->qh_state = QH_STATE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5397) switch (qh->qh_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5398) case QH_STATE_LINKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5399) case QH_STATE_COMPLETING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5400) for (tmp = fotg210->async->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5401) tmp && tmp != qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5402) tmp = tmp->qh_next.qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5403) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5404) /* periodic qh self-unlinks on empty, and a COMPLETING qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5405) * may already be unlinked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5407) if (tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5408) start_unlink_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5409) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5410) case QH_STATE_UNLINK: /* wait for hw to finish? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5411) case QH_STATE_UNLINK_WAIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5412) idle_timeout:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5413) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5414) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5415) goto rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5416) case QH_STATE_IDLE: /* fully unlinked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5417) if (qh->clearing_tt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5418) goto idle_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5419) if (list_empty(&qh->qtd_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5420) qh_destroy(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5421) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5423) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5424) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5425) /* caller was supposed to have unlinked any requests;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5426) * that's not our job. just leak this memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5427) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5428) fotg210_err(fotg210, "qh %p (#%02x) state %d%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5429) qh, ep->desc.bEndpointAddress, qh->qh_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5430) list_empty(&qh->qtd_list) ? "" : "(has tds)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5431) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5433) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5434) ep->hcpriv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5435) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5438) static void fotg210_endpoint_reset(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5439) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5441) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5442) struct fotg210_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5443) int eptype = usb_endpoint_type(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5444) int epnum = usb_endpoint_num(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5445) int is_out = usb_endpoint_dir_out(&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5446) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5448) if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5449) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5451) spin_lock_irqsave(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5452) qh = ep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5454) /* For Bulk and Interrupt endpoints we maintain the toggle state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5455) * in the hardware; the toggle bits in udev aren't used at all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5456) * When an endpoint is reset by usb_clear_halt() we must reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5457) * the toggle bit in the QH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5458) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5459) if (qh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5460) usb_settoggle(qh->dev, epnum, is_out, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5461) if (!list_empty(&qh->qtd_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5462) WARN_ONCE(1, "clear_halt for a busy endpoint\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5463) } else if (qh->qh_state == QH_STATE_LINKED ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5464) qh->qh_state == QH_STATE_COMPLETING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5466) /* The toggle value in the QH can't be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5467) * while the QH is active. Unlink it now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5468) * re-linking will call qh_refresh().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5469) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5470) if (eptype == USB_ENDPOINT_XFER_BULK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5471) start_unlink_async(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5472) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5473) start_unlink_intr(fotg210, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5476) spin_unlock_irqrestore(&fotg210->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5479) static int fotg210_get_frame(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5481) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5483) return (fotg210_read_frame_index(fotg210) >> 3) %
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5484) fotg210->periodic_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5487) /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5488) * because its registers (and irq) are shared between host/gadget/otg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5489) * functions and in order to facilitate role switching we cannot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5490) * give the fotg210 driver exclusive access to those.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5491) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5492) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5493) MODULE_AUTHOR(DRIVER_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5494) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5496) static const struct hc_driver fotg210_fotg210_hc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5497) .description = hcd_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5498) .product_desc = "Faraday USB2.0 Host Controller",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5499) .hcd_priv_size = sizeof(struct fotg210_hcd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5501) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5502) * generic hardware linkage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5503) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5504) .irq = fotg210_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5505) .flags = HCD_MEMORY | HCD_DMA | HCD_USB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5507) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5508) * basic lifecycle operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5509) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5510) .reset = hcd_fotg210_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5511) .start = fotg210_run,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5512) .stop = fotg210_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5513) .shutdown = fotg210_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5515) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5516) * managing i/o requests and associated device resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5517) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5518) .urb_enqueue = fotg210_urb_enqueue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5519) .urb_dequeue = fotg210_urb_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5520) .endpoint_disable = fotg210_endpoint_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5521) .endpoint_reset = fotg210_endpoint_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5524) * scheduling support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5525) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5526) .get_frame_number = fotg210_get_frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5528) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5529) * root hub support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5530) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5531) .hub_status_data = fotg210_hub_status_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5532) .hub_control = fotg210_hub_control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5533) .bus_suspend = fotg210_bus_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5534) .bus_resume = fotg210_bus_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5536) .relinquish_port = fotg210_relinquish_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5537) .port_handed_over = fotg210_port_handed_over,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5539) .clear_tt_buffer_complete = fotg210_clear_tt_buffer_complete,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5540) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5542) static void fotg210_init(struct fotg210_hcd *fotg210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5544) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5546) iowrite32(GMIR_MDEV_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5547) &fotg210->regs->gmir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5549) value = ioread32(&fotg210->regs->otgcsr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5550) value &= ~OTGCSR_A_BUS_DROP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5551) value |= OTGCSR_A_BUS_REQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5552) iowrite32(value, &fotg210->regs->otgcsr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5555) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5556) * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5557) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5558) * Allocates basic resources for this USB host controller, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5559) * then invokes the start() method for the HCD associated with it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5560) * through the hotplug entry's driver_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5562) static int fotg210_hcd_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5564) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5565) struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5566) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5567) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5568) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5569) struct fotg210_hcd *fotg210;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5571) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5572) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5574) pdev->dev.power.power_state = PMSG_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5576) res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5577) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5578) dev_err(dev, "Found HC with no IRQ. Check %s setup!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5579) dev_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5580) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5583) irq = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5585) hcd = usb_create_hcd(&fotg210_fotg210_hc_driver, dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5586) dev_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5587) if (!hcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5588) dev_err(dev, "failed to create hcd\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5589) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5590) goto fail_create_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5593) hcd->has_tt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5595) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5596) hcd->regs = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5597) if (IS_ERR(hcd->regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5598) retval = PTR_ERR(hcd->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5599) goto failed_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5602) hcd->rsrc_start = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5603) hcd->rsrc_len = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5605) fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5607) fotg210->caps = hcd->regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5609) /* It's OK not to supply this clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5610) fotg210->pclk = clk_get(dev, "PCLK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5611) if (!IS_ERR(fotg210->pclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5612) retval = clk_prepare_enable(fotg210->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5613) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5614) dev_err(dev, "failed to enable PCLK\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5615) goto failed_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5617) } else if (PTR_ERR(fotg210->pclk) == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5619) * Percolate deferrals, for anything else,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5620) * just live without the clocking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5622) retval = PTR_ERR(fotg210->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5623) goto failed_dis_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5626) retval = fotg210_setup(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5627) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5628) goto failed_dis_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5630) fotg210_init(fotg210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5632) retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5633) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5634) dev_err(dev, "failed to add hcd with err %d\n", retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5635) goto failed_dis_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5637) device_wakeup_enable(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5638) platform_set_drvdata(pdev, hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5640) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5642) failed_dis_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5643) if (!IS_ERR(fotg210->pclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5644) clk_disable_unprepare(fotg210->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5645) clk_put(fotg210->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5647) failed_put_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5648) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5649) fail_create_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5650) dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5651) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5654) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5655) * fotg210_hcd_remove - shutdown processing for EHCI HCDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5656) * @dev: USB Host Controller being removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5657) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5659) static int fotg210_hcd_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5661) struct usb_hcd *hcd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5662) struct fotg210_hcd *fotg210 = hcd_to_fotg210(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5664) if (!IS_ERR(fotg210->pclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5665) clk_disable_unprepare(fotg210->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5666) clk_put(fotg210->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5669) usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5670) usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5672) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5675) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5676) static const struct of_device_id fotg210_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5677) { .compatible = "faraday,fotg210" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5678) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5679) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5680) MODULE_DEVICE_TABLE(of, fotg210_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5681) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5683) static struct platform_driver fotg210_hcd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5684) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5685) .name = "fotg210-hcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5686) .of_match_table = of_match_ptr(fotg210_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5687) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5688) .probe = fotg210_hcd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5689) .remove = fotg210_hcd_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5692) static int __init fotg210_hcd_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5694) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5696) if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5697) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5699) pr_info("%s: " DRIVER_DESC "\n", hcd_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5700) set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5701) if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5702) test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5703) pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5705) pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5706) hcd_name, sizeof(struct fotg210_qh),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5707) sizeof(struct fotg210_qtd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5708) sizeof(struct fotg210_itd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5710) fotg210_debug_root = debugfs_create_dir("fotg210", usb_debug_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5712) retval = platform_driver_register(&fotg210_hcd_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5713) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5714) goto clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5715) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5717) clean:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5718) debugfs_remove(fotg210_debug_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5719) fotg210_debug_root = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5721) clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5722) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5724) module_init(fotg210_hcd_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5726) static void __exit fotg210_hcd_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5727) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5728) platform_driver_unregister(&fotg210_hcd_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5729) debugfs_remove(fotg210_debug_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5730) clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5732) module_exit(fotg210_hcd_cleanup);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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