^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2001-2004 by David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) /* this file is part of ehci-hcd.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * buffers needed for the larger number). We use one QH per endpoint, queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * multiple urbs (all three types) per endpoint. URBs may need several qtds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * interrupts) needs careful scheduling. Performance improvements can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * an ongoing challenge. That's in "ehci-sched.c".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * (b) special fields in qh entries or (c) split iso entries. TTs will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * buffer low/full speed data so the host collects it at high speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* PID Codes that are used here, from EHCI specification, Table 3-16. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PID_CODE_IN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PID_CODE_SETUP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* fill a qtd, returning how much of the buffer we were able to queue up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) size_t len, int token, int maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int i, count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u64 addr = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* one buffer entry per 4K ... first might be short or unaligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) count = 0x1000 - (buf & 0x0fff); /* rest of that page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (likely (len < count)) /* ... iff needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) count = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) buf += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) buf &= ~0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* per-qtd limit: from 16K to 20K (best alignment) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) for (i = 1; count < len && i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) addr = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) (u32)(addr >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) buf += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if ((count + 0x1000) < len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) count += 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) count = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* short packets may only terminate transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (count != len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) count -= (count % maxpacket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) qtd->length = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct ehci_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* writes to an active overlay are unsafe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) WARN_ON(qh->qh_state != QH_STATE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) hw->hw_alt_next = EHCI_LIST_END(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Except for control endpoints, we make hardware maintain data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * and set the pseudo-toggle in udev. Only usb_clear_halt() will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * ever clear it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) unsigned is_out, epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) is_out = qh->is_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (unlikely(!usb_gettoggle(qh->ps.udev, epnum, is_out))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) usb_settoggle(qh->ps.udev, epnum, is_out, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* if it weren't for a common silicon quirk (writing the dummy into the qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * recovery (including urb dequeue) would need software changes to a QH...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct ehci_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * first qtd may already be partially processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * If we come here during unlink, the QH overlay region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * might have reference to the just unlinked qtd. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * qtd is updated in qh_completions(). Update the QH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * overlay here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (qh->hw->hw_token & ACTIVE_BIT(ehci)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) qh->hw->hw_qtd_next = qtd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (qh->should_be_inactive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ehci_warn(ehci, "qh %p should be inactive!\n", qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) qh_update(ehci, qh, qtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) qh->should_be_inactive = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct usb_host_endpoint *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct ehci_hcd *ehci = hcd_to_ehci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct ehci_qh *qh = ep->hcpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) spin_lock_irqsave(&ehci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) qh->clearing_tt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) && ehci->rh_state == EHCI_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) qh_link_async(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) spin_unlock_irqrestore(&ehci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct urb *urb, u32 token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* If an async split transaction gets an error or is unlinked,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * the TT buffer may be left in an indeterminate state. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * have to clear the TT buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * Note: this routine is never called for Isochronous transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #ifdef CONFIG_DYNAMIC_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct usb_device *tt = urb->dev->tt->hub;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) dev_dbg(&tt->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) "clear tt buffer port %d, a%d ep%d t%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) urb->dev->ttport, urb->dev->devnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) usb_pipeendpoint(urb->pipe), token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #endif /* CONFIG_DYNAMIC_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!ehci_is_TDI(ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) || urb->dev->tt->hub !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ehci_to_hcd(ehci)->self.root_hub) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (usb_hub_clear_tt_buffer(urb) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) qh->clearing_tt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* REVISIT ARC-derived cores don't clear the root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * hub TT buffer in this way...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int qtd_copy_status (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct ehci_hcd *ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) size_t length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) u32 token
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* count IN/OUT bytes, not SETUP (even short packets) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (likely(QTD_PID(token) != PID_CODE_SETUP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) urb->actual_length += length - QTD_LENGTH (token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* don't modify error codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (unlikely(urb->unlinked))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* force cleanup after short read; not always an error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (unlikely (IS_SHORT_READ (token)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) status = -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* serious "can't proceed" faults reported by the hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (token & QTD_STS_HALT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (token & QTD_STS_BABBLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* FIXME "must" disable babbling device's port too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) status = -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * When MMF is active and PID Code is IN, queue is halted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * EHCI Specification, Table 4-13.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) } else if ((token & QTD_STS_MMF) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) (QTD_PID(token) == PID_CODE_IN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* CERR nonzero + halt --> stall */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) } else if (QTD_CERR(token)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) status = -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* In theory, more than one of the following bits can be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * since they are sticky and the transaction is retried.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * Which to test first is rather arbitrary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) } else if (token & QTD_STS_MMF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* fs/ls interrupt xfer missed the complete-split */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) } else if (token & QTD_STS_DBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) status = (QTD_PID (token) == 1) /* IN ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ? -ENOSR /* hc couldn't read data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) : -ECOMM; /* hc couldn't write data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) } else if (token & QTD_STS_XACT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* timeout, bad CRC, wrong PID, etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) urb->dev->devpath,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) usb_pipeendpoint(urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) usb_pipein(urb->pipe) ? "in" : "out");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) } else { /* unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* ... update hc-wide periodic stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (unlikely(urb->unlinked)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) INCR(ehci->stats.unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* report non-error and short read status as zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (status == -EINPROGRESS || status == -EREMOTEIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) INCR(ehci->stats.complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #ifdef EHCI_URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ehci_dbg (ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) "%s %s urb %p ep%d%s status %d len %d/%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) __func__, urb->dev->devpath, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) usb_pipeendpoint (urb->pipe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) usb_pipein (urb->pipe) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) urb->actual_length, urb->transfer_buffer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * Process and free completed qtds for a qh, returning URBs to drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * Chases up to qh->hw_current. Returns nonzero if the caller should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * unlink qh.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static unsigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct ehci_qtd *last, *end = qh->dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct list_head *entry, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int last_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u8 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct ehci_qh_hw *hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* completions (or tasks on other cpus) must never clobber HALT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * till we've gone through and cleaned everything up, even when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * they add urbs to this qh's queue or mark them for unlinking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * NOTE: unlinking expects to be done in queue order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * It's a bug for qh->qh_state to be anything other than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * QH_STATE_IDLE, unless our caller is scan_async() or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * scan_intr().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) state = qh->qh_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) qh->qh_state = QH_STATE_COMPLETING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) stopped = (state == QH_STATE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) rescan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) last = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) last_status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) qh->dequeue_during_giveback = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* remove de-activated QTDs from front of queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * after faults (including short reads), cleanup this urb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * then let the queue advance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * if queue is stopped, handles unlinks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) list_for_each_safe (entry, tmp, &qh->qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct ehci_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct urb *urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u32 token = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) qtd = list_entry (entry, struct ehci_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) urb = qtd->urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* clean up any state from previous QTD ...*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (last) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (likely (last->urb != urb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) ehci_urb_done(ehci, last->urb, last_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) last_status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ehci_qtd_free (ehci, last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) last = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* ignore urbs submitted during completions we reported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (qtd == end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /* hardware copies qtd out of qh overlay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) rmb ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) token = hc32_to_cpu(ehci, qtd->hw_token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /* always clean up qtds the hc de-activated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) retry_xacterr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if ((token & QTD_STS_ACTIVE) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* Report Data Buffer Error: non-fatal but useful */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (token & QTD_STS_DBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ehci_dbg(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) usb_endpoint_num(&urb->ep->desc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) urb->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) qtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* on STALL, error, and short reads this urb must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * complete and all its qtds must be recycled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if ((token & QTD_STS_HALT) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* retry transaction errors until we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * reach the software xacterr limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if ((token & QTD_STS_XACT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) QTD_CERR(token) == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) ++qh->xacterrs < QH_XACTERR_MAX &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) !urb->unlinked) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ehci_dbg(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) "detected XactErr len %zu/%zu retry %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* reset the token in the qtd and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * qh overlay (which still contains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * the qtd) so that we pick up from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * where we left off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) token &= ~QTD_STS_HALT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) token |= QTD_STS_ACTIVE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) (EHCI_TUNE_CERR << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) qtd->hw_token = cpu_to_hc32(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) hw->hw_token = cpu_to_hc32(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) goto retry_xacterr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) qh->unlink_reason |= QH_UNLINK_HALTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* magic dummy for some short reads; qh won't advance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * that silicon quirk can kick in with this dummy too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * other short reads won't stop the queue, including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * control transfers (status stage handles that) or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * most other single-qtd reads ... the queue stops if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * URB_SHORT_NOT_OK was set so the driver submitting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * the urbs could clean it up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) } else if (IS_SHORT_READ (token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) && !(qtd->hw_alt_next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) & EHCI_LIST_END(ehci))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) qh->unlink_reason |= QH_UNLINK_SHORT_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* stop scanning when we reach qtds the hc is using */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) } else if (likely (!stopped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) && ehci->rh_state >= EHCI_RH_RUNNING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) /* scan the whole queue for unlinks whenever it stops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* cancel everything if we halt, suspend, etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (ehci->rh_state < EHCI_RH_RUNNING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) last_status = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) qh->unlink_reason |= QH_UNLINK_SHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* this qtd is active; skip it unless a previous qtd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * for its urb faulted, or its urb was canceled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) else if (last_status == -EINPROGRESS && !urb->unlinked)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * If this was the active qtd when the qh was unlinked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * and the overlay's token is active, then the overlay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * hasn't been written back to the qtd yet so use its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * token instead of the qtd's. After the qtd is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * processed and removed, the overlay won't be valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * any more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (state == QH_STATE_IDLE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) qh->qtd_list.next == &qtd->qtd_list &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) (hw->hw_token & ACTIVE_BIT(ehci))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) token = hc32_to_cpu(ehci, hw->hw_token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) hw->hw_token &= ~ACTIVE_BIT(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) qh->should_be_inactive = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* An unlink may leave an incomplete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * async transaction in the TT buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * We have to clear it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ehci_clear_tt_buffer(ehci, qh, urb, token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* unless we already know the urb's status, collect qtd status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * and update count of bytes transferred. in common short read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * cases with only one data qtd (including control transfers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * queue processing won't halt. but with two or more qtds (for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * example, with a 32 KB transfer), when the first qtd gets a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * short read the second must be removed by hand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (last_status == -EINPROGRESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) last_status = qtd_copy_status(ehci, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) qtd->length, token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (last_status == -EREMOTEIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) && (qtd->hw_alt_next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) & EHCI_LIST_END(ehci)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) last_status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /* As part of low/full-speed endpoint-halt processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * we must clear the TT buffer (11.17.5).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (unlikely(last_status != -EINPROGRESS &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) last_status != -EREMOTEIO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* The TT's in some hubs malfunction when they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * receive this request following a STALL (they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * stop sending isochronous packets). Since a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * STALL can't leave the TT buffer in a busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * state (if you believe Figures 11-48 - 11-51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) * in the USB 2.0 spec), we won't clear the TT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * buffer in this case. Strictly speaking this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * is a violation of the spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (last_status != -EPIPE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ehci_clear_tt_buffer(ehci, qh, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* if we're removing something not at the queue head,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) * patch the hardware queue pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) last = list_entry (qtd->qtd_list.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) struct ehci_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) last->hw_next = qtd->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /* remove qtd; it's recycled after possible urb completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) list_del (&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) last = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) /* reinit the xacterr counter for the next qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) qh->xacterrs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* last urb's completion might still need calling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (likely (last != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ehci_urb_done(ehci, last->urb, last_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ehci_qtd_free (ehci, last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /* Do we need to rescan for URBs dequeued during a giveback? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (unlikely(qh->dequeue_during_giveback)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* If the QH is already unlinked, do the rescan now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (state == QH_STATE_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) goto rescan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* Otherwise the caller must unlink the QH. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* restore original state; caller must unlink or relink */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) qh->qh_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) /* be sure the hardware's done with the qh before refreshing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) * it after fault cleanup, or recovering from silicon wrongly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * overlaying the dummy qtd (which reduces DMA chatter).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * We won't refresh a QH that's linked (after the HC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * stopped the queue). That avoids a race:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * - HC reads first part of QH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * - CPU updates that first part and the token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * - HC reads rest of that QH, including token
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * Result: HC gets an inconsistent image, and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * DMAs to/from the wrong memory (corrupting it).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * That should be rare for interrupt transfers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * except maybe high bandwidth ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) qh->unlink_reason |= QH_UNLINK_DUMMY_OVERLAY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* Let the caller know if the QH needs to be unlinked. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return qh->unlink_reason;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * reverse of qh_urb_transaction: free a list of TDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) * used for cleanup after errors, before HC sees an URB's TDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static void qtd_list_free (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) struct ehci_hcd *ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct list_head *qtd_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) struct list_head *entry, *temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) list_for_each_safe (entry, temp, qtd_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) struct ehci_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) qtd = list_entry (entry, struct ehci_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) list_del (&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ehci_qtd_free (ehci, qtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * create a list of filled qtds for this URB; won't link into qh.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static struct list_head *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) qh_urb_transaction (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct ehci_hcd *ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct list_head *head,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) gfp_t flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) struct ehci_qtd *qtd, *qtd_prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) dma_addr_t buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) int len, this_sg_len, maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int is_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) u32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * URBs map to sequences of QTDs: one logical transaction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) qtd = ehci_qtd_alloc (ehci, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (unlikely (!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) list_add_tail (&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) token = QTD_STS_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) token |= (EHCI_TUNE_CERR << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /* for split transactions, SplitXState initialized to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) len = urb->transfer_buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) is_input = usb_pipein (urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (usb_pipecontrol (urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /* SETUP pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) qtd_fill(ehci, qtd, urb->setup_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) sizeof (struct usb_ctrlrequest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) token | (2 /* "setup" */ << 8), 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* ... and always at least one more pid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) token ^= QTD_TOGGLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) qtd = ehci_qtd_alloc (ehci, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (unlikely (!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) list_add_tail (&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* for zero length DATA stages, STATUS is always IN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (len == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) token |= (1 /* "in" */ << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * data transfer stage: buffer setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) i = urb->num_mapped_sgs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (len > 0 && i > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) sg = urb->sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) buf = sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) /* urb->transfer_buffer_length may be smaller than the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) * size of the scatterlist (or vice versa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) this_sg_len = min_t(int, sg_dma_len(sg), len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) sg = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) buf = urb->transfer_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) this_sg_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) token |= (1 /* "in" */ << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* else it's already initted to "out" pid (0 << 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) maxpacket = usb_maxpacket(urb->dev, urb->pipe, !is_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) * buffer gets wrapped in one or more qtds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * last one may be "short" (including zero len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * and may serve as a control status ack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) int this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) maxpacket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) this_sg_len -= this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) len -= this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) buf += this_qtd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) * short reads advance to a "magic" dummy instead of the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) * qtd ... that forces the queue to stop, for manual cleanup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) * (this will usually be overridden later.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (is_input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) /* qh makes control packets use qtd toggle; maybe switch it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) token ^= QTD_TOGGLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (likely(this_sg_len <= 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (--i <= 0 || len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) sg = sg_next(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) buf = sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) this_sg_len = min_t(int, sg_dma_len(sg), len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) qtd = ehci_qtd_alloc (ehci, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (unlikely (!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) list_add_tail (&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) * unless the caller requires manual cleanup after short reads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * have the alt_next mechanism keep the queue running after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * last data qtd (the only one, for control and most other cases).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) || usb_pipecontrol (urb->pipe)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) qtd->hw_alt_next = EHCI_LIST_END(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) * control requests may need a terminating data "status" ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) * other OUT ones may need a terminating short packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) * (zero length).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (likely (urb->transfer_buffer_length != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) int one_more = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (usb_pipecontrol (urb->pipe)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) one_more = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) token ^= 0x0100; /* "in" <--> "out" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) token |= QTD_TOGGLE; /* force DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) } else if (usb_pipeout(urb->pipe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) && (urb->transfer_flags & URB_ZERO_PACKET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) && !(urb->transfer_buffer_length % maxpacket)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) one_more = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (one_more) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) qtd = ehci_qtd_alloc (ehci, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (unlikely (!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) list_add_tail (&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) /* never any data in such packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) qtd_fill(ehci, qtd, 0, 0, token, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) /* by default, enable interrupt on urb completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) qtd_list_free (ehci, urb, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) // Would be best to create all qh's from config descriptors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) // when each interface/altsetting is established. Unlink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) // any previous qh and cancel its urbs first; endpoints are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) // implicitly reset then (data toggle too).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) // That'd mean updating how usbcore talks to HCDs. (2.7?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * Each QH holds a qtd list; a QH is used for everything except iso.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * For interrupt urbs, the scheduler must set the microframe scheduling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * mask(s) each time the QH gets scheduled. For highspeed, that's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * just one microframe in the s-mask. For split interrupt transactions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * there are additional complications: c-mask, maybe FSTNs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static struct ehci_qh *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) qh_make (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct ehci_hcd *ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) gfp_t flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct usb_host_endpoint *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) u32 info1 = 0, info2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) int is_input, type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) int maxp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) int mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct usb_tt *tt = urb->dev->tt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct ehci_qh_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) if (!qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * init endpoint/device data for this QH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) info1 |= usb_pipeendpoint (urb->pipe) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) info1 |= usb_pipedevice (urb->pipe) << 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) is_input = usb_pipein (urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) type = usb_pipetype (urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) ep = usb_pipe_endpoint (urb->dev, urb->pipe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) maxp = usb_endpoint_maxp (&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) mult = usb_endpoint_maxp_mult (&ep->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) * acts like up to 3KB, but is built from smaller packets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (maxp > 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) ehci_dbg(ehci, "bogus qh maxpacket %d\n", maxp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) /* Compute interrupt scheduling parameters just once, and save.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * - allowing for high bandwidth, how many nsec/uframe are used?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) * - split transactions need a second CSPLIT uframe; same question
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) * - splits also need a schedule gap (for full/low speed I/O)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) * - qh has a polling interval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) * For control/bulk requests, the HC or TT handles these.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (type == PIPE_INTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) unsigned tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) is_input, 0, mult * maxp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) qh->ps.phase = NO_FRAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (urb->dev->speed == USB_SPEED_HIGH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) qh->ps.c_usecs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) qh->gap_uf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if (urb->interval > 1 && urb->interval < 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) /* NOTE interval 2 or 4 uframes could work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) * But interval 1 scheduling is simpler, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) * includes high bandwidth.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) urb->interval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) } else if (urb->interval > ehci->periodic_size << 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) urb->interval = ehci->periodic_size << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) qh->ps.period = urb->interval >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) /* period for bandwidth allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) 1 << (urb->ep->desc.bInterval - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /* Allow urb->interval to override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) qh->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) qh->ps.bw_period = qh->ps.bw_uperiod >> 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) int think_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) /* gap is f(FS/LS transfer times) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) is_input, 0, maxp) / (125 * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) /* FIXME this just approximates SPLIT/CSPLIT times */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (is_input) { // SPLIT, gap, CSPLIT+DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) qh->ps.c_usecs = qh->ps.usecs + HS_USECS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) qh->ps.usecs = HS_USECS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) } else { // SPLIT+DATA, gap, CSPLIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) qh->ps.usecs += HS_USECS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) qh->ps.c_usecs = HS_USECS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) think_time = tt ? tt->think_time : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) qh->ps.tt_usecs = NS_TO_US(think_time +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) usb_calc_bus_time (urb->dev->speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) is_input, 0, maxp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) if (urb->interval > ehci->periodic_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) urb->interval = ehci->periodic_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) qh->ps.period = urb->interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) /* period for bandwidth allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) urb->ep->desc.bInterval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) tmp = rounddown_pow_of_two(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* Allow urb->interval to override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) qh->ps.bw_period = min_t(unsigned, tmp, urb->interval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) qh->ps.bw_uperiod = qh->ps.bw_period << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) /* support for tt scheduling, and access to toggles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) qh->ps.udev = urb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) qh->ps.ep = urb->ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) /* using TT? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) switch (urb->dev->speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) case USB_SPEED_LOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) info1 |= QH_LOW_SPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) case USB_SPEED_FULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) /* EPS 0 means "full" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (type != PIPE_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) info1 |= (EHCI_TUNE_RL_TT << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) if (type == PIPE_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) info1 |= QH_CONTROL_EP; /* for TT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) info1 |= maxp << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) info2 |= (EHCI_TUNE_MULT_TT << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) /* Some Freescale processors have an erratum in which the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) * port number in the queue head was 0..N-1 instead of 1..N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) if (ehci_has_fsl_portno_bug(ehci))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) info2 |= (urb->dev->ttport-1) << 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) info2 |= urb->dev->ttport << 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) /* set the address of the TT; for TDI's integrated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) * root hub tt, leave it zeroed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) info2 |= tt->hub->devnum << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) case USB_SPEED_HIGH: /* no TT involved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) info1 |= QH_HIGH_SPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) if (type == PIPE_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) info1 |= (EHCI_TUNE_RL_HS << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) info1 |= 64 << 16; /* usb2 fixed maxpacket */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) info2 |= (EHCI_TUNE_MULT_HS << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) } else if (type == PIPE_BULK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) info1 |= (EHCI_TUNE_RL_HS << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) /* The USB spec says that high speed bulk endpoints
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) * always use 512 byte maxpacket. But some device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) * vendors decided to ignore that, and MSFT is happy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) * to help them do so. So now people expect to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) * such nonconformant devices with Linux too; sigh.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) info1 |= maxp << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) info2 |= (EHCI_TUNE_MULT_HS << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) } else { /* PIPE_INTERRUPT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) info1 |= maxp << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) info2 |= mult << 30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) urb->dev->speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) qh_destroy(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) /* init as live, toggle clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) qh->qh_state = QH_STATE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) hw = qh->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) hw->hw_info1 = cpu_to_hc32(ehci, info1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) hw->hw_info2 = cpu_to_hc32(ehci, info2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) qh->is_out = !is_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static void enable_async(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) if (ehci->async_count++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) /* Stop waiting to turn off the async schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) /* Don't start the schedule until ASS is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) ehci_poll_ASS(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) turn_on_io_watchdog(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) static void disable_async(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) if (--ehci->async_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) /* The async schedule and unlink lists are supposed to be empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) !list_empty(&ehci->async_idle));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /* Don't turn off the schedule until ASS is 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) ehci_poll_ASS(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) /* move qh (and its qtds) onto async queue; maybe enable queue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) struct ehci_qh *head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) /* Don't link a QH if there's a Clear-TT-Buffer pending */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if (unlikely(qh->clearing_tt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) WARN_ON(qh->qh_state != QH_STATE_IDLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /* clear halt and/or toggle; and maybe recover from silicon quirk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) qh_refresh(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) /* splice right after start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) head = ehci->async;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) qh->qh_next = head->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) qh->hw->hw_next = head->hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) wmb ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) head->qh_next.qh = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) head->hw->hw_next = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) qh->qh_state = QH_STATE_LINKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) qh->xacterrs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) qh->unlink_reason = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) /* qtd completions reported later by interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) enable_async(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * For control/bulk/interrupt, return QH with these TDs appended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * Allocates and initializes the QH if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * Returns null if it can't allocate a QH it needs to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * If the QH has TDs (urbs) already, that's great.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) static struct ehci_qh *qh_append_tds (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) struct ehci_hcd *ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) struct list_head *qtd_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) int epnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) void **ptr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) struct ehci_qh *qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) qh = (struct ehci_qh *) *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) if (unlikely (qh == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) /* can't sleep here, we have ehci->lock... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) qh = qh_make (ehci, urb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) *ptr = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) if (likely (qh != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) struct ehci_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) if (unlikely (list_empty (qtd_list)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) qtd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) qtd = list_entry (qtd_list->next, struct ehci_qtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) /* control qh may need patching ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) if (unlikely (epnum == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) /* usb_reset_device() briefly reverts to address 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) if (usb_pipedevice (urb->pipe) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) qh->hw->hw_info1 &= ~qh_addr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) /* just one way to queue requests: swap with the dummy qtd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) * only hc or qh_refresh() ever modify the overlay.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) if (likely (qtd != NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) struct ehci_qtd *dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) __hc32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) /* to avoid racing the HC, use the dummy td instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * the first td of our list (becomes new dummy). both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * tds stay deactivated until we're done, when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) * HC is allowed to fetch the old dummy (4.10.2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) token = qtd->hw_token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) qtd->hw_token = HALT_BIT(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) dummy = qh->dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) dma = dummy->qtd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) *dummy = *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) dummy->qtd_dma = dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) list_del (&qtd->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) list_add (&dummy->qtd_list, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) list_splice_tail(qtd_list, &qh->qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) qh->dummy = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) /* hc must see the new dummy at list end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) dma = qtd->qtd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) qtd = list_entry (qh->qtd_list.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) struct ehci_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) qtd->hw_next = QTD_NEXT(ehci, dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) /* let the hc process these next qtds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) wmb ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) dummy->hw_token = token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) urb->hcpriv = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) return qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) submit_async (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) struct ehci_hcd *ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) struct list_head *qtd_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) gfp_t mem_flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) int epnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) struct ehci_qh *qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) epnum = urb->ep->desc.bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) #ifdef EHCI_URB_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) struct ehci_qtd *qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) ehci_dbg(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) __func__, urb->dev->devpath, urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) urb->transfer_buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) qtd, urb->ep->hcpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) spin_lock_irqsave (&ehci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) rc = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) if (unlikely(qh == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) /* Control/bulk operations through TTs don't need scheduling,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) * the HC and TT handle it when the TT has a buffer ready.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) if (likely (qh->qh_state == QH_STATE_IDLE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) qh_link_async(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) spin_unlock_irqrestore (&ehci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (unlikely (qh == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) qtd_list_free (ehci, urb, qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) #ifdef CONFIG_USB_HCD_TEST_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) * This function creates the qtds and submits them for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * SINGLE_STEP_SET_FEATURE Test.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) * This is done in two parts: first SETUP req for GetDesc is sent then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) * 15 seconds later, the IN stage for GetDesc starts to req data from dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) * is_setup : i/p arguement decides which of the two stage needs to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) * performed; TRUE - SETUP and FALSE - IN+STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) * Returns 0 if success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) static int submit_single_step_set_feature(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) struct usb_hcd *hcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) struct urb *urb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) int is_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) struct ehci_hcd *ehci = hcd_to_ehci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) struct list_head qtd_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) struct list_head *head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) struct ehci_qtd *qtd, *qtd_prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) dma_addr_t buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) int len, maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) u32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) INIT_LIST_HEAD(&qtd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) head = &qtd_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) /* URBs map to sequences of QTDs: one logical transaction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) if (unlikely(!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) list_add_tail(&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) token = QTD_STS_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) token |= (EHCI_TUNE_CERR << 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) len = urb->transfer_buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) * Check if the request is to perform just the SETUP stage (getDesc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) * 15 secs after the setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if (is_setup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) /* SETUP pid, and interrupt after SETUP completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) qtd_fill(ehci, qtd, urb->setup_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) sizeof(struct usb_ctrlrequest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) QTD_IOC | token | (2 /* "setup" */ << 8), 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) return 0; /*Return now; we shall come back after 15 seconds*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) * IN: data transfer stage: buffer setup : start the IN txn phase for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) * the get_Desc SETUP which was sent 15seconds back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) token ^= QTD_TOGGLE; /*We need to start IN with DATA-1 Pid-sequence*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) buf = urb->transfer_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) token |= (1 /* "in" */ << 8); /*This is IN stage*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) maxpacket = usb_maxpacket(urb->dev, urb->pipe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) qtd_fill(ehci, qtd, buf, len, token, maxpacket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) * Our IN phase shall always be a short read; so keep the queue running
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) * and let it advance to the next qtd which zero length OUT status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) qtd->hw_alt_next = EHCI_LIST_END(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) /* STATUS stage for GetDesc control request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) token ^= 0x0100; /* "in" <--> "out" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) token |= QTD_TOGGLE; /* force DATA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) qtd_prev = qtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) if (unlikely(!qtd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) qtd->urb = urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) list_add_tail(&qtd->qtd_list, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) /* Interrupt after STATUS completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) qtd_fill(ehci, qtd, 0, 0, token | QTD_IOC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) qtd_list_free(ehci, urb, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) #endif /* CONFIG_USB_HCD_TEST_MODE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) struct ehci_qh *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) /* Add to the end of the list of QHs waiting for the next IAAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) qh->qh_state = QH_STATE_UNLINK_WAIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) list_add_tail(&qh->unlink_node, &ehci->async_unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) /* Unlink it from the schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) prev = ehci->async;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) while (prev->qh_next.qh != qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) prev = prev->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) prev->hw->hw_next = qh->hw->hw_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) prev->qh_next = qh->qh_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if (ehci->qh_scan_next == qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) ehci->qh_scan_next = qh->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) static void start_iaa_cycle(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) /* If the controller isn't running, we don't have to wait for it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) end_unlink_async(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) /* Otherwise start a new IAA cycle if one isn't already running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) } else if (ehci->rh_state == EHCI_RH_RUNNING &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) !ehci->iaa_in_progress) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) /* Make sure the unlinks are all visible to the hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) ehci_writel(ehci, ehci->command | CMD_IAAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) &ehci->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) ehci_readl(ehci, &ehci->regs->command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) ehci->iaa_in_progress = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) static void end_iaa_cycle(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) if (ehci->has_synopsys_hc_bug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) ehci_writel(ehci, (u32) ehci->async->qh_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) &ehci->regs->async_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) /* The current IAA cycle has ended */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) ehci->iaa_in_progress = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) end_unlink_async(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) /* See if the async qh for the qtds being unlinked are now gone from the HC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) static void end_unlink_async(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) struct ehci_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) bool early_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) if (list_empty(&ehci->async_unlink))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) unlink_node); /* QH whose IAA cycle just ended */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) * If async_unlinking is set then this routine is already running,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) * either on the stack or on another CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) early_exit = ehci->async_unlinking;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) /* If the controller isn't running, process all the waiting QHs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) if (ehci->rh_state < EHCI_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * Intel (?) bug: The HC can write back the overlay region even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) * after the IAA interrupt occurs. In self-defense, always go
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) * through two IAA cycles for each QH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) else if (qh->qh_state == QH_STATE_UNLINK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) * Second IAA cycle has finished. Process only the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) * waiting QH (NVIDIA (?) bug).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) list_move_tail(&qh->unlink_node, &ehci->async_idle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) * AMD/ATI (?) bug: The HC can continue to use an active QH long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) * after the IAA interrupt occurs. To prevent problems, QHs that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) * may still be active will wait until 2 ms have passed with no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) * change to the hw_current and hw_token fields (this delay occurs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) * between the two IAA cycles).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) * The EHCI spec (4.8.2) says that active QHs must not be removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) * from the async schedule and recommends waiting until the QH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) * goes inactive. This is ridiculous because the QH will _never_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) * become inactive if the endpoint NAKs indefinitely.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) /* Some reasons for unlinking guarantee the QH can't be active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) else if (qh->unlink_reason & (QH_UNLINK_HALTED |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) QH_UNLINK_SHORT_READ | QH_UNLINK_DUMMY_OVERLAY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) goto DelayDone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) /* The QH can't be active if the queue was and still is empty... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) else if ((qh->unlink_reason & QH_UNLINK_QUEUE_EMPTY) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) list_empty(&qh->qtd_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) goto DelayDone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) /* ... or if the QH has halted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) else if (qh->hw->hw_token & cpu_to_hc32(ehci, QTD_STS_HALT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) goto DelayDone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) /* Otherwise we have to wait until the QH stops changing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) __hc32 qh_current, qh_token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) qh_current = qh->hw->hw_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) qh_token = qh->hw->hw_token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) if (qh_current != ehci->old_current ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) qh_token != ehci->old_token) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) ehci->old_current = qh_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) ehci->old_token = qh_token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) ehci_enable_event(ehci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) EHCI_HRTIMER_ACTIVE_UNLINK, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) DelayDone:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) qh->qh_state = QH_STATE_UNLINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) early_exit = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) ehci->old_current = ~0; /* Prepare for next QH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) /* Start a new IAA cycle if any QHs are waiting for it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) if (!list_empty(&ehci->async_unlink))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) start_iaa_cycle(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) * Don't allow nesting or concurrent calls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) * or wait for the second IAA cycle for the next QH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) if (early_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) /* Process the idle QHs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) ehci->async_unlinking = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) while (!list_empty(&ehci->async_idle)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) unlink_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) list_del(&qh->unlink_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) qh->qh_state = QH_STATE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) qh->qh_next.qh = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) if (!list_empty(&qh->qtd_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) qh_completions(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) if (!list_empty(&qh->qtd_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) ehci->rh_state == EHCI_RH_RUNNING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) qh_link_async(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) disable_async(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) ehci->async_unlinking = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) static void unlink_empty_async(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) struct ehci_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) struct ehci_qh *qh_to_unlink = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) /* Find the last async QH which has been empty for a timer cycle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) if (list_empty(&qh->qtd_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) qh->qh_state == QH_STATE_LINKED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) ++count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) if (qh->unlink_cycle != ehci->async_unlink_cycle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) qh_to_unlink = qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) /* If nothing else is being unlinked, unlink the last empty QH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) qh_to_unlink->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) start_unlink_async(ehci, qh_to_unlink);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) --count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) /* Other QHs will be handled later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) if (count > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) ++ehci->async_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) /* The root hub is suspended; unlink all the async QHs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct ehci_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) while (ehci->async->qh_next.qh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) qh = ehci->async->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) WARN_ON(!list_empty(&qh->qtd_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) single_unlink_async(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) /* makes sure the async qh will become idle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) /* caller must own ehci->lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) /* If the QH isn't linked then there's nothing we can do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) if (qh->qh_state != QH_STATE_LINKED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) single_unlink_async(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) start_iaa_cycle(ehci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) /*-------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) static void scan_async (struct ehci_hcd *ehci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) struct ehci_qh *qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) bool check_unlinks_later = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) ehci->qh_scan_next = ehci->async->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) while (ehci->qh_scan_next) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) qh = ehci->qh_scan_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) ehci->qh_scan_next = qh->qh_next.qh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) /* clean any finished work for this qh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if (!list_empty(&qh->qtd_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) * Unlinks could happen here; completion reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) * drops the lock. That's why ehci->qh_scan_next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) * always holds the next qh to scan; if the next qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) * gets unlinked then ehci->qh_scan_next is adjusted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) * in single_unlink_async().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) temp = qh_completions(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) if (unlikely(temp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) start_unlink_async(ehci, qh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) } else if (list_empty(&qh->qtd_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) && qh->qh_state == QH_STATE_LINKED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) qh->unlink_cycle = ehci->async_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) check_unlinks_later = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) * Unlink empty entries, reducing DMA usage as well
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) * as HCD schedule-scanning costs. Delay for any qh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) * we just scanned, there's a not-unusual case that it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) * doesn't stay idle for long.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) !(ehci->enabled_hrtimer_events &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) ++ehci->async_unlink_cycle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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