Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Author: Chao Xie <chao.xie@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *        Neil Zhang <zhangwm@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/usb/otg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/usb/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_data/mv_usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/usb/hcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "ehci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define U2x_CAPREGS_OFFSET       0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define CAPLENGTH_MASK         (0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define hcd_to_ehci_hcd_mv(h) ((struct ehci_hcd_mv *)hcd_to_ehci(h)->priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) struct ehci_hcd_mv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	/* Which mode does this ehci running OTG/Host ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	void __iomem *cap_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	void __iomem *op_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct usb_phy *otg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	int (*set_vbus)(unsigned int vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	retval = clk_prepare_enable(ehci_mv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	retval = phy_init(ehci_mv->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		clk_disable_unprepare(ehci_mv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	phy_exit(ehci_mv->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	clk_disable_unprepare(ehci_mv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static int mv_ehci_reset(struct usb_hcd *hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct device *dev = hcd->self.controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (ehci_mv == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		dev_err(dev, "Can not find private ehci data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	hcd->has_tt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	retval = ehci_setup(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		dev_err(dev, "ehci_setup failed %d\n", retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (of_usb_get_phy_mode(dev->of_node) == USBPHY_INTERFACE_MODE_HSIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		status = ehci_readl(ehci, &ehci->regs->port_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		status |= PORT_TEST_FORCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		ehci_writel(ehci, status, &ehci->regs->port_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		status &= ~PORT_TEST_FORCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		ehci_writel(ehci, status, &ehci->regs->port_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static struct hc_driver __read_mostly ehci_platform_hc_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static const struct ehci_driver_overrides platform_overrides __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.reset =		mv_ehci_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.extra_priv_size =	sizeof(struct ehci_hcd_mv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int mv_ehci_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct usb_hcd *hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	struct ehci_hcd *ehci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	struct ehci_hcd_mv *ehci_mv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	hcd = usb_create_hcd(&ehci_platform_hc_driver, &pdev->dev, dev_name(&pdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (!hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	platform_set_drvdata(pdev, hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	ehci_mv = hcd_to_ehci_hcd_mv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	ehci_mv->mode = MV_USB_MODE_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	if (pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		ehci_mv->mode = pdata->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		ehci_mv->set_vbus = pdata->set_vbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	ehci_mv->phy = devm_phy_optional_get(&pdev->dev, "usb");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (IS_ERR(ehci_mv->phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		retval = PTR_ERR(ehci_mv->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		if (retval != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			dev_err(&pdev->dev, "Failed to get phy.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	ehci_mv->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (IS_ERR(ehci_mv->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		dev_err(&pdev->dev, "error getting clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		retval = PTR_ERR(ehci_mv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	ehci_mv->base = devm_ioremap_resource(&pdev->dev, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (IS_ERR(ehci_mv->base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		retval = PTR_ERR(ehci_mv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	retval = mv_ehci_enable(ehci_mv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		dev_err(&pdev->dev, "init phy error %d\n", retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		goto err_put_hcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	ehci_mv->cap_regs =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		(void __iomem *) ((unsigned long) ehci_mv->base + U2x_CAPREGS_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	ehci_mv->op_regs =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		(void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	hcd->rsrc_start = r->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	hcd->rsrc_len = resource_size(r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	hcd->regs = ehci_mv->op_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	retval = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		goto err_disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	hcd->irq = retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	ehci = hcd_to_ehci(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	ehci->caps = (struct ehci_caps __iomem *) ehci_mv->cap_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (ehci_mv->mode == MV_USB_MODE_OTG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		ehci_mv->otg = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		if (IS_ERR(ehci_mv->otg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			retval = PTR_ERR(ehci_mv->otg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			if (retval == -ENXIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 				dev_info(&pdev->dev, "MV_USB_MODE_OTG "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 						"must have CONFIG_USB_PHY enabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 				dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 						"unable to find transceiver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			goto err_disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		retval = otg_set_host(ehci_mv->otg->otg, &hcd->self);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		if (retval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 				"unable to register with transceiver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			goto err_disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		/* otg will enable clock before use as host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		mv_ehci_disable(ehci_mv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		if (ehci_mv->set_vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			ehci_mv->set_vbus(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 				"failed to add hcd with err %d\n", retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			goto err_set_vbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		device_wakeup_enable(hcd->self.controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_HSIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		status = ehci_readl(ehci, &ehci->regs->port_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		/* These "reserved" bits actually enable HSIC mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		status |= BIT(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		status &= ~GENMASK(31, 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		ehci_writel(ehci, status, &ehci->regs->port_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	dev_info(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		 "successful find EHCI device with regs 0x%p irq %d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		 " working in %s mode\n", hcd->regs, hcd->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		 ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) err_set_vbus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (ehci_mv->set_vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		ehci_mv->set_vbus(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) err_disable_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	mv_ehci_disable(ehci_mv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) err_put_hcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int mv_ehci_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	struct usb_hcd *hcd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (hcd->rh_registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		usb_remove_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (!IS_ERR_OR_NULL(ehci_mv->otg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		otg_set_host(ehci_mv->otg->otg, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (ehci_mv->mode == MV_USB_MODE_HOST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		if (ehci_mv->set_vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			ehci_mv->set_vbus(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		mv_ehci_disable(ehci_mv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	usb_put_hcd(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MODULE_ALIAS("mv-ehci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static const struct platform_device_id ehci_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	{"pxa-u2oehci", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	{"pxa-sph", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static void mv_ehci_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct usb_hcd *hcd = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	if (!hcd->rh_registered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	if (hcd->driver->shutdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		hcd->driver->shutdown(hcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static const struct of_device_id ehci_mv_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	{ .compatible = "marvell,pxau2o-ehci", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static struct platform_driver ehci_mv_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	.probe = mv_ehci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	.remove = mv_ehci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.shutdown = mv_ehci_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		.name = "mv-ehci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		.bus = &platform_bus_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		.of_match_table = ehci_mv_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.id_table = ehci_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int __init ehci_platform_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	if (usb_disabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	return platform_driver_register(&ehci_mv_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) module_init(ehci_platform_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static void __exit ehci_platform_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	platform_driver_unregister(&ehci_mv_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) module_exit(ehci_platform_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MODULE_DESCRIPTION("Marvell EHCI driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MODULE_AUTHOR("Neil Zhang <zhangwm@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MODULE_ALIAS("mv-ehci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MODULE_DEVICE_TABLE(of, ehci_mv_dt_ids);