Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Broadcom specific Advanced Microcontroller Bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Broadcom USB-core driver (BCMA bus glue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright 2011-2015 Hauke Mehrtens <hauke@hauke-m.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright 2015 Felix Fietkau <nbd@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Based on ssb-ohci driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright 2007 Michael Buesch <m@bues.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Derived from the OHCI-PCI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * Copyright 1999 Roman Weissgaerber
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * Copyright 2000-2002 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * Copyright 1999 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * Copyright 1999 Gregory P. Smith
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Derived from the USBcore related parts of Broadcom-SB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * Copyright 2005-2011 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/bcma/bcma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/usb/ehci_pdriver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/usb/ohci_pdriver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) MODULE_AUTHOR("Hauke Mehrtens");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /* See BCMA_CLKCTLST_EXTRESREQ and BCMA_CLKCTLST_EXTRESST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define USB_BCMA_CLKCTLST_USB_CLK_REQ			0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) struct bcma_hcd_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct bcma_device *core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct platform_device *ehci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct platform_device *ohci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct gpio_desc *gpio_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) /* Wait for bitmask in a register to get set or cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * timeout is in units of ten-microseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 			  int timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	for (i = 0; i < timeout; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		val = bcma_read32(dev, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		if ((val & bitmask) == bitmask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static void bcma_hcd_4716wa(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #ifdef CONFIG_BCMA_DRIVER_MIPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	/* Work around for 4716 failures. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (dev->bus->chipinfo.id == 0x4716) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		tmp = bcma_cpu_clock(&dev->bus->drv_mips);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		if (tmp >= 480000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			tmp = 0x1846b; /* set CDR to 0x11(fast) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		else if (tmp == 453000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			tmp = 0x1046b; /* set CDR to 0x10(slow) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		/* Change Shim mdio control reg to fix host not acking at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		 * high frequencies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		if (tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 			bcma_write32(dev, 0x524, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			bcma_write32(dev, 0x524, 0x4ab);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			bcma_read32(dev, 0x528);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			bcma_write32(dev, 0x528, 0x80000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #endif /* CONFIG_BCMA_DRIVER_MIPS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) /* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	 * USB 2.0 special considerations:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 * 1. Since the core supports both OHCI and EHCI functions, it must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	 *    only be reset once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	 * 2. In addition to the standard SI reset sequence, the Host Control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	 *    Register must be programmed to bring the USB core and various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	 *    phy components out of reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (!bcma_core_is_enabled(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		bcma_core_enable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		mdelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		if (dev->id.rev >= 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			/* Enable Misc PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 			tmp = bcma_read32(dev, 0x1e0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 			tmp |= 0x100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			bcma_write32(dev, 0x1e0, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				printk(KERN_EMERG "Failed to enable misc PPL!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			/* Take out of resets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			bcma_write32(dev, 0x200, 0x4ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			udelay(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			bcma_write32(dev, 0x200, 0x6ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			udelay(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 			/* Make sure digital and AFE are locked in USB PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			bcma_write32(dev, 0x524, 0x6b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			tmp = bcma_read32(dev, 0x524);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			bcma_write32(dev, 0x524, 0xab);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			tmp = bcma_read32(dev, 0x524);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			bcma_write32(dev, 0x524, 0x2b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			tmp = bcma_read32(dev, 0x524);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			bcma_write32(dev, 0x524, 0x10ab);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			tmp = bcma_read32(dev, 0x524);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 			if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 				tmp = bcma_read32(dev, 0x528);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				printk(KERN_EMERG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 				       "USB20H mdio_rddata 0x%08x\n", tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			bcma_write32(dev, 0x528, 0x80000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			tmp = bcma_read32(dev, 0x314);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			udelay(265);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			bcma_write32(dev, 0x200, 0x7ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			/* Take USB and HSIC out of non-driving modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			bcma_write32(dev, 0x510, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			bcma_write32(dev, 0x200, 0x7ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		bcma_hcd_4716wa(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * bcma_hcd_usb20_old_arm_init - Initialize old USB 2.0 controller on ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  * Old USB 2.0 core is identified as BCMA_CORE_USB20_HOST and was introduced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)  * long before Northstar devices. It seems some cheaper chipsets like BCM53573
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  * still use it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)  * Initialization of this old core differs between MIPS and ARM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int bcma_hcd_usb20_old_arm_init(struct bcma_hcd_device *usb_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct bcma_device *core = usb_dev->core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct device *dev = &core->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct bcma_device *pmu_core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	usleep_range(10000, 20000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (core->id.rev < 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	pmu_core = bcma_find_core(core->bus, BCMA_CORE_PMU);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (!pmu_core) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		dev_err(dev, "Could not find PMU core\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	/* Take USB core out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK | BCMA_IOCTL_FGC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	bcma_awrite32(core, BCMA_RESET_CTL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	/* Enable Misc PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 					  BCMA_CLKCTLST_HQCLKREQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 					  USB_BCMA_CLKCTLST_USB_CLK_REQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	bcma_write32(core, 0x510, 0xc7f85000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	bcma_write32(core, 0x510, 0xc7f85003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	usleep_range(300, 600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	/* Program USB PHY PLL parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	bcma_set32(pmu_core, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	bcma_write32(core, 0x510, 0x7f8d007);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	udelay(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	/* Take controller out of reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	bcma_write32(core, 0x200, 0x4ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	usleep_range(25, 50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	bcma_write32(core, 0x200, 0x6ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	usleep_range(25, 50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	bcma_write32(core, 0x200, 0x7ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	usleep_range(25, 50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	of_platform_default_populate(dev->of_node, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	/* Set packet buffer OUT threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	val = bcma_read32(dev, 0x94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	val &= 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	val |= 0x80 << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	bcma_write32(dev, 0x94, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	/* Enable break memory transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	val = bcma_read32(dev, 0x9c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	val |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	bcma_write32(dev, 0x9c, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	 * Broadcom initializes PHY and then waits to ensure HC is ready to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	 * configured. In our case the order is reversed. We just initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	 * controller and we let HCD initialize PHY, so let's wait (sleep) now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)  * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	struct bcma_device *core = bcma_hcd->core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	struct bcma_chipinfo *ci = &core->bus->chipinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct device *dev = &core->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	bcma_core_enable(core, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	if (ci->id == BCMA_CHIP_ID_BCM4707 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	    ci->id == BCMA_CHIP_ID_BCM53018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		bcma_hcd_usb20_ns_init_hc(core);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	of_platform_default_populate(dev->of_node, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (IS_ERR_OR_NULL(usb_dev->gpio_desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	gpiod_set_value(usb_dev->gpio_desc, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static const struct usb_ehci_pdata ehci_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const struct usb_ohci_pdata ohci_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 						    const char *name, u32 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 						    const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 						    size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	struct platform_device *hci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	struct resource hci_res[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	memset(hci_res, 0, sizeof(hci_res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	hci_res[0].start = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	hci_res[0].end = hci_res[0].start + 0x1000 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	hci_res[0].flags = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	hci_res[1].start = dev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	hci_res[1].flags = IORESOURCE_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	hci_dev = platform_device_alloc(name, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (!hci_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	hci_dev->dev.parent = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	ret = platform_device_add_resources(hci_dev, hci_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 					    ARRAY_SIZE(hci_res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		goto err_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	if (data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		ret = platform_device_add_data(hci_dev, data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		goto err_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	ret = platform_device_add(hci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		goto err_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	return hci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) err_alloc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	platform_device_put(hci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	struct bcma_device *dev = usb_dev->core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	u32 ohci_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	bcma_hcd_init_chip_mips(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	/* In AI chips EHCI is addrspace 0, OHCI is 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	ohci_addr = dev->addr_s[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	if ((chipinfo->id == BCMA_CHIP_ID_BCM5357 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	     chipinfo->id == BCMA_CHIP_ID_BCM4749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	    && chipinfo->rev == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		ohci_addr = 0x18009000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 						 ohci_addr, &ohci_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 						 sizeof(ohci_pdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	if (IS_ERR(usb_dev->ohci_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		return PTR_ERR(usb_dev->ohci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 						 dev->addr, &ehci_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 						 sizeof(ehci_pdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	if (IS_ERR(usb_dev->ehci_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		err = PTR_ERR(usb_dev->ehci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		goto err_unregister_ohci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) err_unregister_ohci_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	platform_device_unregister(usb_dev->ohci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	struct bcma_device *core = bcma_hcd->core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	struct device *dev = &core->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	bcma_core_enable(core, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	of_platform_default_populate(dev->of_node, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static int bcma_hcd_probe(struct bcma_device *core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	struct bcma_hcd_device *usb_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	/* TODO: Probably need checks here; is the core connected? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 			       GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	if (!usb_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	usb_dev->core = core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (core->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		usb_dev->gpio_desc = devm_gpiod_get(&core->dev, "vcc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 						    GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	switch (core->id.id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	case BCMA_CORE_USB20_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		if (IS_ENABLED(CONFIG_ARM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 			err = bcma_hcd_usb20_old_arm_init(usb_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		else if (IS_ENABLED(CONFIG_MIPS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 			err = bcma_hcd_usb20_init(usb_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 			err = -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	case BCMA_CORE_NS_USB20:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		err = bcma_hcd_usb20_ns_init(usb_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	case BCMA_CORE_NS_USB30:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 		err = bcma_hcd_usb30_init(usb_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	bcma_set_drvdata(core, usb_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static void bcma_hcd_remove(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	struct platform_device *ohci_dev = usb_dev->ohci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	struct platform_device *ehci_dev = usb_dev->ehci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	if (ohci_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		platform_device_unregister(ohci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	if (ehci_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		platform_device_unregister(ehci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	bcma_core_disable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static void bcma_hcd_shutdown(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	bcma_hci_platform_power_gpio(dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	bcma_core_disable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static int bcma_hcd_suspend(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	bcma_hci_platform_power_gpio(dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	bcma_core_disable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static int bcma_hcd_resume(struct bcma_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	bcma_hci_platform_power_gpio(dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	bcma_core_enable(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) #else /* !CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #define bcma_hcd_suspend	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define bcma_hcd_resume	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static const struct bcma_device_id bcma_hcd_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static struct bcma_driver bcma_hcd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	.name		= KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	.id_table	= bcma_hcd_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	.probe		= bcma_hcd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	.remove		= bcma_hcd_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	.shutdown	= bcma_hcd_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	.suspend	= bcma_hcd_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	.resume		= bcma_hcd_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) module_bcma_driver(bcma_hcd_driver);