^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for PLX NET2272 USB device controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2005-2006 PLX Technology, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2006-2011 Analog Devices, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/prefetch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/usb/ch9.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/usb/gadget.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "net2272.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DRIVER_DESC "PLX NET2272 USB Peripheral Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static const char driver_name[] = "net2272";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static const char driver_vers[] = "2006 October 17/mainline";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static const char driver_desc[] = DRIVER_DESC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static const char ep0name[] = "ep0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const char * const ep_name[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ep0name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) "ep-a", "ep-b", "ep-c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #ifdef CONFIG_USB_NET2272_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * use_dma: the NET2272 can use an external DMA controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Note that since there is no generic DMA api, some functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * notably request_dma, start_dma, and cancel_dma will need to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * modified for your platform's particular dma controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * If use_dma is disabled, pio will be used instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static bool use_dma = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) module_param(use_dma, bool, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * dma_ep: selects the endpoint for use with dma (1=ep-a, 2=ep-b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * The NET2272 can only use dma for a single endpoint at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * At some point this could be modified to allow either endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * to take control of dma as it becomes available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Note that DMA should not be used on OUT endpoints unless it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * be guaranteed that no short packets will arrive on an IN endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * while the DMA operation is pending. Otherwise the OUT DMA will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * terminate prematurely (See NET2272 Errata 630-0213-0101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static ushort dma_ep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) module_param(dma_ep, ushort, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * dma_mode: net2272 dma mode setting (see LOCCTL1 definiton):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * mode 0 == Slow DREQ mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * mode 1 == Fast DREQ mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * mode 2 == Burst mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static ushort dma_mode = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) module_param(dma_mode, ushort, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define use_dma 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define dma_ep 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define dma_mode 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * fifo_mode: net2272 buffer configuration:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * mode 0 == ep-{a,b,c} 512db each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * mode 1 == ep-a 1k, ep-{b,c} 512db
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * mode 2 == ep-a 1k, ep-b 1k, ep-c 512db
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * mode 3 == ep-a 1k, ep-b disabled, ep-c 512db
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static ushort fifo_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) module_param(fifo_mode, ushort, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * enable_suspend: When enabled, the driver will respond to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * USB suspend requests by powering down the NET2272. Otherwise,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * USB suspend requests will be ignored. This is acceptible for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * self-powered devices. For bus powered devices set this to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static ushort enable_suspend = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) module_param(enable_suspend, ushort, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static void assert_out_naking(struct net2272_ep *ep, const char *where)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #ifndef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) tmp = net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if ((tmp & (1 << NAK_OUT_PACKETS)) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_dbg(ep->dev->dev, "%s %s %02x !NAK\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ep->ep.name, where, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) net2272_ep_write(ep, EP_RSPSET, 1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define ASSERT_OUT_NAKING(ep) assert_out_naking(ep, __func__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void stop_out_naking(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u8 tmp = net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if ((tmp & (1 << NAK_OUT_PACKETS)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) net2272_ep_write(ep, EP_RSPCLR, 1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define PIPEDIR(bAddress) (usb_pipein(bAddress) ? "in" : "out")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static char *type_string(u8 bmAttributes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) case USB_ENDPOINT_XFER_BULK: return "bulk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) case USB_ENDPOINT_XFER_ISOC: return "iso";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) case USB_ENDPOINT_XFER_INT: return "intr";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) default: return "control";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static char *buf_state_string(unsigned state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) case BUFF_FREE: return "free";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) case BUFF_VALID: return "valid";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) case BUFF_LCL: return "local";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case BUFF_USB: return "usb";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) default: return "unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static char *dma_mode_string(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (!use_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return "PIO";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) switch (dma_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case 0: return "SLOW DREQ";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) case 1: return "FAST DREQ";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) case 2: return "BURST";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) default: return "invalid";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static void net2272_dequeue_all(struct net2272_ep *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int net2272_kick_dma(struct net2272_ep *, struct net2272_request *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int net2272_fifo_status(struct usb_ep *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const struct usb_ep_ops net2272_ep_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) net2272_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) u32 max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (!_ep || !desc || ep->desc || _ep->name == ep0name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) || desc->bDescriptorType != USB_DT_ENDPOINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) dev = ep->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) max = usb_endpoint_maxp(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) _ep->maxpacket = max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ep->desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* net2272_ep_reset() has already been called */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ep->stopped = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ep->wedged = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* set speed-dependent max packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) net2272_ep_write(ep, EP_MAXPKT0, max & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) net2272_ep_write(ep, EP_MAXPKT1, (max & 0xff00) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* set type, direction, address; reset fifo counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) tmp = usb_endpoint_type(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (usb_endpoint_xfer_bulk(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* catch some particularly blatant driver bugs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if ((dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ep->is_iso = usb_endpoint_xfer_isoc(desc) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) tmp <<= ENDPOINT_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) tmp |= ((desc->bEndpointAddress & 0x0f) << ENDPOINT_NUMBER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) tmp |= usb_endpoint_dir_in(desc) << ENDPOINT_DIRECTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) tmp |= (1 << ENDPOINT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* for OUT transfers, block the rx fifo until a read is posted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ep->is_in = usb_endpoint_dir_in(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (!ep->is_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) net2272_ep_write(ep, EP_RSPSET, 1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) net2272_ep_write(ep, EP_CFG, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* enable irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) tmp = (1 << ep->num) | net2272_read(dev, IRQENB0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) net2272_write(dev, IRQENB0, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) tmp = (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) | net2272_ep_read(ep, EP_IRQENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) net2272_ep_write(ep, EP_IRQENB, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) tmp = desc->bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) dev_dbg(dev->dev, "enabled %s (ep%d%s-%s) max %04x cfg %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) _ep->name, tmp & 0x0f, PIPEDIR(tmp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) type_string(desc->bmAttributes), max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) net2272_ep_read(ep, EP_CFG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void net2272_ep_reset(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ep->desc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) INIT_LIST_HEAD(&ep->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) usb_ep_set_maxpacket_limit(&ep->ep, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ep->ep.ops = &net2272_ep_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* disable irqs, endpoint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) net2272_ep_write(ep, EP_IRQENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* init to our chosen defaults, notably so that we NAK OUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * packets until the driver queues a read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) tmp = (1 << NAK_OUT_PACKETS_MODE) | (1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) net2272_ep_write(ep, EP_RSPSET, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) tmp = (1 << INTERRUPT_MODE) | (1 << HIDE_STATUS_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (ep->num != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) tmp |= (1 << ENDPOINT_TOGGLE) | (1 << ENDPOINT_HALT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) net2272_ep_write(ep, EP_RSPCLR, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* scrub most status bits, and flush any fifo state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) net2272_ep_write(ep, EP_STAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) (1 << DATA_IN_TOKEN_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) | (1 << DATA_OUT_TOKEN_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) | (1 << DATA_PACKET_RECEIVED_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) net2272_ep_write(ep, EP_STAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) (1 << TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) | (1 << USB_OUT_ACK_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) | (1 << USB_OUT_NAK_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) | (1 << USB_IN_ACK_RCVD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) | (1 << USB_IN_NAK_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) | (1 << USB_STALL_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) | (1 << LOCAL_OUT_ZLP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) | (1 << BUFFER_FLUSH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* fifo size is handled seperately */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static int net2272_disable(struct usb_ep *_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (!_ep || !ep->desc || _ep->name == ep0name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) spin_lock_irqsave(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) net2272_dequeue_all(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) net2272_ep_reset(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) dev_vdbg(ep->dev->dev, "disabled %s\n", _ep->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) spin_unlock_irqrestore(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static struct usb_request *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) net2272_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (!_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) req = kzalloc(sizeof(*req), gfp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (!req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) INIT_LIST_HEAD(&req->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return &req->req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) net2272_free_request(struct usb_ep *_ep, struct usb_request *_req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (!_ep || !_req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) req = container_of(_req, struct net2272_request, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) WARN_ON(!list_empty(&req->queue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) kfree(req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) net2272_done(struct net2272_ep *ep, struct net2272_request *req, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) unsigned stopped = ep->stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (ep->num == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (ep->dev->protocol_stall) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ep->stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) set_halt(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) list_del_init(&req->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (req->req.status == -EINPROGRESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) req->req.status = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) status = req->req.status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) dev = ep->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (use_dma && ep->dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) usb_gadget_unmap_request(&dev->gadget, &req->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ep->is_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (status && status != -ESHUTDOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) dev_vdbg(dev->dev, "complete %s req %p stat %d len %u/%u buf %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) ep->ep.name, &req->req, status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) req->req.actual, req->req.length, req->req.buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* don't modify queue heads during completion callback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ep->stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) spin_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) usb_gadget_giveback_request(&ep->ep, &req->req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) spin_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ep->stopped = stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) net2272_write_packet(struct net2272_ep *ep, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct net2272_request *req, unsigned max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) u16 __iomem *ep_data = net2272_reg_addr(ep->dev, EP_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u16 *bufp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) unsigned length, count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) length = min(req->req.length - req->req.actual, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) req->req.actual += length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) dev_vdbg(ep->dev->dev, "write packet %s req %p max %u len %u avail %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) ep->ep.name, req, max, length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) (net2272_ep_read(ep, EP_AVAIL1) << 8) | net2272_ep_read(ep, EP_AVAIL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) count = length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) bufp = (u16 *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) while (likely(count >= 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) /* no byte-swap required; chip endian set during init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) writew(*bufp++, ep_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) count -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) buf = (u8 *)bufp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /* write final byte by placing the NET2272 into 8-bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (unlikely(count)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) tmp = net2272_read(ep->dev, LOCCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) net2272_write(ep->dev, LOCCTL, tmp & ~(1 << DATA_WIDTH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) writeb(*buf, ep_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) net2272_write(ep->dev, LOCCTL, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* returns: 0: still running, 1: completed, negative: errno */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) net2272_write_fifo(struct net2272_ep *ep, struct net2272_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) unsigned count, max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) dev_vdbg(ep->dev->dev, "write_fifo %s actual %d len %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ep->ep.name, req->req.actual, req->req.length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * Keep loading the endpoint until the final packet is loaded,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) * or the endpoint buffer is full.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) top:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * Clear interrupt status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * - Packet Transmitted interrupt will become set again when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * host successfully takes another packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) net2272_ep_write(ep, EP_STAT0, (1 << DATA_PACKET_TRANSMITTED_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) while (!(net2272_ep_read(ep, EP_STAT0) & (1 << BUFFER_FULL))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) buf = req->req.buf + req->req.actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) prefetch(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* force pagesel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) max = (net2272_ep_read(ep, EP_AVAIL1) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) (net2272_ep_read(ep, EP_AVAIL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (max < ep->ep.maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) max = (net2272_ep_read(ep, EP_AVAIL1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) | (net2272_ep_read(ep, EP_AVAIL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) count = net2272_write_packet(ep, buf, req, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* see if we are done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (req->req.length == req->req.actual) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* validate short or zlp packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (count < ep->ep.maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) set_fifo_bytecount(ep, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) net2272_done(ep, req, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (!list_empty(&ep->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct net2272_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) status = net2272_kick_dma(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if ((net2272_ep_read(ep, EP_STAT0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) & (1 << BUFFER_EMPTY)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) goto top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) net2272_ep_write(ep, EP_STAT0, (1 << DATA_PACKET_TRANSMITTED_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) net2272_out_flush(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) ASSERT_OUT_NAKING(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) net2272_ep_write(ep, EP_STAT0, (1 << DATA_OUT_TOKEN_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) | (1 << DATA_PACKET_RECEIVED_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) net2272_read_packet(struct net2272_ep *ep, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct net2272_request *req, unsigned avail)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) u16 __iomem *ep_data = net2272_reg_addr(ep->dev, EP_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) unsigned is_short;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) u16 *bufp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) req->req.actual += avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) dev_vdbg(ep->dev->dev, "read packet %s req %p len %u avail %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ep->ep.name, req, avail,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) (net2272_ep_read(ep, EP_AVAIL1) << 8) | net2272_ep_read(ep, EP_AVAIL0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) is_short = (avail < ep->ep.maxpacket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (unlikely(avail == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* remove any zlp from the buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) (void)readw(ep_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) return is_short;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) /* Ensure we get the final byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (unlikely(avail % 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) avail++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) bufp = (u16 *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) *bufp++ = readw(ep_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) avail -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) } while (avail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * To avoid false endpoint available race condition must read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * ep stat0 twice in the case of a short transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (net2272_ep_read(ep, EP_STAT0) & (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return is_short;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) net2272_read_fifo(struct net2272_ep *ep, struct net2272_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) unsigned is_short;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) int cleanup = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) int status = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) dev_vdbg(ep->dev->dev, "read_fifo %s actual %d len %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) ep->ep.name, req->req.actual, req->req.length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) top:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) buf = req->req.buf + req->req.actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) prefetchw(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) count = (net2272_ep_read(ep, EP_AVAIL1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) | net2272_ep_read(ep, EP_AVAIL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) net2272_ep_write(ep, EP_STAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) (1 << DATA_PACKET_RECEIVED_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) tmp = req->req.length - req->req.actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (count > tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if ((tmp % ep->ep.maxpacket) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) dev_err(ep->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) "%s out fifo %d bytes, expected %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) ep->ep.name, count, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) cleanup = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) count = (tmp > 0) ? tmp : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) is_short = net2272_read_packet(ep, buf, req, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (unlikely(cleanup || is_short ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) req->req.actual == req->req.length)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (cleanup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) net2272_out_flush(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) net2272_done(ep, req, -EOVERFLOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) net2272_done(ep, req, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* re-initialize endpoint transfer registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * otherwise they may result in erroneous pre-validation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * for subsequent control reads
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (unlikely(ep->num == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) net2272_ep_write(ep, EP_TRANSFER2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) net2272_ep_write(ep, EP_TRANSFER1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) net2272_ep_write(ep, EP_TRANSFER0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (!list_empty(&ep->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct net2272_request, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) status = net2272_kick_dma(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if ((status < 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) !(net2272_ep_read(ep, EP_STAT0) & (1 << BUFFER_EMPTY)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) goto top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) } while (!(net2272_ep_read(ep, EP_STAT0) & (1 << BUFFER_EMPTY)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) net2272_pio_advance(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (unlikely(list_empty(&ep->queue)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) req = list_entry(ep->queue.next, struct net2272_request, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) (ep->is_in ? net2272_write_fifo : net2272_read_fifo)(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* returns 0 on success, else negative errno */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) net2272_request_dma(struct net2272 *dev, unsigned ep, u32 buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) unsigned len, unsigned dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) dev_vdbg(dev->dev, "request_dma ep %d buf %08x len %d dir %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) ep, buf, len, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* The NET2272 only supports a single dma channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (dev->dma_busy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * EP_TRANSFER (used to determine the number of bytes received
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * in an OUT transfer) is 24 bits wide; don't ask for more than that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if ((dir == 1) && (len > 0x1000000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) dev->dma_busy = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) /* initialize platform's dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) #ifdef CONFIG_USB_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) /* NET2272 addr, buffer addr, length, etc. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) switch (dev->dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) case PCI_DEVICE_ID_RDK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* Setup PLX 9054 DMA mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) writel((1 << LOCAL_BUS_WIDTH) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) (1 << TA_READY_INPUT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) (0 << LOCAL_BURST_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) (1 << DONE_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) (1 << LOCAL_ADDRESSING_MODE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) (1 << DEMAND_MODE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) (1 << DMA_EOT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) (1 << FAST_SLOW_TERMINATE_MODE_SELECT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) (1 << DMA_CHANNEL_INTERRUPT_SELECT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) dev->rdk1.plx9054_base_addr + DMAMODE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) writel(0x100000, dev->rdk1.plx9054_base_addr + DMALADR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) writel(buf, dev->rdk1.plx9054_base_addr + DMAPADR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) writel(len, dev->rdk1.plx9054_base_addr + DMASIZ0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) writel((dir << DIRECTION_OF_TRANSFER) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) (1 << INTERRUPT_AFTER_TERMINAL_COUNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) dev->rdk1.plx9054_base_addr + DMADPR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) writel((1 << LOCAL_DMA_CHANNEL_0_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) readl(dev->rdk1.plx9054_base_addr + INTCSR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) net2272_write(dev, DMAREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) (0 << DMA_BUFFER_VALID) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) (1 << DMA_REQUEST_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) (1 << DMA_CONTROL_DACK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) (dev->dma_eot_polarity << EOT_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) (dev->dma_dack_polarity << DACK_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) (dev->dma_dreq_polarity << DREQ_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) ((ep >> 1) << DMA_ENDPOINT_SELECT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) (void) net2272_read(dev, SCRATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) net2272_start_dma(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* start platform's dma controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) #ifdef CONFIG_USB_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) switch (dev->dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) case PCI_DEVICE_ID_RDK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) writeb((1 << CHANNEL_ENABLE) | (1 << CHANNEL_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) dev->rdk1.plx9054_base_addr + DMACSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /* returns 0 on success, else negative errno */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) net2272_kick_dma(struct net2272_ep *ep, struct net2272_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) unsigned size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (!use_dma || (ep->num < 1) || (ep->num > 2) || !ep->dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /* don't use dma for odd-length transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) * otherwise, we'd need to deal with the last byte with pio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) if (req->req.length & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_vdbg(ep->dev->dev, "kick_dma %s req %p dma %08llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) ep->ep.name, req, (unsigned long long) req->req.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) net2272_ep_write(ep, EP_RSPSET, 1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) /* The NET2272 can only use DMA on one endpoint at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (ep->dev->dma_busy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) /* Make sure we only DMA an even number of bytes (we'll use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * pio to complete the transfer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) size = req->req.length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) size &= ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) /* device-to-host transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (ep->is_in) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) /* initialize platform's dma controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (net2272_request_dma(ep->dev, ep->num, req->req.dma, size, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) /* unable to obtain DMA channel; return error and use pio mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) req->req.actual += size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) /* host-to-device transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) tmp = net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) /* initialize platform's dma controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (net2272_request_dma(ep->dev, ep->num, req->req.dma, size, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /* unable to obtain DMA channel; return error and use pio mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (!(tmp & (1 << BUFFER_EMPTY)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) ep->not_empty = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) ep->not_empty = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) /* allow the endpoint's buffer to fill */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) net2272_ep_write(ep, EP_RSPCLR, 1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) /* this transfer completed and data's already in the fifo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * return error so pio gets used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) if (tmp & (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) /* deassert dreq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) net2272_write(ep->dev, DMAREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) (0 << DMA_BUFFER_VALID) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) (0 << DMA_REQUEST_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) (1 << DMA_CONTROL_DACK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) (ep->dev->dma_eot_polarity << EOT_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) (ep->dev->dma_dack_polarity << DACK_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) (ep->dev->dma_dreq_polarity << DREQ_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ((ep->num >> 1) << DMA_ENDPOINT_SELECT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /* Don't use per-packet interrupts: use dma interrupts only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) net2272_ep_write(ep, EP_IRQENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) net2272_start_dma(ep->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static void net2272_cancel_dma(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) #ifdef CONFIG_USB_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) switch (dev->dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) case PCI_DEVICE_ID_RDK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) writeb(0, dev->rdk1.plx9054_base_addr + DMACSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) writeb(1 << CHANNEL_ABORT, dev->rdk1.plx9054_base_addr + DMACSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) while (!(readb(dev->rdk1.plx9054_base_addr + DMACSR0) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) (1 << CHANNEL_DONE)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) continue; /* wait for dma to stabalize */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) /* dma abort generates an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) writeb(1 << CHANNEL_CLEAR_INTERRUPT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) dev->rdk1.plx9054_base_addr + DMACSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) dev->dma_busy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) net2272_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) int status = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) u8 s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) req = container_of(_req, struct net2272_request, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (!_req || !_req->complete || !_req->buf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) || !list_empty(&req->queue))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (!_ep || (!ep->desc && ep->num != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) dev = ep->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) return -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) /* set up dma mapping in case the caller didn't */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (use_dma && ep->dma) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) status = usb_gadget_map_request(&dev->gadget, _req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) ep->is_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) dev_vdbg(dev->dev, "%s queue req %p, len %d buf %p dma %08llx %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) _ep->name, _req, _req->length, _req->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) (unsigned long long) _req->dma, _req->zero ? "zero" : "!zero");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) _req->status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) _req->actual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) /* kickstart this i/o queue? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (list_empty(&ep->queue) && !ep->stopped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) /* maybe there's no control data, just status ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) if (ep->num == 0 && _req->length == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) net2272_done(ep, req, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) dev_vdbg(dev->dev, "%s status ack\n", ep->ep.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) /* Return zlp, don't let it block subsequent packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) s = net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) if (s & (1 << BUFFER_EMPTY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /* Buffer is empty check for a blocking zlp, handle it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if ((s & (1 << NAK_OUT_PACKETS)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) net2272_ep_read(ep, EP_STAT1) & (1 << LOCAL_OUT_ZLP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) dev_dbg(dev->dev, "WARNING: returning ZLP short packet termination!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * Request is going to terminate with a short packet ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * hope the client is ready for it!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) status = net2272_read_fifo(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) /* clear short packet naking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) net2272_ep_write(ep, EP_STAT0, (1 << NAK_OUT_PACKETS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) /* try dma first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) status = net2272_kick_dma(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) if (status < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) /* dma failed (most likely in use by another endpoint)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) * fallback to pio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (ep->is_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) status = net2272_write_fifo(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) s = net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if ((s & (1 << BUFFER_EMPTY)) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) status = net2272_read_fifo(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if (unlikely(status != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) if (status > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) req = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (likely(req))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) list_add_tail(&req->queue, &ep->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if (likely(!list_empty(&ep->queue)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) net2272_ep_write(ep, EP_RSPCLR, 1 << ALT_NAK_OUT_PACKETS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) /* dequeue ALL requests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) net2272_dequeue_all(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) /* called with spinlock held */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) ep->stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) while (!list_empty(&ep->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) struct net2272_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) net2272_done(ep, req, -ESHUTDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) /* dequeue JUST ONE request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) net2272_dequeue(struct usb_ep *_ep, struct usb_request *_req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) int stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (!_ep || (!ep->desc && ep->num != 0) || !_req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) spin_lock_irqsave(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) stopped = ep->stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) ep->stopped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) /* make sure it's still queued on this endpoint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) list_for_each_entry(req, &ep->queue, queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) if (&req->req == _req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) if (&req->req != _req) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) ep->stopped = stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) spin_unlock_irqrestore(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) /* queue head may be partially complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) if (ep->queue.next == &req->queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) dev_dbg(ep->dev->dev, "unlink (%s) pio\n", _ep->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) net2272_done(ep, req, -ECONNRESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) req = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) ep->stopped = stopped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) spin_unlock_irqrestore(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) net2272_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) if (!_ep || (!ep->desc && ep->num != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) return -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (ep->desc /* not ep0 */ && usb_endpoint_xfer_isoc(ep->desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) spin_lock_irqsave(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (!list_empty(&ep->queue))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) ret = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) else if (ep->is_in && value && net2272_fifo_status(_ep) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) ret = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) dev_vdbg(ep->dev->dev, "%s %s %s\n", _ep->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) value ? "set" : "clear",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) wedged ? "wedge" : "halt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) /* set/clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (ep->num == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) ep->dev->protocol_stall = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) set_halt(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) if (wedged)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) ep->wedged = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) clear_halt(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) ep->wedged = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) spin_unlock_irqrestore(&ep->dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) net2272_set_halt(struct usb_ep *_ep, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) return net2272_set_halt_and_wedge(_ep, value, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) net2272_set_wedge(struct usb_ep *_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) if (!_ep || _ep->name == ep0name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) return net2272_set_halt_and_wedge(_ep, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) net2272_fifo_status(struct usb_ep *_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) u16 avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) if (!_ep || (!ep->desc && ep->num != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) return -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) avail = net2272_ep_read(ep, EP_AVAIL1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) avail |= net2272_ep_read(ep, EP_AVAIL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) if (avail > ep->fifo_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) return -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) if (ep->is_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) avail = ep->fifo_size - avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) return avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) net2272_fifo_flush(struct usb_ep *_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) ep = container_of(_ep, struct net2272_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) if (!_ep || (!ep->desc && ep->num != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) net2272_ep_write(ep, EP_STAT1, 1 << BUFFER_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static const struct usb_ep_ops net2272_ep_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) .enable = net2272_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) .disable = net2272_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) .alloc_request = net2272_alloc_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) .free_request = net2272_free_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) .queue = net2272_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) .dequeue = net2272_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) .set_halt = net2272_set_halt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) .set_wedge = net2272_set_wedge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) .fifo_status = net2272_fifo_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) .fifo_flush = net2272_fifo_flush,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) net2272_get_frame(struct usb_gadget *_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) u16 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (!_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) dev = container_of(_gadget, struct net2272, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) ret = net2272_read(dev, FRAME1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) ret |= net2272_read(dev, FRAME0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) net2272_wakeup(struct usb_gadget *_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) if (!_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) dev = container_of(_gadget, struct net2272, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) tmp = net2272_read(dev, USBCTL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (tmp & (1 << IO_WAKEUP_ENABLE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) net2272_write(dev, USBCTL1, (1 << GENERATE_RESUME));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) net2272_set_selfpowered(struct usb_gadget *_gadget, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) if (!_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) _gadget->is_selfpowered = (value != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) net2272_pullup(struct usb_gadget *_gadget, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) if (!_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) dev = container_of(_gadget, struct net2272, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) tmp = net2272_read(dev, USBCTL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) dev->softconnect = (is_on != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) tmp |= (1 << USB_DETECT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) tmp &= ~(1 << USB_DETECT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) net2272_write(dev, USBCTL0, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) static int net2272_start(struct usb_gadget *_gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) struct usb_gadget_driver *driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) static int net2272_stop(struct usb_gadget *_gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) static const struct usb_gadget_ops net2272_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) .get_frame = net2272_get_frame,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) .wakeup = net2272_wakeup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) .set_selfpowered = net2272_set_selfpowered,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) .pullup = net2272_pullup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) .udc_start = net2272_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .udc_stop = net2272_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) registers_show(struct device *_dev, struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) char *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) unsigned size, t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) u8 t1, t2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) const char *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) dev = dev_get_drvdata(_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) next = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) size = PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) /* Main Control Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) t = scnprintf(next, size, "%s version %s,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) "chiprev %02x, locctl %02x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) "irqenb0 %02x irqenb1 %02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) "irqstat0 %02x irqstat1 %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) driver_name, driver_vers, dev->chiprev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) net2272_read(dev, LOCCTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) net2272_read(dev, IRQENB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) net2272_read(dev, IRQENB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) net2272_read(dev, IRQSTAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) net2272_read(dev, IRQSTAT1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) /* DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) t1 = net2272_read(dev, DMAREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) t = scnprintf(next, size, "\ndmareq %02x: %s %s%s%s%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) t1, ep_name[(t1 & 0x01) + 1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) t1 & (1 << DMA_CONTROL_DACK) ? "dack " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) t1 & (1 << DMA_REQUEST_ENABLE) ? "reqenb " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) t1 & (1 << DMA_REQUEST) ? "req " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) t1 & (1 << DMA_BUFFER_VALID) ? "valid " : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) /* USB Control Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) t1 = net2272_read(dev, USBCTL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) if (t1 & (1 << VBUS_PIN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) if (t1 & (1 << USB_HIGH_SPEED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) s = "high speed";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) s = "powered";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) s = "full speed";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) s = "not attached";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) t = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) "usbctl0 %02x usbctl1 %02x addr 0x%02x (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) net2272_read(dev, USBCTL0), t1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) net2272_read(dev, OURADDR), s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) /* Endpoint Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) ep = &dev->ep[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) if (i && !ep->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) t1 = net2272_ep_read(ep, EP_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) t2 = net2272_ep_read(ep, EP_RSPSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) t = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) "\n%s\tcfg %02x rsp (%02x) %s%s%s%s%s%s%s%s"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) "irqenb %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) ep->ep.name, t1, t2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) (t2 & (1 << ALT_NAK_OUT_PACKETS)) ? "NAK " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) (t2 & (1 << HIDE_STATUS_PHASE)) ? "hide " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) (t2 & (1 << AUTOVALIDATE)) ? "auto " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) (t2 & (1 << INTERRUPT_MODE)) ? "interrupt " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) (t2 & (1 << CONTROL_STATUS_PHASE_HANDSHAKE)) ? "status " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) (t2 & (1 << NAK_OUT_PACKETS_MODE)) ? "NAKmode " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) (t2 & (1 << ENDPOINT_TOGGLE)) ? "DATA1 " : "DATA0 ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) (t2 & (1 << ENDPOINT_HALT)) ? "HALT " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) net2272_ep_read(ep, EP_IRQENB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) t = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) "\tstat0 %02x stat1 %02x avail %04x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) "(ep%d%s-%s)%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) net2272_ep_read(ep, EP_STAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) net2272_ep_read(ep, EP_STAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) (net2272_ep_read(ep, EP_AVAIL1) << 8) | net2272_ep_read(ep, EP_AVAIL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) t1 & 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) ep->is_in ? "in" : "out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) type_string(t1 >> 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) ep->stopped ? "*" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) t = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) "\tep_transfer %06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) ((net2272_ep_read(ep, EP_TRANSFER2) & 0xff) << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) ((net2272_ep_read(ep, EP_TRANSFER1) & 0xff) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) ((net2272_ep_read(ep, EP_TRANSFER0) & 0xff)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) t1 = net2272_ep_read(ep, EP_BUFF_STATES) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) t2 = (net2272_ep_read(ep, EP_BUFF_STATES) >> 2) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) t = scnprintf(next, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) "\tbuf-a %s buf-b %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) buf_state_string(t1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) buf_state_string(t2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) size -= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) next += t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) return PAGE_SIZE - size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) static DEVICE_ATTR_RO(registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) net2272_set_fifo_mode(struct net2272 *dev, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) tmp = net2272_read(dev, LOCCTL) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) tmp |= (mode << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) net2272_write(dev, LOCCTL, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) INIT_LIST_HEAD(&dev->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) /* always ep-a, ep-c ... maybe not ep-b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) dev->ep[1].fifo_size = dev->ep[2].fifo_size = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) dev->ep[1].fifo_size = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) dev->ep[2].fifo_size = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) dev->ep[1].fifo_size = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) /* ep-c is always 2 512 byte buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) dev->ep[3].fifo_size = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) net2272_usb_reset(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) dev->gadget.speed = USB_SPEED_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) net2272_cancel_dma(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) net2272_write(dev, IRQENB0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) net2272_write(dev, IRQENB1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) /* clear irq state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) net2272_write(dev, IRQSTAT0, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) net2272_write(dev, IRQSTAT1, ~(1 << SUSPEND_REQUEST_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) net2272_write(dev, DMAREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) (0 << DMA_BUFFER_VALID) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) (0 << DMA_REQUEST_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) (1 << DMA_CONTROL_DACK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) (dev->dma_eot_polarity << EOT_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) (dev->dma_dack_polarity << DACK_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) (dev->dma_dreq_polarity << DREQ_POLARITY) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) ((dma_ep >> 1) << DMA_ENDPOINT_SELECT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) net2272_cancel_dma(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) net2272_set_fifo_mode(dev, (fifo_mode <= 3) ? fifo_mode : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) /* Set the NET2272 ep fifo data width to 16-bit mode and for correct byte swapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) * note that the higher level gadget drivers are expected to convert data to little endian.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) * Enable byte swap for your local bus/cpu if needed by setting BYTE_SWAP in LOCCTL here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) net2272_write(dev, LOCCTL, net2272_read(dev, LOCCTL) | (1 << DATA_WIDTH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) net2272_write(dev, LOCCTL1, (dma_mode << DMA_MODE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) net2272_usb_reinit(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) /* basic endpoint init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) struct net2272_ep *ep = &dev->ep[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) ep->ep.name = ep_name[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) ep->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) ep->num = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) ep->not_empty = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) if (use_dma && ep->num == dma_ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) ep->dma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) if (i > 0 && i <= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) ep->fifo_size = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) ep->fifo_size = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) net2272_ep_reset(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) if (i == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) ep->ep.caps.type_control = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) ep->ep.caps.type_iso = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) ep->ep.caps.type_bulk = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) ep->ep.caps.type_int = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) ep->ep.caps.dir_in = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) ep->ep.caps.dir_out = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) dev->gadget.ep0 = &dev->ep[0].ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) dev->ep[0].stopped = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) net2272_ep0_start(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) struct net2272_ep *ep0 = &dev->ep[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) net2272_ep_write(ep0, EP_RSPSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) (1 << NAK_OUT_PACKETS_MODE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) (1 << ALT_NAK_OUT_PACKETS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) net2272_ep_write(ep0, EP_RSPCLR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) (1 << HIDE_STATUS_PHASE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) (1 << CONTROL_STATUS_PHASE_HANDSHAKE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) net2272_write(dev, USBCTL0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) (dev->softconnect << USB_DETECT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) (1 << USB_ROOT_PORT_WAKEUP_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) (1 << IO_WAKEUP_ENABLE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) net2272_write(dev, IRQENB0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) (1 << SETUP_PACKET_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) (1 << ENDPOINT_0_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) (1 << DMA_DONE_INTERRUPT_ENABLE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) net2272_write(dev, IRQENB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) (1 << VBUS_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) (1 << ROOT_PORT_RESET_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) (1 << SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) /* when a driver is successfully registered, it will receive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) * control requests including set_configuration(), which enables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) * non-control requests. then usb traffic follows until a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) * disconnect is reported. then a host may connect again, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) * the driver might get unbound.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) static int net2272_start(struct usb_gadget *_gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) struct usb_gadget_driver *driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) if (!driver || !driver->setup ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) driver->max_speed != USB_SPEED_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) dev = container_of(_gadget, struct net2272, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) dev->ep[i].irqs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) /* hook up the driver ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) dev->softconnect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) driver->driver.bus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) dev->driver = driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) /* ... then enable host detection and ep0; and we're ready
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) * for set_configuration as well as eventual disconnect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) net2272_ep0_start(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) stop_activity(struct net2272 *dev, struct usb_gadget_driver *driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) /* don't disconnect if it's not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) if (dev->gadget.speed == USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) driver = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) /* stop hardware; prevent new request submissions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) * and kill any outstanding requests.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) net2272_usb_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) net2272_dequeue_all(&dev->ep[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) /* report disconnect; the driver is already quiesced */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) if (driver) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) spin_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) driver->disconnect(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) spin_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) net2272_usb_reinit(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) static int net2272_stop(struct usb_gadget *_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) dev = container_of(_gadget, struct net2272, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) spin_lock_irqsave(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) stop_activity(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) spin_unlock_irqrestore(&dev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) dev->driver = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) /* handle ep-a/ep-b dma completions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) net2272_handle_dma(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) unsigned len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (!list_empty(&ep->queue))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) struct net2272_request, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) req = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) dev_vdbg(ep->dev->dev, "handle_dma %s req %p\n", ep->ep.name, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) /* Ensure DREQ is de-asserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) net2272_write(ep->dev, DMAREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) (0 << DMA_BUFFER_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) | (0 << DMA_REQUEST_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) | (1 << DMA_CONTROL_DACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) | (ep->dev->dma_eot_polarity << EOT_POLARITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) | (ep->dev->dma_dack_polarity << DACK_POLARITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) | (ep->dev->dma_dreq_polarity << DREQ_POLARITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) | (ep->dma << DMA_ENDPOINT_SELECT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) ep->dev->dma_busy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) net2272_ep_write(ep, EP_IRQENB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) | net2272_ep_read(ep, EP_IRQENB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) /* device-to-host transfer completed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) if (ep->is_in) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) /* validate a short packet or zlp if necessary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) if ((req->req.length % ep->ep.maxpacket != 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) req->req.zero)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) set_fifo_bytecount(ep, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) net2272_done(ep, req, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) if (!list_empty(&ep->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) struct net2272_request, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) status = net2272_kick_dma(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) net2272_pio_advance(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) /* host-to-device transfer completed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) /* terminated with a short packet? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) if (net2272_read(ep->dev, IRQSTAT0) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) (1 << DMA_DONE_INTERRUPT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) /* abort system dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) net2272_cancel_dma(ep->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) /* EP_TRANSFER will contain the number of bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) * actually received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) * NOTE: There is no overflow detection on EP_TRANSFER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) * We can't deal with transfers larger than 2^24 bytes!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) len = (net2272_ep_read(ep, EP_TRANSFER2) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) | (net2272_ep_read(ep, EP_TRANSFER1) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) | (net2272_ep_read(ep, EP_TRANSFER0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) if (ep->not_empty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) len += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) req->req.actual += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) /* get any remaining data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) net2272_pio_advance(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) net2272_handle_ep(struct net2272_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) u8 stat0, stat1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) if (!list_empty(&ep->queue))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) struct net2272_request, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) req = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) /* ack all, and handle what we care about */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) stat0 = net2272_ep_read(ep, EP_STAT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) stat1 = net2272_ep_read(ep, EP_STAT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) ep->irqs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) dev_vdbg(ep->dev->dev, "%s ack ep_stat0 %02x, ep_stat1 %02x, req %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) ep->ep.name, stat0, stat1, req ? &req->req : NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) net2272_ep_write(ep, EP_STAT0, stat0 &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) ~((1 << NAK_OUT_PACKETS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) net2272_ep_write(ep, EP_STAT1, stat1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) /* data packet(s) received (in the fifo, OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) * direction must be validated, otherwise control read status phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) * could be interpreted as a valid packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) if (!ep->is_in && (stat0 & (1 << DATA_PACKET_RECEIVED_INTERRUPT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) net2272_pio_advance(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) /* data packet(s) transmitted (IN) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) else if (stat0 & (1 << DATA_PACKET_TRANSMITTED_INTERRUPT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) net2272_pio_advance(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) static struct net2272_ep *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) net2272_get_ep_by_addr(struct net2272 *dev, u16 wIndex)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) return &dev->ep[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) u8 bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) if (!ep->desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) bEndpointAddress = ep->desc->bEndpointAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) return ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) * USB Test Packet:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) * JKJKJKJK * 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) * JJKKJJKK * 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) * JJJJKKKK * 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) * JJJJJJJKKKKKKK * 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) * JJJJJJJK * 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) * {JKKKKKKK * 10}, JK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) static const u8 net2272_test_packet[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFD, 0x7E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) net2272_set_test_mode(struct net2272 *dev, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) /* Disable all net2272 interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) * Nothing but a power cycle should stop the test.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) net2272_write(dev, IRQENB0, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) net2272_write(dev, IRQENB1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) /* Force tranceiver to high-speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) net2272_write(dev, XCVRDIAG, 1 << FORCE_HIGH_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) net2272_write(dev, PAGESEL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) net2272_write(dev, EP_STAT0, 1 << DATA_PACKET_TRANSMITTED_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) net2272_write(dev, EP_RSPCLR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) (1 << CONTROL_STATUS_PHASE_HANDSHAKE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) | (1 << HIDE_STATUS_PHASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) net2272_write(dev, EP_CFG, 1 << ENDPOINT_DIRECTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) net2272_write(dev, EP_STAT1, 1 << BUFFER_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) /* wait for status phase to complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) while (!(net2272_read(dev, EP_STAT0) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) (1 << DATA_PACKET_TRANSMITTED_INTERRUPT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) /* Enable test mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) net2272_write(dev, USBTEST, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) /* load test packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) if (mode == USB_TEST_PACKET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) /* switch to 8 bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) net2272_write(dev, LOCCTL, net2272_read(dev, LOCCTL) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) ~(1 << DATA_WIDTH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) for (i = 0; i < sizeof(net2272_test_packet); ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) net2272_write(dev, EP_DATA, net2272_test_packet[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) /* Validate test packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) net2272_write(dev, EP_TRANSFER0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) net2272_handle_stat0_irqs(struct net2272 *dev, u8 stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) struct net2272_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) u8 num, scratch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) /* starting a control request? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) if (unlikely(stat & (1 << SETUP_PACKET_INTERRUPT))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) u8 raw[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) struct usb_ctrlrequest r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) int tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) struct net2272_request *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) if (net2272_read(dev, USBCTL1) & (1 << USB_HIGH_SPEED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) dev->gadget.speed = USB_SPEED_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) dev->gadget.speed = USB_SPEED_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) dev_dbg(dev->dev, "%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) usb_speed_string(dev->gadget.speed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) ep = &dev->ep[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) ep->irqs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) /* make sure any leftover interrupt state is cleared */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) stat &= ~(1 << ENDPOINT_0_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) while (!list_empty(&ep->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) req = list_entry(ep->queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) struct net2272_request, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) net2272_done(ep, req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) (req->req.actual == req->req.length) ? 0 : -EPROTO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) ep->stopped = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) dev->protocol_stall = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) net2272_ep_write(ep, EP_STAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) (1 << DATA_IN_TOKEN_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) | (1 << DATA_OUT_TOKEN_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) | (1 << DATA_PACKET_TRANSMITTED_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) | (1 << DATA_PACKET_RECEIVED_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) | (1 << SHORT_PACKET_TRANSFERRED_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) net2272_ep_write(ep, EP_STAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) (1 << TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) | (1 << USB_OUT_ACK_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) | (1 << USB_OUT_NAK_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) | (1 << USB_IN_ACK_RCVD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) | (1 << USB_IN_NAK_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) | (1 << USB_STALL_SENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) | (1 << LOCAL_OUT_ZLP));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) * Ensure Control Read pre-validation setting is beyond maximum size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) * - Control Writes can leave non-zero values in EP_TRANSFER. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) * an EP0 transfer following the Control Write is a Control Read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) * the NET2272 sees the non-zero EP_TRANSFER as an unexpected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) * pre-validation count.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) * - Setting EP_TRANSFER beyond the maximum EP0 transfer size ensures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) * the pre-validation count cannot cause an unexpected validatation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) net2272_write(dev, PAGESEL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) net2272_write(dev, EP_TRANSFER2, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) net2272_write(dev, EP_TRANSFER1, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) net2272_write(dev, EP_TRANSFER0, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) u.raw[0] = net2272_read(dev, SETUP0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) u.raw[1] = net2272_read(dev, SETUP1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) u.raw[2] = net2272_read(dev, SETUP2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) u.raw[3] = net2272_read(dev, SETUP3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) u.raw[4] = net2272_read(dev, SETUP4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) u.raw[5] = net2272_read(dev, SETUP5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) u.raw[6] = net2272_read(dev, SETUP6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) u.raw[7] = net2272_read(dev, SETUP7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) * If you have a big endian cpu make sure le16_to_cpus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) * performs the proper byte swapping here...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) le16_to_cpus(&u.r.wValue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) le16_to_cpus(&u.r.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) le16_to_cpus(&u.r.wLength);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) /* ack the irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) net2272_write(dev, IRQSTAT0, 1 << SETUP_PACKET_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) stat ^= (1 << SETUP_PACKET_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) /* watch control traffic at the token level, and force
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) * synchronization before letting the status phase happen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) if (ep->is_in) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) scratch = (1 << DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) | (1 << DATA_OUT_TOKEN_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) | (1 << DATA_IN_TOKEN_INTERRUPT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) stop_out_naking(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) scratch = (1 << DATA_PACKET_RECEIVED_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) | (1 << DATA_OUT_TOKEN_INTERRUPT_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) | (1 << DATA_IN_TOKEN_INTERRUPT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) net2272_ep_write(ep, EP_IRQENB, scratch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) if ((u.r.bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) switch (u.r.bRequest) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) case USB_REQ_GET_STATUS: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) struct net2272_ep *e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) u16 status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) switch (u.r.bRequestType & USB_RECIP_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) case USB_RECIP_ENDPOINT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) e = net2272_get_ep_by_addr(dev, u.r.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) if (!e || u.r.wLength > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) if (net2272_ep_read(e, EP_RSPSET) & (1 << ENDPOINT_HALT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) status = cpu_to_le16(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) status = cpu_to_le16(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) /* don't bother with a request object! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) net2272_ep_write(&dev->ep[0], EP_IRQENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) writew(status, net2272_reg_addr(dev, EP_DATA));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) set_fifo_bytecount(&dev->ep[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) dev_vdbg(dev->dev, "%s stat %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) ep->ep.name, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) goto next_endpoints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) case USB_RECIP_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) if (u.r.wLength > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) if (dev->gadget.is_selfpowered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) status = (1 << USB_DEVICE_SELF_POWERED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) /* don't bother with a request object! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) net2272_ep_write(&dev->ep[0], EP_IRQENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) writew(status, net2272_reg_addr(dev, EP_DATA));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) set_fifo_bytecount(&dev->ep[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) dev_vdbg(dev->dev, "device stat %02x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) goto next_endpoints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) case USB_RECIP_INTERFACE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) if (u.r.wLength > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) /* don't bother with a request object! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) net2272_ep_write(&dev->ep[0], EP_IRQENB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) writew(status, net2272_reg_addr(dev, EP_DATA));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) set_fifo_bytecount(&dev->ep[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) dev_vdbg(dev->dev, "interface status %02x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) goto next_endpoints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) case USB_REQ_CLEAR_FEATURE: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) struct net2272_ep *e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) if (u.r.bRequestType != USB_RECIP_ENDPOINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) if (u.r.wValue != USB_ENDPOINT_HALT ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) u.r.wLength != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) e = net2272_get_ep_by_addr(dev, u.r.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) if (!e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) if (e->wedged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) dev_vdbg(dev->dev, "%s wedged, halt not cleared\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) ep->ep.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) dev_vdbg(dev->dev, "%s clear halt\n", ep->ep.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) clear_halt(e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) goto next_endpoints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) case USB_REQ_SET_FEATURE: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) struct net2272_ep *e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) if (u.r.bRequestType == USB_RECIP_DEVICE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) if (u.r.wIndex != NORMAL_OPERATION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) net2272_set_test_mode(dev, (u.r.wIndex >> 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) dev_vdbg(dev->dev, "test mode: %d\n", u.r.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) goto next_endpoints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) } else if (u.r.bRequestType != USB_RECIP_ENDPOINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) if (u.r.wValue != USB_ENDPOINT_HALT ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) u.r.wLength != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) e = net2272_get_ep_by_addr(dev, u.r.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) if (!e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) goto do_stall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) set_halt(e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) dev_vdbg(dev->dev, "%s set halt\n", ep->ep.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) goto next_endpoints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) case USB_REQ_SET_ADDRESS: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) net2272_write(dev, OURADDR, u.r.wValue & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) allow_status(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) delegate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) dev_vdbg(dev->dev, "setup %02x.%02x v%04x i%04x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) "ep_cfg %08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) u.r.bRequestType, u.r.bRequest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) u.r.wValue, u.r.wIndex,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) net2272_ep_read(ep, EP_CFG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) spin_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) tmp = dev->driver->setup(&dev->gadget, &u.r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) spin_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) /* stall ep0 on error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) if (tmp < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) do_stall:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) dev_vdbg(dev->dev, "req %02x.%02x protocol STALL; stat %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) u.r.bRequestType, u.r.bRequest, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) dev->protocol_stall = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) /* endpoint dma irq? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) } else if (stat & (1 << DMA_DONE_INTERRUPT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) net2272_cancel_dma(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) net2272_write(dev, IRQSTAT0, 1 << DMA_DONE_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) stat &= ~(1 << DMA_DONE_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) num = (net2272_read(dev, DMAREQ) & (1 << DMA_ENDPOINT_SELECT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) ? 2 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) ep = &dev->ep[num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) net2272_handle_dma(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) next_endpoints:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) /* endpoint data irq? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) scratch = stat & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) stat &= ~0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) for (num = 0; scratch; num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) u8 t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) /* does this endpoint's FIFO and queue need tending? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) t = 1 << num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) if ((scratch & t) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) scratch ^= t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) ep = &dev->ep[num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) net2272_handle_ep(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) /* some interrupts we can just ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) stat &= ~(1 << SOF_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) if (stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) dev_dbg(dev->dev, "unhandled irqstat0 %02x\n", stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) net2272_handle_stat1_irqs(struct net2272 *dev, u8 stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) u8 tmp, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) /* after disconnect there's nothing else to do! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) tmp = (1 << VBUS_INTERRUPT) | (1 << ROOT_PORT_RESET_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) mask = (1 << USB_HIGH_SPEED) | (1 << USB_FULL_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) if (stat & tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) bool reset = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) bool disconnect = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) * Ignore disconnects and resets if the speed hasn't been set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) * VBUS can bounce and there's always an initial reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) net2272_write(dev, IRQSTAT1, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) if ((stat & (1 << VBUS_INTERRUPT)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) (net2272_read(dev, USBCTL1) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) (1 << VBUS_PIN)) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) disconnect = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) dev_dbg(dev->dev, "disconnect %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) dev->driver->driver.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) } else if ((stat & (1 << ROOT_PORT_RESET_INTERRUPT)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) (net2272_read(dev, USBCTL1) & mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) reset = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) dev_dbg(dev->dev, "reset %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) dev->driver->driver.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) if (disconnect || reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) stop_activity(dev, dev->driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) net2272_ep0_start(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) spin_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) if (reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) usb_gadget_udc_reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) (&dev->gadget, dev->driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) (dev->driver->disconnect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) (&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) spin_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) stat &= ~tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) if (!stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) tmp = (1 << SUSPEND_REQUEST_CHANGE_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) if (stat & tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) net2272_write(dev, IRQSTAT1, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) if (stat & (1 << SUSPEND_REQUEST_INTERRUPT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) if (dev->driver->suspend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) dev->driver->suspend(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) if (!enable_suspend) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) stat &= ~(1 << SUSPEND_REQUEST_INTERRUPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) dev_dbg(dev->dev, "Suspend disabled, ignoring\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) if (dev->driver->resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) dev->driver->resume(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) stat &= ~tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) /* clear any other status/irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) if (stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) net2272_write(dev, IRQSTAT1, stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) /* some status we can just ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) stat &= ~((1 << CONTROL_STATUS_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) | (1 << SUSPEND_REQUEST_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) | (1 << RESUME_INTERRUPT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) if (!stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) dev_dbg(dev->dev, "unhandled irqstat1 %02x\n", stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) static irqreturn_t net2272_irq(int irq, void *_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) struct net2272 *dev = _dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) #if defined(PLX_PCI_RDK) || defined(PLX_PCI_RDK2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) u32 intcsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) #if defined(PLX_PCI_RDK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) u8 dmareq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) spin_lock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) #if defined(PLX_PCI_RDK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) intcsr = readl(dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) if ((intcsr & LOCAL_INTERRUPT_TEST) == LOCAL_INTERRUPT_TEST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) writel(intcsr & ~(1 << PCI_INTERRUPT_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) net2272_handle_stat1_irqs(dev, net2272_read(dev, IRQSTAT1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) net2272_handle_stat0_irqs(dev, net2272_read(dev, IRQSTAT0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) intcsr = readl(dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) writel(intcsr | (1 << PCI_INTERRUPT_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) if ((intcsr & DMA_CHANNEL_0_TEST) == DMA_CHANNEL_0_TEST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) writeb((1 << CHANNEL_CLEAR_INTERRUPT | (0 << CHANNEL_ENABLE)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) dev->rdk1.plx9054_base_addr + DMACSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) dmareq = net2272_read(dev, DMAREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) if (dmareq & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) net2272_handle_dma(&dev->ep[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) net2272_handle_dma(&dev->ep[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) #if defined(PLX_PCI_RDK2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) /* see if PCI int for us by checking irqstat */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) intcsr = readl(dev->rdk2.fpga_base_addr + RDK2_IRQSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) if (!(intcsr & (1 << NET2272_PCI_IRQ))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) spin_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) /* check dma interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) /* Platform/devcice interrupt handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) #if !defined(PLX_PCI_RDK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) net2272_handle_stat1_irqs(dev, net2272_read(dev, IRQSTAT1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) net2272_handle_stat0_irqs(dev, net2272_read(dev, IRQSTAT0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) spin_unlock(&dev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) static int net2272_present(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) * Quick test to see if CPU can communicate properly with the NET2272.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) * Verifies connection using writes and reads to write/read and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) * read-only registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) * This routine is strongly recommended especially during early bring-up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) * of new hardware, however for designs that do not apply Power On System
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) * Tests (POST) it may discarded (or perhaps minimized).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) unsigned int ii;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) u8 val, refval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) /* Verify NET2272 write/read SCRATCH register can write and read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) refval = net2272_read(dev, SCRATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) for (ii = 0; ii < 0x100; ii += 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) net2272_write(dev, SCRATCH, ii);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) val = net2272_read(dev, SCRATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) if (val != ii) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) "%s: write/read SCRATCH register test failed: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) "wrote:0x%2.2x, read:0x%2.2x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) __func__, ii, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) /* To be nice, we write the original SCRATCH value back: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) net2272_write(dev, SCRATCH, refval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) /* Verify NET2272 CHIPREV register is read-only: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) refval = net2272_read(dev, CHIPREV_2272);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) for (ii = 0; ii < 0x100; ii += 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) net2272_write(dev, CHIPREV_2272, ii);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) val = net2272_read(dev, CHIPREV_2272);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) if (val != refval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) "%s: write/read CHIPREV register test failed: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) "wrote 0x%2.2x, read:0x%2.2x expected:0x%2.2x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) __func__, ii, val, refval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) * Verify NET2272's "NET2270 legacy revision" register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) * - NET2272 has two revision registers. The NET2270 legacy revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) * register should read the same value, regardless of the NET2272
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) * silicon revision. The legacy register applies to NET2270
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) * firmware being applied to the NET2272.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) val = net2272_read(dev, CHIPREV_LEGACY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (val != NET2270_LEGACY_REV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) * Unexpected legacy revision value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) * - Perhaps the chip is a NET2270?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) "%s: WARNING: UNEXPECTED NET2272 LEGACY REGISTER VALUE:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) " - CHIPREV_LEGACY: expected 0x%2.2x, got:0x%2.2x. (Not NET2272?)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) __func__, NET2270_LEGACY_REV, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) * Verify NET2272 silicon revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) * - This revision register is appropriate for the silicon version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) * of the NET2272
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) val = net2272_read(dev, CHIPREV_2272);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) case CHIPREV_NET2272_R1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) * NET2272 Rev 1 has DMA related errata:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) * - Newer silicon (Rev 1A or better) required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) "%s: Rev 1 detected: newer silicon recommended for DMA support\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) case CHIPREV_NET2272_R1A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) /* NET2272 silicon version *may* not work with this firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) dev_dbg(dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) "%s: unexpected silicon revision register value: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) " CHIPREV_2272: 0x%2.2x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) __func__, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) * Return Success, even though the chip rev is not an expected value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) * - Older, pre-built firmware can attempt to operate on newer silicon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) * - Often, new silicon is perfectly compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) /* Success: NET2272 checks out OK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) net2272_gadget_release(struct device *_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) struct net2272 *dev = container_of(_dev, struct net2272, gadget.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) kfree(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) net2272_remove(struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) if (dev->added)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) usb_del_gadget(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) iounmap(dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) device_remove_file(dev->dev, &dev_attr_registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) dev_info(dev->dev, "unbind\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) static struct net2272 *net2272_probe_init(struct device *dev, unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) struct net2272 *ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) if (!irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) dev_dbg(dev, "No IRQ!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) /* alloc, and start init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) ret = kzalloc(sizeof(*ret), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) spin_lock_init(&ret->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) ret->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) ret->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) ret->gadget.ops = &net2272_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) ret->gadget.max_speed = USB_SPEED_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) /* the "gadget" abstracts/virtualizes the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) ret->gadget.name = driver_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) usb_initialize_gadget(dev, &ret->gadget, net2272_gadget_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) net2272_probe_fin(struct net2272 *dev, unsigned int irqflags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) /* See if there... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) if (net2272_present(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) dev_warn(dev->dev, "2272 not found!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) net2272_usb_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) net2272_usb_reinit(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) ret = request_irq(dev->irq, net2272_irq, irqflags, driver_name, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) dev_err(dev->dev, "request interrupt %i failed\n", dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) dev->chiprev = net2272_read(dev, CHIPREV_2272);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) /* done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) dev_info(dev->dev, "%s\n", driver_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) dev_info(dev->dev, "irq %i, mem %p, chip rev %04x, dma %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) dev->irq, dev->base_addr, dev->chiprev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) dma_mode_string());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) dev_info(dev->dev, "version: %s\n", driver_vers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) ret = device_create_file(dev->dev, &dev_attr_registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) ret = usb_add_gadget(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) goto err_add_udc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) dev->added = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) err_add_udc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) device_remove_file(dev->dev, &dev_attr_registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) #ifdef CONFIG_USB_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) * wrap this driver around the specified device, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) * don't respond over USB until a gadget driver binds to us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) net2272_rdk1_probe(struct pci_dev *pdev, struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) unsigned long resource, len, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) void __iomem *mem_mapped_addr[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) * BAR 0 holds PLX 9054 config registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) * BAR 1 is i/o memory; unused here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) * BAR 2 holds EPLD config registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) * BAR 3 holds NET2272 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) /* Find and map all address spaces */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) if (i == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) continue; /* BAR1 unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) resource = pci_resource_start(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) len = pci_resource_len(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) if (!request_mem_region(resource, len, driver_name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) dev_dbg(dev->dev, "controller already in use\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) mem_mapped_addr[i] = ioremap(resource, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) if (mem_mapped_addr[i] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) release_mem_region(resource, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) dev_dbg(dev->dev, "can't map memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) dev->rdk1.plx9054_base_addr = mem_mapped_addr[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) dev->rdk1.epld_base_addr = mem_mapped_addr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) dev->base_addr = mem_mapped_addr[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) /* Set PLX 9054 bus width (16 bits) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) tmp = readl(dev->rdk1.plx9054_base_addr + LBRD1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) writel((tmp & ~(3 << MEMORY_SPACE_LOCAL_BUS_WIDTH)) | W16_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) dev->rdk1.plx9054_base_addr + LBRD1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) /* Enable PLX 9054 Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) (1 << PCI_INTERRUPT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) (1 << LOCAL_INTERRUPT_INPUT_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) writeb((1 << CHANNEL_CLEAR_INTERRUPT | (0 << CHANNEL_ENABLE)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) dev->rdk1.plx9054_base_addr + DMACSR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) /* reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) writeb((1 << EPLD_DMA_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) (1 << DMA_CTL_DACK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) (1 << DMA_TIMEOUT_ENABLE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) (1 << USER) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) (0 << MPX_MODE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) (1 << BUSWIDTH) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) (1 << NET2272_RESET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) dev->base_addr + EPLD_IO_CONTROL_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) writeb(readb(dev->base_addr + EPLD_IO_CONTROL_REGISTER) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) ~(1 << NET2272_RESET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) dev->base_addr + EPLD_IO_CONTROL_REGISTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) while (--i >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) if (i == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) continue; /* BAR1 unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) iounmap(mem_mapped_addr[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) release_mem_region(pci_resource_start(pdev, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) pci_resource_len(pdev, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) net2272_rdk2_probe(struct pci_dev *pdev, struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) unsigned long resource, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) void __iomem *mem_mapped_addr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) * BAR 0 holds FGPA config registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) * BAR 1 holds NET2272 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) /* Find and map all address spaces, bar2-3 unused in rdk 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) for (i = 0; i < 2; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) resource = pci_resource_start(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) len = pci_resource_len(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) if (!request_mem_region(resource, len, driver_name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) dev_dbg(dev->dev, "controller already in use\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) mem_mapped_addr[i] = ioremap(resource, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) if (mem_mapped_addr[i] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) release_mem_region(resource, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) dev_dbg(dev->dev, "can't map memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) dev->rdk2.fpga_base_addr = mem_mapped_addr[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) dev->base_addr = mem_mapped_addr[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) /* Set 2272 bus width (16 bits) and reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) writel((1 << CHIP_RESET), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) writel((1 << BUS_WIDTH), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) /* Print fpga version number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) dev_info(dev->dev, "RDK2 FPGA version %08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) readl(dev->rdk2.fpga_base_addr + RDK2_FPGAREV));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) /* Enable FPGA Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) writel((1 << NET2272_PCI_IRQ), dev->rdk2.fpga_base_addr + RDK2_IRQENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) while (--i >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) iounmap(mem_mapped_addr[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) release_mem_region(pci_resource_start(pdev, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) pci_resource_len(pdev, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) net2272_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) dev = net2272_probe_init(&pdev->dev, pdev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) if (IS_ERR(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) return PTR_ERR(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) dev->dev_id = pdev->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) if (pci_enable_device(pdev) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) goto err_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) switch (pdev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) case PCI_DEVICE_ID_RDK1: ret = net2272_rdk1_probe(pdev, dev); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) case PCI_DEVICE_ID_RDK2: ret = net2272_rdk2_probe(pdev, dev); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) default: BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) goto err_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) ret = net2272_probe_fin(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) goto err_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) pci_set_drvdata(pdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) err_pci:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) err_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) usb_put_gadget(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) net2272_rdk1_remove(struct pci_dev *pdev, struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) /* disable PLX 9054 interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) ~(1 << PCI_INTERRUPT_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) /* clean up resources allocated during probe() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) iounmap(dev->rdk1.plx9054_base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) iounmap(dev->rdk1.epld_base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) if (i == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) continue; /* BAR1 unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) release_mem_region(pci_resource_start(pdev, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) pci_resource_len(pdev, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) net2272_rdk2_remove(struct pci_dev *pdev, struct net2272 *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) /* disable fpga interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) ~(1 << PCI_INTERRUPT_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) dev->rdk1.plx9054_base_addr + INTCSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) /* clean up resources allocated during probe() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) iounmap(dev->rdk2.fpga_base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) for (i = 0; i < 2; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) release_mem_region(pci_resource_start(pdev, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) pci_resource_len(pdev, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) net2272_pci_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) struct net2272 *dev = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) net2272_remove(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) switch (pdev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) case PCI_DEVICE_ID_RDK1: net2272_rdk1_remove(pdev, dev); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) case PCI_DEVICE_ID_RDK2: net2272_rdk2_remove(pdev, dev); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) default: BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) usb_put_gadget(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) /* Table of matching PCI IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) static struct pci_device_id pci_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) { /* RDK 1 card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) .class = ((PCI_CLASS_BRIDGE_OTHER << 8) | 0xfe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) .class_mask = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) .vendor = PCI_VENDOR_ID_PLX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) .device = PCI_DEVICE_ID_RDK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) { /* RDK 2 card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) .class = ((PCI_CLASS_BRIDGE_OTHER << 8) | 0xfe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) .class_mask = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) .vendor = PCI_VENDOR_ID_PLX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) .device = PCI_DEVICE_ID_RDK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) MODULE_DEVICE_TABLE(pci, pci_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) static struct pci_driver net2272_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) .name = driver_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) .id_table = pci_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) .probe = net2272_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) .remove = net2272_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) static int net2272_pci_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) return pci_register_driver(&net2272_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) static void net2272_pci_unregister(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) pci_unregister_driver(&net2272_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) static inline int net2272_pci_register(void) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) static inline void net2272_pci_unregister(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) /*---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) net2272_plat_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) struct net2272 *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) unsigned int irqflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) resource_size_t base, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) struct resource *iomem, *iomem_bus, *irq_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) iomem_bus = platform_get_resource(pdev, IORESOURCE_BUS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) if (!irq_res || !iomem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) dev_err(&pdev->dev, "must provide irq/base addr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) dev = net2272_probe_init(&pdev->dev, irq_res->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) if (IS_ERR(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) return PTR_ERR(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) irqflags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) if (irq_res->flags & IORESOURCE_IRQ_HIGHEDGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) irqflags |= IRQF_TRIGGER_RISING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) if (irq_res->flags & IORESOURCE_IRQ_LOWEDGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) irqflags |= IRQF_TRIGGER_FALLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) if (irq_res->flags & IORESOURCE_IRQ_HIGHLEVEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) irqflags |= IRQF_TRIGGER_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) if (irq_res->flags & IORESOURCE_IRQ_LOWLEVEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) irqflags |= IRQF_TRIGGER_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) base = iomem->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) len = resource_size(iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) if (iomem_bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) dev->base_shift = iomem_bus->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) if (!request_mem_region(base, len, driver_name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) dev_dbg(dev->dev, "get request memory region!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) dev->base_addr = ioremap(base, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) if (!dev->base_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) dev_dbg(dev->dev, "can't map memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) goto err_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) ret = net2272_probe_fin(dev, IRQF_TRIGGER_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) goto err_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) platform_set_drvdata(pdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) dev_info(&pdev->dev, "running in 16-bit, %sbyte swap local bus mode\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) (net2272_read(dev, LOCCTL) & (1 << BYTE_SWAP)) ? "" : "no ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) err_io:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) iounmap(dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) err_req:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) release_mem_region(base, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) usb_put_gadget(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) net2272_plat_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) struct net2272 *dev = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) net2272_remove(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) release_mem_region(pdev->resource[0].start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) resource_size(&pdev->resource[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) usb_put_gadget(&dev->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) static struct platform_driver net2272_plat_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) .probe = net2272_plat_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) .remove = net2272_plat_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) .name = driver_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) /* FIXME .suspend, .resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) MODULE_ALIAS("platform:net2272");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) static int __init net2272_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) ret = net2272_pci_register();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) ret = platform_driver_register(&net2272_plat_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) goto err_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) err_pci:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) net2272_pci_unregister();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) module_init(net2272_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) static void __exit net2272_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) net2272_pci_unregister();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) platform_driver_unregister(&net2272_plat_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) module_exit(net2272_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) MODULE_AUTHOR("PLX Technology, Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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