Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * io.h - DesignWare USB3 DRD IO Header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Authors: Felipe Balbi <balbi@ti.com>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *	    Sebastian Andrzej Siewior <bigeasy@linutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __DRIVERS_USB_DWC3_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __DRIVERS_USB_DWC3_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "trace.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "debug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static inline u32 dwc3_readl(void __iomem *base, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	 * We requested the mem region starting from the Globals address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	 * space, see dwc3_probe in core.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	 * However, the offsets are given starting from xHCI address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	value = readl(base + offset - DWC3_GLOBALS_REGS_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	 * When tracing we want to make it easy to find the correct address on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 * documentation, so we revert it back to the proper addresses, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	 * same way they are described on SNPS documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	trace_dwc3_readl(base - DWC3_GLOBALS_REGS_START, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	 * We requested the mem region starting from the Globals address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	 * space, see dwc3_probe in core.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	 * However, the offsets are given starting from xHCI address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	writel(value, base + offset - DWC3_GLOBALS_REGS_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	 * When tracing we want to make it easy to find the correct address on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	 * documentation, so we revert it back to the proper addresses, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	 * same way they are described on SNPS documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	trace_dwc3_writel(base - DWC3_GLOBALS_REGS_START, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif /* __DRIVERS_USB_DWC3_IO_H */