^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * dwc3-of-simple.c - OF glue layer for simple integrations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Felipe Balbi <balbi@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct dwc3_of_simple {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct clk_bulk_data *clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int num_clocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct reset_control *resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) bool need_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int dwc3_of_simple_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct dwc3_of_simple *simple;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (!simple)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) platform_set_drvdata(pdev, simple);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) simple->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Some controllers need to toggle the usb3-otg reset before trying to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * initialize the PHY, otherwise the PHY times out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) simple->need_reset = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) simple->resets = of_reset_control_array_get(np, false, true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (IS_ERR(simple->resets)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ret = PTR_ERR(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) dev_err(dev, "failed to get device resets, err=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) ret = reset_control_deassert(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) goto err_resetc_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ret = clk_bulk_get_all(simple->dev, &simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) goto err_resetc_assert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) simple->num_clocks = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ret = clk_bulk_prepare_enable(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) goto err_resetc_assert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = of_platform_populate(np, NULL, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) goto err_clk_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) err_clk_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) clk_bulk_put_all(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) err_resetc_assert:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reset_control_assert(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) err_resetc_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) reset_control_put(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static void __dwc3_of_simple_teardown(struct dwc3_of_simple *simple)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) of_platform_depopulate(simple->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) clk_bulk_put_all(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) simple->num_clocks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) reset_control_assert(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) reset_control_put(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) pm_runtime_disable(simple->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pm_runtime_put_noidle(simple->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) pm_runtime_set_suspended(simple->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int dwc3_of_simple_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) __dwc3_of_simple_teardown(simple);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static void dwc3_of_simple_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) __dwc3_of_simple_teardown(simple);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct dwc3_of_simple *simple = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) clk_bulk_disable(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct dwc3_of_simple *simple = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return clk_bulk_enable(simple->num_clocks, simple->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct dwc3_of_simple *simple = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (simple->need_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) reset_control_assert(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct dwc3_of_simple *simple = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (simple->need_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) reset_control_deassert(simple->resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) dwc3_of_simple_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static const struct of_device_id of_dwc3_simple_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { .compatible = "rockchip,rk3399-dwc3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { .compatible = "xlnx,zynqmp-dwc3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { .compatible = "cavium,octeon-7130-usb-uctl" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { .compatible = "sprd,sc9860-dwc3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { .compatible = "allwinner,sun50i-h6-dwc3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { .compatible = "hisilicon,hi3670-dwc3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { .compatible = "intel,keembay-dwc3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { /* Sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static struct platform_driver dwc3_of_simple_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .probe = dwc3_of_simple_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .remove = dwc3_of_simple_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .shutdown = dwc3_of_simple_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .name = "dwc3-of-simple",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .of_match_table = of_dwc3_simple_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .pm = &dwc3_of_simple_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) module_platform_driver(dwc3_of_simple_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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