Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * dwc3-imx8mp.c - NXP imx8mp Specific Glue layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2020 NXP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* USB wakeup registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define USB_WAKEUP_CTRL			0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* Global wakeup interrupt enable, also used to clear interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define USB_WAKEUP_EN			BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /* Wakeup from connect or disconnect, only for superspeed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define USB_WAKEUP_SS_CONN		BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* 0 select vbus_valid, 1 select sessvld */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define USB_WAKEUP_VBUS_SRC_SESS_VAL	BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /* Enable signal for wake up from u3 state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define USB_WAKEUP_U3_EN		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* Enable signal for wake up from id change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define USB_WAKEUP_ID_EN		BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* Enable signal for wake up from vbus change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define	USB_WAKEUP_VBUS_EN		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* Enable signal for wake up from dp/dm change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define USB_WAKEUP_DPDM_EN		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define USB_WAKEUP_EN_MASK		GENMASK(5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) struct dwc3_imx8mp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct device			*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct platform_device		*dwc3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	void __iomem			*glue_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct clk			*hsio_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct clk			*suspend_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	int				irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	bool				pm_suspended;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	bool				wakeup_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct dwc3	*dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u32		val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (!dwc3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		val |= USB_WAKEUP_EN | USB_WAKEUP_SS_CONN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		       USB_WAKEUP_U3_EN | USB_WAKEUP_DPDM_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	else if (dwc3->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		       USB_WAKEUP_VBUS_SRC_SESS_VAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct dwc3_imx8mp	*dwc3_imx = _dwc3_imx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct dwc3		*dwc = platform_get_drvdata(dwc3_imx->dwc3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (!dwc3_imx->pm_suspended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	disable_irq_nosync(dwc3_imx->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	dwc3_imx->wakeup_pending = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if ((dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc->xhci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		pm_runtime_resume(&dwc->xhci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	else if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		pm_runtime_get(dwc->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static int dwc3_imx8mp_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	struct device		*dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct device_node	*dwc3_np, *node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct dwc3_imx8mp	*dwc3_imx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	int			err, irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (!node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		dev_err(dev, "device node not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	dwc3_imx = devm_kzalloc(dev, sizeof(*dwc3_imx), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (!dwc3_imx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	platform_set_drvdata(pdev, dwc3_imx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	dwc3_imx->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	dwc3_imx->glue_base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	if (IS_ERR(dwc3_imx->glue_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		return PTR_ERR(dwc3_imx->glue_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (IS_ERR(dwc3_imx->hsio_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		err = PTR_ERR(dwc3_imx->hsio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		dev_err(dev, "Failed to get hsio clk, err=%d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	err = clk_prepare_enable(dwc3_imx->hsio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		dev_err(dev, "Failed to enable hsio clk, err=%d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	dwc3_imx->suspend_clk = devm_clk_get(dev, "suspend");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (IS_ERR(dwc3_imx->suspend_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		err = PTR_ERR(dwc3_imx->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		dev_err(dev, "Failed to get suspend clk, err=%d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		goto disable_hsio_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	err = clk_prepare_enable(dwc3_imx->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		dev_err(dev, "Failed to enable suspend clk, err=%d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		goto disable_hsio_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		err = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		goto disable_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	dwc3_imx->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 					IRQF_ONESHOT, dev_name(dev), dwc3_imx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		dev_err(dev, "failed to request IRQ #%d --> %d\n", irq, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		goto disable_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	err = pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		goto disable_rpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	dwc3_np = of_get_child_by_name(node, "dwc3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	if (!dwc3_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		dev_err(dev, "failed to find dwc3 core child\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		goto disable_rpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	err = of_platform_populate(node, NULL, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		dev_err(&pdev->dev, "failed to create dwc3 core\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		goto err_node_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (!dwc3_imx->dwc3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		dev_err(dev, "failed to get dwc3 platform device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		goto depopulate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	of_node_put(dwc3_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	device_set_wakeup_capable(dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	pm_runtime_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) depopulate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	of_platform_depopulate(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) err_node_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	of_node_put(dwc3_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) disable_rpm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	pm_runtime_put_noidle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) disable_clks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	clk_disable_unprepare(dwc3_imx->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) disable_hsio_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	clk_disable_unprepare(dwc3_imx->hsio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int dwc3_imx8mp_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	of_platform_depopulate(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	clk_disable_unprepare(dwc3_imx->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	clk_disable_unprepare(dwc3_imx->hsio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	pm_runtime_put_noidle(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	platform_set_drvdata(pdev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static int __maybe_unused dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 					      pm_message_t msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	if (dwc3_imx->pm_suspended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	/* Wakeup enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (PMSG_IS_AUTO(msg) || device_may_wakeup(dwc3_imx->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		dwc3_imx8mp_wakeup_enable(dwc3_imx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	dwc3_imx->pm_suspended = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int __maybe_unused dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 					     pm_message_t msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	struct dwc3	*dwc = platform_get_drvdata(dwc3_imx->dwc3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	if (!dwc3_imx->pm_suspended)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	/* Wakeup disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	dwc3_imx8mp_wakeup_disable(dwc3_imx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	dwc3_imx->pm_suspended = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	if (dwc3_imx->wakeup_pending) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		dwc3_imx->wakeup_pending = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			pm_runtime_mark_last_busy(dwc->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			pm_runtime_put_autosuspend(dwc->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			 * Add wait for xhci switch from suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			 * clock to normal clock to detect connection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			usleep_range(9000, 10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		enable_irq(dwc3_imx->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int __maybe_unused dwc3_imx8mp_pm_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if (device_may_wakeup(dwc3_imx->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		enable_irq_wake(dwc3_imx->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		clk_disable_unprepare(dwc3_imx->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	clk_disable_unprepare(dwc3_imx->hsio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	dev_dbg(dev, "dwc3 imx8mp pm suspend.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int __maybe_unused dwc3_imx8mp_pm_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (device_may_wakeup(dwc3_imx->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		disable_irq_wake(dwc3_imx->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		ret = clk_prepare_enable(dwc3_imx->suspend_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	ret = clk_prepare_enable(dwc3_imx->hsio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	ret = dwc3_imx8mp_resume(dwc3_imx, PMSG_RESUME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	pm_runtime_set_active(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	dev_dbg(dev, "dwc3 imx8mp pm resume.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int __maybe_unused dwc3_imx8mp_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	dev_dbg(dev, "dwc3 imx8mp runtime suspend.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	return dwc3_imx8mp_suspend(dwc3_imx, PMSG_AUTO_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int __maybe_unused dwc3_imx8mp_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	dev_dbg(dev, "dwc3 imx8mp runtime resume.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	return dwc3_imx8mp_resume(dwc3_imx, PMSG_AUTO_RESUME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static const struct dev_pm_ops dwc3_imx8mp_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_imx8mp_pm_suspend, dwc3_imx8mp_pm_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	SET_RUNTIME_PM_OPS(dwc3_imx8mp_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 			   dwc3_imx8mp_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static const struct of_device_id dwc3_imx8mp_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	{ .compatible = "fsl,imx8mp-dwc3", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MODULE_DEVICE_TABLE(of, dwc3_imx8mp_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static struct platform_driver dwc3_imx8mp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	.probe		= dwc3_imx8mp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	.remove		= dwc3_imx8mp_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	.driver		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		.name	= "imx8mp-dwc3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		.pm	= &dwc3_imx8mp_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		.of_match_table	= dwc3_imx8mp_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) module_platform_driver(dwc3_imx8mp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MODULE_ALIAS("platform:imx8mp-dwc3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MODULE_AUTHOR("jun.li@nxp.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MODULE_DESCRIPTION("DesignWare USB3 imx8mp Glue Layer");