^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) config USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) tristate "DesignWare USB3 DRD Core Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) depends on (USB || USB_GADGET) && HAS_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) select USB_XHCI_PLATFORM if USB_XHCI_HCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Say Y or M here if your system has a Dual Role SuperSpeed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) USB controller based on the DesignWare USB3 IP Core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) If you choose to build this driver is a dynamically linked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) module, the module will be called dwc3.ko.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) if USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) config USB_DWC3_ULPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) bool "Register ULPI PHY Interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Select this if you have ULPI type PHY attached to your DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) bool "DWC3 Mode Selection"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) default USB_DWC3_HOST if (USB && !USB_GADGET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) default USB_DWC3_GADGET if (!USB && USB_GADGET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) config USB_DWC3_HOST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) bool "Host only mode"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) depends on USB=y || USB=USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Select this when you want to use DWC3 in host mode only,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) thereby the gadget feature will be regressed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) config USB_DWC3_GADGET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) bool "Gadget only mode"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) depends on USB_GADGET=y || USB_GADGET=USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Select this when you want to use DWC3 in gadget mode only,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) thereby the host feature will be regressed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) config USB_DWC3_DUAL_ROLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) bool "Dual Role mode"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) depends on (EXTCON=y || EXTCON=USB_DWC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) This is the default mode of working of DWC3 controller where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) both host and gadget features are enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) comment "Platform Glue Driver Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) config USB_DWC3_OMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) tristate "Texas Instruments OMAP5 and similar Platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) depends on ARCH_OMAP2PLUS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) depends on EXTCON || !EXTCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) Some platforms from Texas Instruments like OMAP5, DRA7xxx and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) AM437x use this IP for USB2/3 functionality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) Say 'Y' or 'M' here if you have one such device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) config USB_DWC3_EXYNOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) tristate "Samsung Exynos Platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) say 'Y' or 'M' if you have one such device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) config USB_DWC3_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) tristate "PCIe-based Platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) depends on USB_PCI && ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) If you're using the DesignWare Core IP with a PCIe (but not HAPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) platform), please say 'Y' or 'M' here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) config USB_DWC3_HAPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) tristate "Synopsys PCIe-based HAPS Platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) depends on USB_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) platform, please say 'Y' or 'M' here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) config USB_DWC3_KEYSTONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) tristate "Texas Instruments Keystone2/AM654 Platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) Say 'Y' or 'M' here if you have one such device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) config USB_DWC3_MESON_G12A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) tristate "Amlogic Meson G12A Platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) depends on OF && COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) depends on ARCH_MESON || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) select USB_ROLE_SWITCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) select REGMAP_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) Support USB2/3 functionality in Amlogic G12A platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) Say 'Y' or 'M' if you have one such device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) config USB_DWC3_OF_SIMPLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) tristate "Generic OF Simple Glue Layer"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) depends on OF && COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) Support USB2/3 functionality in simple SoC integrations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) Currently supports Xilinx and Qualcomm DWC USB3 IP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) Say 'Y' or 'M' if you have one such device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) config USB_DWC3_ST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) tristate "STMicroelectronics Platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) depends on (ARCH_STI || COMPILE_TEST) && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) STMicroelectronics SoCs with one DesignWare Core USB3 IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) inside (i.e. STiH407).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) Say 'Y' or 'M' if you have one such device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) config USB_DWC3_QCOM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) tristate "Qualcomm Platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) depends on ARCH_QCOM || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) depends on EXTCON || !EXTCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) depends on (OF || ACPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) Some Qualcomm SoCs use DesignWare Core IP for USB2/3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) functionality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) This driver also handles Qscratch wrapper which is needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) for peripheral mode support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) Say 'Y' or 'M' if you have one such device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) config USB_DWC3_IMX8MP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) tristate "NXP iMX8MP Platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) depends on OF && COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) depends on (ARCH_MXC && ARM64) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) default USB_DWC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) functionality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) Say 'Y' or 'M' if you have one such device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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