Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * drd.c - DesignWare USB2 DRD Controller Dual-role support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2020 STMicroelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author(s): Amelie Delaunay <amelie.delaunay@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/iopoll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/usb/role.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) static void dwc2_ovr_init(struct dwc2_hsotg *hsotg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	u32 gotgctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	spin_lock_irqsave(&hsotg->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	gotgctl = dwc2_readl(hsotg, GOTGCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN | GOTGCTL_VBVALOEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	gotgctl &= ~(GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	dwc2_writel(hsotg, gotgctl, GOTGCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	spin_unlock_irqrestore(&hsotg->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	dwc2_force_mode(hsotg, (hsotg->dr_mode == USB_DR_MODE_HOST));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static int dwc2_ovr_avalid(struct dwc2_hsotg *hsotg, bool valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32 gotgctl = dwc2_readl(hsotg, GOTGCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	/* Check if A-Session is already in the right state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if ((valid && (gotgctl & GOTGCTL_ASESVLD)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	    (!valid && !(gotgctl & GOTGCTL_ASESVLD)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		return -EALREADY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	gotgctl &= ~GOTGCTL_BVALOVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	if (valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		gotgctl |= GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		gotgctl &= ~(GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	dwc2_writel(hsotg, gotgctl, GOTGCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static int dwc2_ovr_bvalid(struct dwc2_hsotg *hsotg, bool valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 gotgctl = dwc2_readl(hsotg, GOTGCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	/* Check if B-Session is already in the right state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	if ((valid && (gotgctl & GOTGCTL_BSESVLD)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	    (!valid && !(gotgctl & GOTGCTL_BSESVLD)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		return -EALREADY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	gotgctl &= ~GOTGCTL_AVALOVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		gotgctl |= GOTGCTL_BVALOVAL | GOTGCTL_VBVALOVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		gotgctl &= ~(GOTGCTL_BVALOVAL | GOTGCTL_VBVALOVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	dwc2_writel(hsotg, gotgctl, GOTGCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static int dwc2_drd_role_sw_set(struct usb_role_switch *sw, enum usb_role role)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct dwc2_hsotg *hsotg = usb_role_switch_get_drvdata(sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int already = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	/* Skip session not in line with dr_mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if ((role == USB_ROLE_DEVICE && hsotg->dr_mode == USB_DR_MODE_HOST) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	    (role == USB_ROLE_HOST && hsotg->dr_mode == USB_DR_MODE_PERIPHERAL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/* Skip session if core is in test mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	if (role == USB_ROLE_NONE && hsotg->test_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		dev_dbg(hsotg->dev, "Core is in test mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	 * In case of USB_DR_MODE_PERIPHERAL, clock is disabled at the end of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	 * the probe and enabled on udc_start.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	 * If role-switch set is called before the udc_start, we need to enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	 * the clock to read/write GOTGCTL and GUSBCFG registers to override
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	 * mode and sessions. It is the case if cable is plugged at boot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!hsotg->ll_hw_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		int ret = clk_bulk_prepare_enable(hsotg->num_clks, hsotg->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	spin_lock_irqsave(&hsotg->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (role == USB_ROLE_HOST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		already = dwc2_ovr_avalid(hsotg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	} else if (role == USB_ROLE_DEVICE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		already = dwc2_ovr_bvalid(hsotg, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		if (dwc2_is_device_enabled(hsotg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			/* This clear DCTL.SFTDISCON bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			dwc2_hsotg_core_connect(hsotg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		if (dwc2_is_device_mode(hsotg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 			if (!dwc2_ovr_bvalid(hsotg, false))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 				/* This set DCTL.SFTDISCON bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 				dwc2_hsotg_core_disconnect(hsotg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			dwc2_ovr_avalid(hsotg, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	spin_unlock_irqrestore(&hsotg->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (!already && hsotg->dr_mode == USB_DR_MODE_OTG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		/* This will raise a Connector ID Status Change Interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		dwc2_force_mode(hsotg, role == USB_ROLE_HOST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	if (!hsotg->ll_hw_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		clk_bulk_disable_unprepare(hsotg->num_clks, hsotg->clks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	dev_dbg(hsotg->dev, "%s-session valid\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		role == USB_ROLE_NONE ? "No" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		role == USB_ROLE_HOST ? "A" : "B");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int dwc2_drd_init(struct dwc2_hsotg *hsotg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	struct usb_role_switch_desc role_sw_desc = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct usb_role_switch *role_sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (!device_property_read_bool(hsotg->dev, "usb-role-switch"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	role_sw_desc.driver_data = hsotg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	role_sw_desc.fwnode = dev_fwnode(hsotg->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	role_sw_desc.set = dwc2_drd_role_sw_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	role_sw_desc.allow_userspace_control = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	role_sw = usb_role_switch_register(hsotg->dev, &role_sw_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if (IS_ERR(role_sw)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		ret = PTR_ERR(role_sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		dev_err(hsotg->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			"failed to register role switch: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	hsotg->role_sw = role_sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	/* Enable override and initialize values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	dwc2_ovr_init(hsotg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) void dwc2_drd_suspend(struct dwc2_hsotg *hsotg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	u32 gintsts, gintmsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (hsotg->role_sw && !hsotg->params.external_id_pin_ctl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		gintmsk = dwc2_readl(hsotg, GINTMSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		gintmsk &= ~GINTSTS_CONIDSTSCHNG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		dwc2_writel(hsotg, gintmsk, GINTMSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		gintsts = dwc2_readl(hsotg, GINTSTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		dwc2_writel(hsotg, gintsts | GINTSTS_CONIDSTSCHNG, GINTSTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) void dwc2_drd_resume(struct dwc2_hsotg *hsotg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	u32 gintsts, gintmsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (hsotg->role_sw && !hsotg->params.external_id_pin_ctl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		gintsts = dwc2_readl(hsotg, GINTSTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		dwc2_writel(hsotg, gintsts | GINTSTS_CONIDSTSCHNG, GINTSTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		gintmsk = dwc2_readl(hsotg, GINTMSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		gintmsk |= GINTSTS_CONIDSTSCHNG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		dwc2_writel(hsotg, gintmsk, GINTMSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) void dwc2_drd_exit(struct dwc2_hsotg *hsotg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (hsotg->role_sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		usb_role_switch_unregister(hsotg->role_sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }