^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * udc.h - ChipIdea UDC structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: David Lopo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __DRIVERS_USB_CHIPIDEA_UDC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __DRIVERS_USB_CHIPIDEA_UDC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CTRL_PAYLOAD_MAX 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RX 0 /* similar to USB_DIR_OUT but can be used as an index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TX 1 /* similar to USB_DIR_IN but can be used as an index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* DMA layout of transfer descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct ci_hw_td {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) __le32 next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define TD_TERMINATE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TD_ADDR_MASK (0xFFFFFFEUL << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) __le32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TD_STATUS (0x00FFUL << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define TD_STATUS_TR_ERR BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define TD_STATUS_DT_ERR BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TD_STATUS_HALTED BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define TD_STATUS_ACTIVE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TD_MULTO (0x0003UL << 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TD_IOC BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TD_TOTAL_BYTES (0x7FFFUL << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) __le32 page[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define TD_CURR_OFFSET (0x0FFFUL << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define TD_FRAME_NUM (0x07FFUL << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define TD_RESERVED_MASK (0x0FFFUL << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) } __attribute__ ((packed, aligned(4)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* DMA layout of queue heads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct ci_hw_qh {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) __le32 cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define QH_IOS BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define QH_MAX_PKT (0x07FFUL << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define QH_ZLT BIT(29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define QH_MULT (0x0003UL << 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define QH_ISO_MULT(x) ((x >> 11) & 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __le32 curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* 2 - 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct ci_hw_td td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* 9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) __le32 RESERVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct usb_ctrlrequest setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) } __attribute__ ((packed, aligned(4)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct td_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct list_head td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct ci_hw_td *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int td_remaining_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * struct ci_hw_req - usb request representation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * @req: request structure for gadget drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * @queue: link to QH list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * @tds: link to TD list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct ci_hw_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct usb_request req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct list_head queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct list_head tds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #ifdef CONFIG_USB_CHIPIDEA_UDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int ci_hdrc_gadget_init(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) void ci_hdrc_gadget_destroy(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static inline int ci_hdrc_gadget_init(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static inline void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #endif /* __DRIVERS_USB_CHIPIDEA_UDC_H */