^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * udc.c - ChipIdea UDC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: David Lopo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/dmapool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irqreturn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/pinctrl/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/usb/ch9.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/usb/gadget.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/usb/otg-fsm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/usb/chipidea.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "ci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "bits.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "otg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "otg_fsm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* control endpoint description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static const struct usb_endpoint_descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ctrl_endpt_out_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .bLength = USB_DT_ENDPOINT_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .bDescriptorType = USB_DT_ENDPOINT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .bEndpointAddress = USB_DIR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static const struct usb_endpoint_descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ctrl_endpt_in_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .bLength = USB_DT_ENDPOINT_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .bDescriptorType = USB_DT_ENDPOINT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .bEndpointAddress = USB_DIR_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * hw_ep_bit: calculates the bit number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * This function returns bit number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static inline int hw_ep_bit(int num, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return num + ((dir == TX) ? 16 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static inline int ep_to_bit(struct ci_hdrc *ci, int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int fill = 16 - ci->hw_ep_max / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (n >= ci->hw_ep_max / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) n += fill;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * hw_device_state: enables/disables interrupts (execute without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @dma: 0 => disable, !0 => enable and set dma engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int hw_device_state(struct ci_hdrc *ci, u32 dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (dma) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* interrupt, error, port change, reset, sleep/suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) hw_write(ci, OP_USBINTR, ~0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) hw_write(ci, OP_USBINTR, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * hw_ep_flush: flush endpoint fifo (execute without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int n = hw_ep_bit(num, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* flush any pending transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * hw_ep_disable: disables endpoint (execute without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) hw_write(ci, OP_ENDPTCTRL + num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * hw_ep_enable: enables endpoint (execute without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @type: endpoint type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u32 mask, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (dir == TX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) mask = ENDPTCTRL_TXT; /* type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) data = type << __ffs(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) mask |= ENDPTCTRL_TXS; /* unstall */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) mask |= ENDPTCTRL_TXR; /* reset data toggle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) data |= ENDPTCTRL_TXR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) mask |= ENDPTCTRL_TXE; /* enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) data |= ENDPTCTRL_TXE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) mask = ENDPTCTRL_RXT; /* type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) data = type << __ffs(mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) mask |= ENDPTCTRL_RXS; /* unstall */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) mask |= ENDPTCTRL_RXR; /* reset data toggle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) data |= ENDPTCTRL_RXR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) mask |= ENDPTCTRL_RXE; /* enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) data |= ENDPTCTRL_RXE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) hw_write(ci, OP_ENDPTCTRL + num, mask, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * hw_ep_get_halt: return endpoint halt status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * This function returns 1 if endpoint halted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * hw_ep_prime: primes endpoint (execute without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * @is_ctrl: true if control endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int n = hw_ep_bit(num, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* Synchronize before ep prime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* status shoult be tested according with manual but it doesn't work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * @num: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @dir: endpoint direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @value: true => stall, false => unstall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (value != 0 && value != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) enum ci_hw_regs reg = OP_ENDPTCTRL + num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* data toggle - reserved for EP0 but it's in ESS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) hw_write(ci, reg, mask_xs|mask_xr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) value ? mask_xs : mask_xr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) } while (value != hw_ep_get_halt(ci, num, dir));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * hw_is_port_high_speed: test if port is high speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * This function returns true if high speed port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int hw_port_is_high_speed(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) hw_read(ci, OP_PORTSC, PORTSC_HSP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * hw_test_and_clear_complete: test & clear complete status (execute without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * @n: endpoint number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * This function returns complete status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) n = ep_to_bit(ci, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * hw_test_and_clear_intr_active: test & clear active interrupts (execute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * This function returns active interrutps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) hw_write(ci, OP_USBSTS, ~0, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * This function returns guard value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * hw_test_and_set_setup_guard: test & set setup guard (execute without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * This function returns guard value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * hw_usb_set_address: configures USB address (execute without interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * @value: new USB address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * This function explicitly sets the address, without the "USBADRA" (advance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * feature, which is not supported by older versions of the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) value << __ffs(DEVICEADDR_USBADR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * hw_usb_reset: restart device after a bus reset (execute without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * interruption)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int hw_usb_reset(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) hw_usb_set_address(ci, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* ESS flushes only at end?!? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* clear setup token semaphores */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* clear complete status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* wait until all bits cleared */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) while (hw_read(ci, OP_ENDPTPRIME, ~0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) udelay(10); /* not RTOS friendly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /* reset all endpoints ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /* reset internal status and wait for further instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) no need to verify the port reset status (ESS does it) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * UTIL block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) unsigned int length, struct scatterlist *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u32 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (node == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (node->ptr == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) kfree(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u32 mul = hwreq->req.length / hwep->ep.maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (hwreq->req.length == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) || hwreq->req.length % hwep->ep.maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) mul++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (s) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) node->td_remaining_size = CI_MAX_BUF_SIZE - length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) temp = (u32) (hwreq->req.dma + hwreq->req.actual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) node->ptr->page[0] = cpu_to_le32(temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) for (i = 1; i < TD_PAGE_COUNT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u32 page = temp + i * CI_HDRC_PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) page &= ~TD_RESERVED_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) node->ptr->page[i] = cpu_to_le32(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) hwreq->req.actual += length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!list_empty(&hwreq->tds)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* get the last entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) lastnode = list_entry(hwreq->tds.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct td_node, td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) lastnode->ptr->next = cpu_to_le32(node->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) INIT_LIST_HEAD(&node->td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) list_add_tail(&node->td, &hwreq->tds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * _usb_addr: calculates endpoint address from direction & number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * @ep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static inline u8 _usb_addr(struct ci_hw_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct ci_hw_req *hwreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) unsigned int rest = hwreq->req.length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) int pages = TD_PAGE_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (rest == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) ret = add_td_to_list(hwep, hwreq, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * The first buffer could be not page aligned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * In that case we have to span into one extra td.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (hwreq->req.dma % PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) pages--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) while (rest > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) unsigned int count = min(hwreq->req.length - hwreq->req.actual,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ret = add_td_to_list(hwep, hwreq, count, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) rest -= count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ret = add_td_to_list(hwep, hwreq, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct scatterlist *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) unsigned int rest = sg_dma_len(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) hwreq->req.actual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) while (rest > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) unsigned int count = min_t(unsigned int, rest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) CI_MAX_BUF_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) ret = add_td_to_list(hwep, hwreq, count, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) rest -= count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) / CI_HDRC_PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) u32 token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) node->ptr->token = cpu_to_le32(token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) u32 page = (u32) sg_dma_address(s) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) page &= ~TD_RESERVED_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) node->ptr->page[i] = cpu_to_le32(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct usb_request *req = &hwreq->req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) struct scatterlist *s = req->sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int ret = 0, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct td_node *node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (!s || req->zero || req->length == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) dev_err(hwep->ci->dev, "not supported operation for sg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) while (i++ < req->num_mapped_sgs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (sg_dma_address(s) % PAGE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (node && (node->td_remaining_size >= sg_dma_len(s))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ci_add_buffer_entry(node, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) node->td_remaining_size -= sg_dma_len(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ret = prepare_td_per_sg(hwep, hwreq, s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) node = list_entry(hwreq->tds.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) struct td_node, td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) s = sg_next(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * _hardware_enqueue: configures a request at hardware level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * @hwep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * @hwreq: request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct ci_hdrc *ci = hwep->ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) struct td_node *firstnode, *lastnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) /* don't queue twice */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (hwreq->req.status == -EALREADY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return -EALREADY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) hwreq->req.status = -EALREADY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) ret = usb_gadget_map_request_by_dev(ci->dev->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) &hwreq->req, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (hwreq->req.num_mapped_sgs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) ret = prepare_td_for_sg(hwep, hwreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ret = prepare_td_for_non_sg(hwep, hwreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) lastnode = list_entry(hwreq->tds.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct td_node, td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (!hwreq->req.no_interrupt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) lastnode->ptr->token |= cpu_to_le32(TD_IOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) hwreq->req.actual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (!list_empty(&hwep->qh.queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct ci_hw_req *hwreqprev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) int n = hw_ep_bit(hwep->num, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int tmp_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct td_node *prevlastnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) u32 next = firstnode->dma & TD_ADDR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) hwreqprev = list_entry(hwep->qh.queue.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) struct ci_hw_req, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) prevlastnode = list_entry(hwreqprev->tds.prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct td_node, td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) prevlastnode->ptr->next = cpu_to_le32(next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (tmp_stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* QH configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) hwep->qh.ptr->td.token &=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u32 mul = hwreq->req.length / hwep->ep.maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (hwreq->req.length == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) || hwreq->req.length % hwep->ep.maxpacket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) mul++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) ret = hw_ep_prime(ci, hwep->num, hwep->dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) hwep->type == USB_ENDPOINT_XFER_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * free_pending_td: remove a pending request for the endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * @hwep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static void free_pending_td(struct ci_hw_ep *hwep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct td_node *pending = hwep->pending_td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) hwep->pending_td = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) kfree(pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct td_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) hwep->qh.ptr->td.token &=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) return hw_ep_prime(ci, hwep->num, hwep->dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) hwep->type == USB_ENDPOINT_XFER_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * _hardware_dequeue: handles a request at hardware level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * @hwep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * @hwreq: request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) u32 tmptoken;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) struct td_node *node, *tmpnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) unsigned remaining_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) unsigned actual = hwreq->req.length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) struct ci_hdrc *ci = hwep->ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (hwreq->req.status != -EALREADY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) hwreq->req.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) tmptoken = le32_to_cpu(node->ptr->token);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) int n = hw_ep_bit(hwep->num, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) if (ci->rev == CI_REVISION_24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) reprime_dtd(ci, hwep, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) hwreq->req.status = -EALREADY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) remaining_length = (tmptoken & TD_TOTAL_BYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) remaining_length >>= __ffs(TD_TOTAL_BYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) actual -= remaining_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) hwreq->req.status = tmptoken & TD_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) if ((TD_STATUS_HALTED & hwreq->req.status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) hwreq->req.status = -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) hwreq->req.status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) hwreq->req.status = -EILSEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (remaining_length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (hwep->dir == TX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) hwreq->req.status = -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) * As the hardware could still address the freed td
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) * which will run the udc unusable, the cleanup of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * td has to be delayed by one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (hwep->pending_td)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) free_pending_td(hwep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) hwep->pending_td = node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) list_del_init(&node->td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) &hwreq->req, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) hwreq->req.actual += actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (hwreq->req.status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) return hwreq->req.status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return hwreq->req.actual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * _ep_nuke: dequeues all endpoint requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * @hwep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * Caller must hold lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) static int _ep_nuke(struct ci_hw_ep *hwep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) __releases(hwep->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) __acquires(hwep->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) struct td_node *node, *tmpnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (hwep == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) while (!list_empty(&hwep->qh.queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) /* pop oldest request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) struct ci_hw_req, queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) dma_pool_free(hwep->td_pool, node->ptr, node->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) list_del_init(&node->td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) node->ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) kfree(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) list_del_init(&hwreq->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) hwreq->req.status = -ESHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (hwreq->req.complete != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) spin_unlock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) spin_lock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) if (hwep->pending_td)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) free_pending_td(hwep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) int direction, retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (ep == NULL || hwep->ep.desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) if (usb_endpoint_xfer_isoc(hwep->ep.desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (value && hwep->dir == TX && check_transfer &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) !list_empty(&hwep->qh.queue) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) !usb_endpoint_xfer_control(hwep->ep.desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) direction = hwep->dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) if (!value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) hwep->wedge = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) hwep->dir = (hwep->dir == TX) ? RX : TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) } while (hwep->dir != direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) * @gadget: gadget
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) static int _gadget_stop_activity(struct usb_gadget *gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) struct usb_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /* flush all endpoints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) gadget_for_each_ep(ep, gadget) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) usb_ep_fifo_flush(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) usb_ep_fifo_flush(&ci->ep0out->ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) usb_ep_fifo_flush(&ci->ep0in->ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) /* make sure to disable all endpoints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) gadget_for_each_ep(ep, gadget) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) usb_ep_disable(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) if (ci->status != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) usb_ep_free_request(&ci->ep0in->ep, ci->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) ci->status = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) spin_lock_irqsave(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) ci->gadget.speed = USB_SPEED_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) ci->remote_wakeup = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) ci->suspended = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) * ISR block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) * isr_reset_handler: USB reset interrupt handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) * @ci: UDC device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) * This function resets USB engine after a bus reset occurred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) static void isr_reset_handler(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) __releases(ci->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) __acquires(ci->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (ci->gadget.speed != USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) usb_gadget_udc_reset(&ci->gadget, ci->driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) retval = _gadget_stop_activity(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) retval = hw_usb_reset(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) if (ci->status == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) dev_err(ci->dev, "error: %i\n", retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) * isr_get_status_complete: get_status request complete function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) * @ep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) * @req: request handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) * Caller must release lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if (ep == NULL || req == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) kfree(req->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) usb_ep_free_request(ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) * _ep_queue: queues (submits) an I/O request to an endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) * @ep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) * @req: request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) * @gfp_flags: GFP flags (not used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) * Caller must hold lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) gfp_t __maybe_unused gfp_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) struct ci_hdrc *ci = hwep->ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) if (req->length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) hwep = (ci->ep0_dir == RX) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) ci->ep0out : ci->ep0in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (!list_empty(&hwep->qh.queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) _ep_nuke(hwep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) _usb_addr(hwep));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) dev_err(hwep->ci->dev, "request length too big for isochronous\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) return -EMSGSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) /* first nuke then test link, e.g. previous status has not sent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (!list_empty(&hwreq->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) dev_err(hwep->ci->dev, "request already in queue\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) /* push request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) hwreq->req.status = -EINPROGRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) hwreq->req.actual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) retval = _hardware_enqueue(hwep, hwreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) if (retval == -EALREADY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) if (!retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) list_add_tail(&hwreq->queue, &hwep->qh.queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) * isr_get_status_response: get_status request response
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * @ci: ci struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * @setup: setup request packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) static int isr_get_status_response(struct ci_hdrc *ci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) struct usb_ctrlrequest *setup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) __releases(hwep->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) __acquires(hwep->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) struct ci_hw_ep *hwep = ci->ep0in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) struct usb_request *req = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) gfp_t gfp_flags = GFP_ATOMIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) int dir, num, retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) if (hwep == NULL || setup == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) spin_unlock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) spin_lock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) if (req == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) req->complete = isr_get_status_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) req->length = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) req->buf = kzalloc(req->length, gfp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (req->buf == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) goto err_free_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) *(u16 *)req->buf = (ci->remote_wakeup << 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) ci->gadget.is_selfpowered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) } else if ((setup->bRequestType & USB_RECIP_MASK) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) == USB_RECIP_ENDPOINT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) TX : RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) /* else do nothing; reserved for future use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) retval = _ep_queue(&hwep->ep, req, gfp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) goto err_free_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) err_free_buf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) kfree(req->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) err_free_req:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) spin_unlock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) usb_ep_free_request(&hwep->ep, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) spin_lock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * isr_setup_status_complete: setup_status request complete function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) * @ep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * @req: request handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) * Caller must release lock. Put the port in test mode if test mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * feature is selected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) struct ci_hdrc *ci = req->context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) if (ci->setaddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) hw_usb_set_address(ci, ci->address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) ci->setaddr = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) if (ci->address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) spin_lock_irqsave(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (ci->test_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) hw_port_test_set(ci, ci->test_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) * isr_setup_status_phase: queues the status phase of a setup transation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) * @ci: ci struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static int isr_setup_status_phase(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) struct ci_hw_ep *hwep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) * Unexpected USB controller behavior, caused by bad signal integrity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) * or ground reference problems, can lead to isr_setup_status_phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * being called with ci->status equal to NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * If this situation occurs, you should review your USB hardware design.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) if (WARN_ON_ONCE(!ci->status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) return -EPIPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) ci->status->context = ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) ci->status->complete = isr_setup_status_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) * isr_tr_complete_low: transaction complete low level handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) * @hwep: endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) * This function returns an error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) * Caller must hold lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) static int isr_tr_complete_low(struct ci_hw_ep *hwep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) __releases(hwep->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) __acquires(hwep->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) struct ci_hw_req *hwreq, *hwreqtemp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) struct ci_hw_ep *hweptemp = hwep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) retval = _hardware_dequeue(hwep, hwreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) if (retval < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) list_del_init(&hwreq->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (hwreq->req.complete != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) spin_unlock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) hwreq->req.length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) hweptemp = hwep->ci->ep0in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) spin_lock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) if (retval == -EBUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) dev_warn(&ci->gadget.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) "connect the device to an alternate port if you want HNP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) return isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) * isr_setup_packet_handler: setup packet handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * @ci: UDC descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) * This function handles setup packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) static void isr_setup_packet_handler(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) __releases(ci->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) __acquires(ci->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) struct usb_ctrlrequest req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) int type, num, dir, err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) u8 tmode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) * Flush data and handshake transactions of previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) * setup packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) _ep_nuke(ci->ep0out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) _ep_nuke(ci->ep0in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) /* read_setup_packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) hw_test_and_set_setup_guard(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) } while (!hw_test_and_clear_setup_guard(ci));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) type = req.bRequestType;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) switch (req.bRequest) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) case USB_REQ_CLEAR_FEATURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) le16_to_cpu(req.wValue) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) USB_ENDPOINT_HALT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) if (req.wLength != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) num = le16_to_cpu(req.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) num &= USB_ENDPOINT_NUMBER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) if (dir == TX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) num += ci->hw_ep_max / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) if (!ci->ci_hw_ep[num].wedge) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) err = usb_ep_clear_halt(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) &ci->ci_hw_ep[num].ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) err = isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) le16_to_cpu(req.wValue) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) USB_DEVICE_REMOTE_WAKEUP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) if (req.wLength != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) ci->remote_wakeup = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) err = isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) case USB_REQ_GET_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) type != (USB_DIR_IN|USB_RECIP_INTERFACE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) if (le16_to_cpu(req.wLength) != 2 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) le16_to_cpu(req.wValue) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) err = isr_get_status_response(ci, &req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) case USB_REQ_SET_ADDRESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (le16_to_cpu(req.wLength) != 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) le16_to_cpu(req.wIndex) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) ci->address = (u8)le16_to_cpu(req.wValue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) ci->setaddr = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) err = isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) case USB_REQ_SET_FEATURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) le16_to_cpu(req.wValue) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) USB_ENDPOINT_HALT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) if (req.wLength != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) num = le16_to_cpu(req.wIndex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) num &= USB_ENDPOINT_NUMBER_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) if (dir == TX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) num += ci->hw_ep_max / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) if (req.wLength != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) switch (le16_to_cpu(req.wValue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) case USB_DEVICE_REMOTE_WAKEUP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) ci->remote_wakeup = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) err = isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) case USB_DEVICE_TEST_MODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) tmode = le16_to_cpu(req.wIndex) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) switch (tmode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) case USB_TEST_J:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) case USB_TEST_K:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) case USB_TEST_SE0_NAK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) case USB_TEST_PACKET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) case USB_TEST_FORCE_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) ci->test_mode = tmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) err = isr_setup_status_phase(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) case USB_DEVICE_B_HNP_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) if (ci_otg_is_fsm_mode(ci)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) ci->gadget.b_hnp_enable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) err = isr_setup_status_phase(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) case USB_DEVICE_A_ALT_HNP_SUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (ci_otg_is_fsm_mode(ci))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) err = otg_a_alt_hnp_support(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) case USB_DEVICE_A_HNP_SUPPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) if (ci_otg_is_fsm_mode(ci)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) ci->gadget.a_hnp_support = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) err = isr_setup_status_phase(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) goto delegate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) delegate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) if (req.wLength == 0) /* no data phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) ci->ep0_dir = TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) err = ci->driver->setup(&ci->gadget, &req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) if (_ep_set_halt(&hwep->ep, 1, false))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) dev_err(ci->dev, "error: _ep_set_halt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) * isr_tr_complete_handler: transaction complete interrupt handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) * @ci: UDC descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) * This function handles traffic events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) static void isr_tr_complete_handler(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) __releases(ci->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) __acquires(ci->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) for (i = 0; i < ci->hw_ep_max; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) if (hwep->ep.desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) continue; /* not configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) if (hw_test_and_clear_complete(ci, i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) err = isr_tr_complete_low(hwep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) if (err > 0) /* needs status phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) err = isr_setup_status_phase(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) if (_ep_set_halt(&hwep->ep, 1, false))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) dev_err(ci->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) "error: _ep_set_halt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) /* Only handle setup packet below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) if (i == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) isr_setup_packet_handler(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * ENDPT block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) * ep_enable: configure endpoint, making it usable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) * Check usb_ep_enable() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) static int ep_enable(struct usb_ep *ep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) const struct usb_endpoint_descriptor *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) u32 cap = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) if (ep == NULL || desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) /* only internal SW should enable ctrl endpts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) if (!list_empty(&hwep->qh.queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) hwep->ep.desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) hwep->num = usb_endpoint_num(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) hwep->type = usb_endpoint_type(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) hwep->ep.maxpacket = usb_endpoint_maxp(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) hwep->ep.mult = usb_endpoint_maxp_mult(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) cap |= QH_IOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) cap |= QH_ZLT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) * For ISO-TX, we set mult at QH as the largest value, and use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) * MultO at TD as real mult value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) cap |= 3 << __ffs(QH_MULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) hwep->qh.ptr->cap = cpu_to_le32(cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) retval = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) * Enable endpoints in the HW other than ep0 as ep0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) * is always enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) if (hwep->num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) hwep->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) * ep_disable: endpoint is no longer usable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) * Check usb_ep_disable() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) static int ep_disable(struct usb_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) int direction, retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) if (ep == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) else if (hwep->ep.desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) /* only internal SW should disable ctrl endpts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) direction = hwep->dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) retval |= _ep_nuke(hwep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) hwep->dir = (hwep->dir == TX) ? RX : TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) } while (hwep->dir != direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) hwep->ep.desc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) * ep_alloc_request: allocate a request object to use with this endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) * Check usb_ep_alloc_request() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) struct ci_hw_req *hwreq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) if (ep == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) if (hwreq != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) INIT_LIST_HEAD(&hwreq->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) INIT_LIST_HEAD(&hwreq->tds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) return (hwreq == NULL) ? NULL : &hwreq->req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) * ep_free_request: frees a request object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) * Check usb_ep_free_request() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) struct td_node *node, *tmpnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (ep == NULL || req == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) } else if (!list_empty(&hwreq->queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) dev_err(hwep->ci->dev, "freeing queued request\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) dma_pool_free(hwep->td_pool, node->ptr, node->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) list_del_init(&node->td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) node->ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) kfree(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) kfree(hwreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) * ep_queue: queues (submits) an I/O request to an endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) * Check usb_ep_queue()* at usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) static int ep_queue(struct usb_ep *ep, struct usb_request *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) gfp_t __maybe_unused gfp_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) retval = _ep_queue(ep, req, gfp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) * Check usb_ep_dequeue() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) struct td_node *node, *tmpnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) list_empty(&hwep->qh.queue))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) dma_pool_free(hwep->td_pool, node->ptr, node->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) list_del(&node->td);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) kfree(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) /* pop request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) list_del_init(&hwreq->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) req->status = -ECONNRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) if (hwreq->req.complete != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) spin_unlock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) spin_lock(hwep->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) * ep_set_halt: sets the endpoint halt feature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) * Check usb_ep_set_halt() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) static int ep_set_halt(struct usb_ep *ep, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) return _ep_set_halt(ep, value, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) * ep_set_wedge: sets the halt feature and ignores clear requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) * Check usb_ep_set_wedge() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) static int ep_set_wedge(struct usb_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) if (ep == NULL || hwep->ep.desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) hwep->wedge = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) return usb_ep_set_halt(ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) * ep_fifo_flush: flushes contents of a fifo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) static void ep_fifo_flush(struct usb_ep *ep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) if (ep == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) * Endpoint-specific part of the API to the USB controller hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) * Check "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) static const struct usb_ep_ops usb_ep_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) .enable = ep_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) .disable = ep_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) .alloc_request = ep_alloc_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) .free_request = ep_free_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) .queue = ep_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) .dequeue = ep_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) .set_halt = ep_set_halt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) .set_wedge = ep_set_wedge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) .fifo_flush = ep_fifo_flush,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) * GADGET block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) if (is_active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) pm_runtime_get_sync(ci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) hw_device_reset(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) spin_lock_irq(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) if (ci->driver) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) hw_device_state(ci, ci->ep0out->qh.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) usb_gadget_set_state(_gadget, USB_STATE_POWERED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) spin_unlock_irq(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) usb_udc_vbus_handler(_gadget, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) spin_unlock_irq(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) usb_udc_vbus_handler(_gadget, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) if (ci->driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) ci->driver->disconnect(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) hw_device_state(ci, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) if (ci->platdata->notify_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) ci->platdata->notify_event(ci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) CI_HDRC_CONTROLLER_STOPPED_EVENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) _gadget_stop_activity(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) pm_runtime_put_sync(ci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) spin_lock_irqsave(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) ci->vbus_active = is_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) if (ci->usb_phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) usb_phy_set_charger_state(ci->usb_phy, is_active ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) if (ci->platdata->notify_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) ret = ci->platdata->notify_event(ci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) CI_HDRC_CONTROLLER_VBUS_EVENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) if (ci->driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) ci_hdrc_gadget_connect(_gadget, is_active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) static int ci_udc_wakeup(struct usb_gadget *_gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) spin_lock_irqsave(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) if (!ci->remote_wakeup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) if (ci->usb_phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) return usb_phy_set_power(ci->usb_phy, ma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) struct ci_hw_ep *hwep = ci->ep0in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) spin_lock_irqsave(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) _gadget->is_selfpowered = (is_on != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) spin_unlock_irqrestore(hwep->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) /* Change Data+ pullup status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) * this func is used by usb_gadget_connect/disconnect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) * Data+ pullup controlled by OTG state machine in OTG fsm mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) * and don't touch Data+ in host mode for dual role config.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) pm_runtime_get_sync(ci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) if (is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) pm_runtime_put_sync(ci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) static int ci_udc_start(struct usb_gadget *gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) struct usb_gadget_driver *driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) static int ci_udc_stop(struct usb_gadget *gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) /* Match ISOC IN from the highest endpoint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) struct usb_endpoint_descriptor *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) struct usb_ss_ep_comp_descriptor *comp_desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) struct usb_ep *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) if (ep->caps.dir_in && !ep->claimed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) return ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) * Device operations part of the API to the USB controller hardware,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) * which don't involve endpoints (or i/o)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) * Check "usb_gadget.h" for details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) static const struct usb_gadget_ops usb_gadget_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) .vbus_session = ci_udc_vbus_session,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) .wakeup = ci_udc_wakeup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) .set_selfpowered = ci_udc_selfpowered,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) .pullup = ci_udc_pullup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) .vbus_draw = ci_udc_vbus_draw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) .udc_start = ci_udc_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) .udc_stop = ci_udc_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) .match_ep = ci_udc_match_ep,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) static int init_eps(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) int retval = 0, i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) for (i = 0; i < ci->hw_ep_max/2; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) for (j = RX; j <= TX; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) int k = i + j * ci->hw_ep_max/2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) (j == TX) ? "in" : "out");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) hwep->ci = ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) hwep->lock = &ci->lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) hwep->td_pool = ci->td_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) hwep->ep.name = hwep->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) hwep->ep.ops = &usb_ep_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) if (i == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) hwep->ep.caps.type_control = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) hwep->ep.caps.type_iso = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) hwep->ep.caps.type_bulk = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) hwep->ep.caps.type_int = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) if (j == TX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) hwep->ep.caps.dir_in = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) hwep->ep.caps.dir_out = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) * for ep0: maxP defined in desc, for other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) * eps, maxP is set by epautoconfig() called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) * by gadget layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) INIT_LIST_HEAD(&hwep->qh.queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) &hwep->qh.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) if (hwep->qh.ptr == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) * set up shorthands for ep0 out and in endpoints,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) * don't add to gadget's ep_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) if (i == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) if (j == RX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) ci->ep0out = hwep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) ci->ep0in = hwep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) static void destroy_eps(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) for (i = 0; i < ci->hw_ep_max; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) if (hwep->pending_td)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) free_pending_td(hwep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) * ci_udc_start: register a gadget driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) * @gadget: our gadget
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) * @driver: the driver being registered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) * Interrupts are enabled here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) static int ci_udc_start(struct usb_gadget *gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) struct usb_gadget_driver *driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) if (driver->disconnect == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) retval = usb_ep_enable(&ci->ep0out->ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) retval = usb_ep_enable(&ci->ep0in->ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) ci->driver = driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) /* Start otg fsm for B-device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) ci_hdrc_otg_fsm_start(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) if (ci->vbus_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) ci_hdrc_gadget_connect(gadget, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) usb_udc_vbus_handler(&ci->gadget, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) if (!ci_otg_is_fsm_mode(ci))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) mutex_lock(&ci->fsm.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) ci->fsm.a_bidl_adis_tmout = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) ci_hdrc_otg_fsm_start(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) ci->fsm.protocol = PROTO_UNDEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) ci->fsm.otg->state = OTG_STATE_UNDEFINED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) mutex_unlock(&ci->fsm.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) * ci_udc_stop: unregister a gadget driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) static int ci_udc_stop(struct usb_gadget *gadget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) spin_lock_irqsave(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) ci->driver = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) if (ci->vbus_active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) hw_device_state(ci, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) if (ci->platdata->notify_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) ci->platdata->notify_event(ci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) CI_HDRC_CONTROLLER_STOPPED_EVENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) _gadget_stop_activity(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) spin_lock_irqsave(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) pm_runtime_put(ci->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) spin_unlock_irqrestore(&ci->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) ci_udc_stop_for_otg_fsm(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) * BUS block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) * udc_irq: ci interrupt handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) * This function returns IRQ_HANDLED if the IRQ has been handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) * It locks access to registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) static irqreturn_t udc_irq(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) irqreturn_t retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) u32 intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) if (ci == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) USBMODE_CM_DC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) intr = hw_test_and_clear_intr_active(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) if (intr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) /* order defines priority - do NOT change it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) if (USBi_URI & intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) isr_reset_handler(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) if (USBi_PCI & intr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) ci->gadget.speed = hw_port_is_high_speed(ci) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) USB_SPEED_HIGH : USB_SPEED_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) if (ci->suspended) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) if (ci->driver->resume) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) ci->driver->resume(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) ci->suspended = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) usb_gadget_set_state(&ci->gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) ci->resume_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) if (USBi_UI & intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) isr_tr_complete_handler(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) if ((USBi_SLI & intr) && !(ci->suspended)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) ci->suspended = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) ci->resume_state = ci->gadget.state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) ci->driver->suspend) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) ci->driver->suspend(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) spin_lock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) usb_gadget_set_state(&ci->gadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) USB_STATE_SUSPENDED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) retval = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) retval = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) spin_unlock(&ci->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) * udc_start: initialize gadget role
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) * @ci: chipidea controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) static int udc_start(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) struct device *dev = ci->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) ci->gadget.ops = &usb_gadget_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) ci->gadget.speed = USB_SPEED_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) ci->gadget.max_speed = USB_SPEED_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) ci->gadget.name = ci->platdata->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) ci->gadget.otg_caps = otg_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) ci->gadget.sg_supported = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) ci->gadget.irq = ci->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) ci->gadget.quirk_avoids_skb_reserve = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) otg_caps->adp_support))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) ci->gadget.is_otg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) INIT_LIST_HEAD(&ci->gadget.ep_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) /* alloc resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) sizeof(struct ci_hw_qh),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) 64, CI_HDRC_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) if (ci->qh_pool == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) sizeof(struct ci_hw_td),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) 64, CI_HDRC_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) if (ci->td_pool == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) goto free_qh_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) retval = init_eps(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) goto free_pools;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) ci->gadget.ep0 = &ci->ep0in->ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) retval = usb_add_gadget_udc(dev, &ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) goto destroy_eps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) destroy_eps:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) destroy_eps(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) free_pools:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) dma_pool_destroy(ci->td_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) free_qh_pool:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) dma_pool_destroy(ci->qh_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) * No interrupts active, the IRQ has been released
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) if (!ci->roles[CI_ROLE_GADGET])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) usb_del_gadget_udc(&ci->gadget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) destroy_eps(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) dma_pool_destroy(ci->td_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) dma_pool_destroy(ci->qh_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) static int udc_id_switch_for_device(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) if (ci->platdata->pins_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) pinctrl_select_state(ci->platdata->pctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) ci->platdata->pins_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) if (ci->is_otg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) /* Clear and enable BSV irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) OTGSC_BSVIS | OTGSC_BSVIE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) static void udc_id_switch_for_host(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) * host doesn't care B_SESSION_VALID event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) * so clear and disbale BSV irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) if (ci->is_otg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) ci->vbus_active = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (ci->platdata->pins_device && ci->platdata->pins_default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) pinctrl_select_state(ci->platdata->pctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) ci->platdata->pins_default);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) * ci_hdrc_gadget_init - initialize device related bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) * @ci: the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) * This function initializes the gadget, if the device is "device capable".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) int ci_hdrc_gadget_init(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) struct ci_role_driver *rdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) if (!rdrv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) rdrv->start = udc_id_switch_for_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) rdrv->stop = udc_id_switch_for_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) rdrv->irq = udc_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) rdrv->name = "gadget";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) ret = udc_start(ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) ci->roles[CI_ROLE_GADGET] = rdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags