^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Jun Li
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __DRIVERS_USB_CHIPIDEA_OTG_FSM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __DRIVERS_USB_CHIPIDEA_OTG_FSM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/usb/otg-fsm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * A-DEVICE timing constants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* Wait for VBUS Rise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TA_WAIT_VRISE (100) /* a_wait_vrise: section 7.1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * a_wait_vrise_tmr: section 7.4.5.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * TA_VBUS_RISE <= 100ms, section 4.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Table 4-1: Electrical Characteristics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * ->DC Electrical Timing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Wait for VBUS Fall */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TA_WAIT_VFALL (1000) /* a_wait_vfall: section 7.1.7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * a_wait_vfall_tmr: section: 7.4.5.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Wait for B-Connect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define TA_WAIT_BCON (10000) /* a_wait_bcon: section 7.1.3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * TA_WAIT_BCON: should be between 1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * and 30000 ms, section 5.5, Table 5-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* A-Idle to B-Disconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TA_AIDL_BDIS (5000) /* a_suspend min 200 ms, section 5.2.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * TA_AIDL_BDIS: section 5.5, Table 5-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* B-Idle to A-Disconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define TA_BIDL_ADIS (500) /* TA_BIDL_ADIS: section 5.2.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * 500ms is used for B switch to host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * for safe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * B-device timing constants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Data-Line Pulse Time*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define TB_DATA_PLS (10) /* b_srp_init,continue 5~10ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * section:5.1.3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* SRP Fail Time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define TB_SRP_FAIL (6000) /* b_srp_init,fail time 5~6s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * section:5.1.6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* A-SE0 to B-Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define TB_ASE0_BRST (155) /* minimum 155 ms, section:5.3.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* SE0 Time Before SRP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define TB_SE0_SRP (1000) /* b_idle,minimum 1s, section:5.1.2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* SSEND time before SRP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define TB_AIDL_BDIS (20) /* 4ms ~ 150ms, section 5.2.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #if IS_ENABLED(CONFIG_USB_OTG_FSM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int ci_otg_fsm_work(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static inline int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static inline int ci_otg_fsm_work(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static inline irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static inline void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static inline void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif /* __DRIVERS_USB_CHIPIDEA_OTG_FSM_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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