^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Cadence USB3 DRD header file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018-2019 Cadence.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Pawel Laszczak <pawell@cadence.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __LINUX_CDNS3_DRD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __LINUX_CDNS3_DRD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/usb/otg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* DRD register interface for version v1. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct cdns3_otg_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) __le32 did;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) __le32 rid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) __le32 capabilities;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) __le32 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) __le32 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) __le32 sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) __le32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) __le32 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) __le32 ien;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) __le32 ivect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) __le32 refclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) __le32 tmr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) __le32 reserved3[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) __le32 simulate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) __le32 override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) __le32 susp_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) __le32 phyrst_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) __le32 anasts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) __le32 adp_ramp_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) __le32 ctrl1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) __le32 ctrl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* DRD register interface for version v0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct cdns3_otg_legacy_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) __le32 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) __le32 sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) __le32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __le32 refclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) __le32 ien;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) __le32 ivect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) __le32 reserved1[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) __le32 tmr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) __le32 reserved2[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __le32 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) __le32 capabilities;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) __le32 reserved3[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) __le32 simulate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) __le32 reserved4[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) __le32 ctrl1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * Common registers interface for both version of DRD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct cdns3_otg_common_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __le32 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) __le32 sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) __le32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) __le32 different1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) __le32 ien;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) __le32 ivect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* CDNS_RID - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define CDNS_RID(p) ((p) & GENMASK(15, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* CDNS_VID - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define CDNS_DID(p) ((p) & GENMASK(31, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* OTGCMD - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* "Request the bus for Device mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define OTGCMD_DEV_BUS_REQ BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Request the bus for Host mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define OTGCMD_HOST_BUS_REQ BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Enable OTG mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define OTGCMD_OTG_EN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* Disable OTG mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define OTGCMD_OTG_DIS BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*"Configure OTG as A-Device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define OTGCMD_A_DEV_EN BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*"Configure OTG as A-Device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define OTGCMD_A_DEV_DIS BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* Drop the bus for Device mod e. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define OTGCMD_DEV_BUS_DROP BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Drop the bus for Host mode*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define OTGCMD_HOST_BUS_DROP BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Power Down USBSS-DEV. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define OTGCMD_DEV_POWER_OFF BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* Power Down CDNSXHCI. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define OTGCMD_HOST_POWER_OFF BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* OTGIEN - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* ID change interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define OTGIEN_ID_CHANGE_INT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Vbusvalid fall detected interrupt enable.*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define OTGIEN_VBUSVALID_RISE_INT BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Vbusvalid fall detected interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define OTGIEN_VBUSVALID_FALL_INT BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* OTGSTS - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * Current value of the ID pin. It is only valid when idpullup in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * OTGCTRL1_TYPE register is set to '1'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define OTGSTS_ID_VALUE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Current value of the vbus_valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define OTGSTS_VBUS_VALID BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Current value of the b_sess_vld */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define OTGSTS_SESSION_VALID BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*Device mode is active*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define OTGSTS_DEV_ACTIVE BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Host mode is active. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define OTGSTS_HOST_ACTIVE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* OTG Controller not ready. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define OTGSTS_OTG_NRDY_MASK BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define OTGSTS_OTG_NRDY(p) ((p) & OTGSTS_OTG_NRDY_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * Value of the strap pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * 000 - no default configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * 010 - Controller initiall configured as Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * 100 - Controller initially configured as Device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define OTGSTS_STRAP(p) (((p) & GENMASK(14, 12)) >> 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define OTGSTS_STRAP_NO_DEFAULT_CFG 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define OTGSTS_STRAP_HOST_OTG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define OTGSTS_STRAP_HOST 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define OTGSTS_STRAP_GADGET 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Host mode is turned on. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define OTGSTS_XHCI_READY BIT(26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* "Device mode is turned on .*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define OTGSTS_DEV_READY BIT(27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* OTGSTATE- bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define OTGSTATE_DEV_STATE_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define OTGSTATE_HOST_STATE_MASK GENMASK(5, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define OTGSTATE_HOST_STATE_IDLE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define OTGSTATE_HOST_STATE_VBUS_FALL 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define OTGSTATE_HOST_STATE(p) (((p) & OTGSTATE_HOST_STATE_MASK) >> 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* OTGREFCLK - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define OTGREFCLK_STB_CLK_SWITCH_EN BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* OVERRIDE - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define OVERRIDE_IDPULLUP BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* Only for CDNS3_CONTROLLER_V0 version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define OVERRIDE_IDPULLUP_V0 BIT(24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* PHYRST_CFG - bitmasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define PHYRST_CFG_PHYRST_A_ENABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define CDNS3_ID_PERIPHERAL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define CDNS3_ID_HOST 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) bool cdns3_is_host(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) bool cdns3_is_device(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int cdns3_get_id(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int cdns3_get_vbus(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int cdns3_drd_init(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int cdns3_drd_exit(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int cdns3_drd_update_mode(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int cdns3_drd_gadget_on(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) void cdns3_drd_gadget_off(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) int cdns3_drd_host_on(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) void cdns3_drd_host_off(struct cdns3 *cdns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #endif /* __LINUX_CDNS3_DRD */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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