Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Programmable Real-Time Unit Sub System (PRUSS) UIO driver (uio_pruss)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This driver exports PRUSS host event out interrupts and PRUSS, L3 RAM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * and DDR RAM to user space for applications interacting with PRUSS firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2010-11 Texas Instruments Incorporated - http://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/uio_driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/platform_data/uio_pruss.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/genalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define DRV_NAME "pruss_uio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define DRV_VERSION "1.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static int sram_pool_sz = SZ_16K;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) module_param(sram_pool_sz, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) MODULE_PARM_DESC(sram_pool_sz, "sram pool size to allocate ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static int extram_pool_sz = SZ_256K;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) module_param(extram_pool_sz, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) MODULE_PARM_DESC(extram_pool_sz, "external ram pool size to allocate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * Host event IRQ numbers from PRUSS - PRUSS can generate up to 8 interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * events to AINTC of ARM host processor - which can be used for IPC b/w PRUSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * firmware and user space application, async notification from PRU firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * to user space application
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * 3	PRU_EVTOUT0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * 4	PRU_EVTOUT1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * 5	PRU_EVTOUT2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * 6	PRU_EVTOUT3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * 7	PRU_EVTOUT4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * 8	PRU_EVTOUT5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * 9	PRU_EVTOUT6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * 10	PRU_EVTOUT7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define MAX_PRUSS_EVT	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define PINTC_HIDISR	0x0038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define PINTC_HIPIR	0x0900
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define HIPIR_NOPEND	0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define PINTC_HIER	0x1500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) struct uio_pruss_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct uio_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct clk *pruss_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	dma_addr_t sram_paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	dma_addr_t ddr_paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	void __iomem *prussio_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	unsigned long sram_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	void *ddr_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	unsigned int hostirq_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	unsigned int pintc_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct gen_pool *sram_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static irqreturn_t pruss_handler(int irq, struct uio_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct uio_pruss_dev *gdev = info->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	int intr_bit = (irq - gdev->hostirq_start + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int val, intr_mask = (1 << intr_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	void __iomem *base = gdev->prussio_vaddr + gdev->pintc_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	void __iomem *intren_reg = base + PINTC_HIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	void __iomem *intrdis_reg = base + PINTC_HIDISR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	void __iomem *intrstat_reg = base + PINTC_HIPIR + (intr_bit << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	val = ioread32(intren_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* Is interrupt enabled and active ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (!(val & intr_mask) && (ioread32(intrstat_reg) & HIPIR_NOPEND))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	/* Disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	iowrite32(intr_bit, intrdis_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static void pruss_cleanup(struct device *dev, struct uio_pruss_dev *gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	int cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct uio_info *p = gdev->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	for (cnt = 0; cnt < MAX_PRUSS_EVT; cnt++, p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		uio_unregister_device(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		kfree(p->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	iounmap(gdev->prussio_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (gdev->ddr_vaddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			gdev->ddr_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (gdev->sram_vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		gen_pool_free(gdev->sram_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			      gdev->sram_vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			      sram_pool_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	kfree(gdev->info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	clk_disable(gdev->pruss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	clk_put(gdev->pruss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	kfree(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int pruss_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct uio_info *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct uio_pruss_dev *gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct resource *regs_prussio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	int ret, cnt, i, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct uio_pruss_pdata *pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	gdev = kzalloc(sizeof(struct uio_pruss_dev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (!gdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	gdev->info = kcalloc(MAX_PRUSS_EVT, sizeof(*p), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (!gdev->info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		goto err_free_gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	/* Power on PRU in case its not done as part of boot-loader */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	gdev->pruss_clk = clk_get(dev, "pruss");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (IS_ERR(gdev->pruss_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		dev_err(dev, "Failed to get clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		ret = PTR_ERR(gdev->pruss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		goto err_free_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	ret = clk_enable(gdev->pruss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		dev_err(dev, "Failed to enable clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		goto err_clk_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (!regs_prussio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		dev_err(dev, "No PRUSS I/O resource specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		goto err_clk_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (!regs_prussio->start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		dev_err(dev, "Invalid memory resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		goto err_clk_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (pdata->sram_pool) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		gdev->sram_pool = pdata->sram_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		gdev->sram_vaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			(unsigned long)gen_pool_dma_alloc(gdev->sram_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 					sram_pool_sz, &gdev->sram_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		if (!gdev->sram_vaddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			dev_err(dev, "Could not allocate SRAM pool\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			goto err_clk_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	gdev->ddr_vaddr = dma_alloc_coherent(dev, extram_pool_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				&(gdev->ddr_paddr), GFP_KERNEL | GFP_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (!gdev->ddr_vaddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		dev_err(dev, "Could not allocate external memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		goto err_free_sram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	len = resource_size(regs_prussio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	gdev->prussio_vaddr = ioremap(regs_prussio->start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (!gdev->prussio_vaddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		dev_err(dev, "Can't remap PRUSS I/O  address range\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		goto err_free_ddr_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	gdev->pintc_base = pdata->pintc_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	gdev->hostirq_start = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		p->mem[0].addr = regs_prussio->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		p->mem[0].size = resource_size(regs_prussio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		p->mem[0].memtype = UIO_MEM_PHYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		p->mem[1].addr = gdev->sram_paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		p->mem[1].size = sram_pool_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		p->mem[1].memtype = UIO_MEM_PHYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		p->mem[2].addr = gdev->ddr_paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		p->mem[2].size = extram_pool_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		p->mem[2].memtype = UIO_MEM_PHYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		p->name = kasprintf(GFP_KERNEL, "pruss_evt%d", cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		p->version = DRV_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		/* Register PRUSS IRQ lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		p->irq = gdev->hostirq_start + cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		p->handler = pruss_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		p->priv = gdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		ret = uio_register_device(dev, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			kfree(p->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 			goto err_unloop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	platform_set_drvdata(pdev, gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) err_unloop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	for (i = 0, p = gdev->info; i < cnt; i++, p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		uio_unregister_device(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		kfree(p->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	iounmap(gdev->prussio_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) err_free_ddr_vaddr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			  gdev->ddr_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) err_free_sram:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	if (pdata->sram_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		gen_pool_free(gdev->sram_pool, gdev->sram_vaddr, sram_pool_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) err_clk_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	clk_disable(gdev->pruss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) err_clk_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	clk_put(gdev->pruss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) err_free_info:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	kfree(gdev->info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) err_free_gdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	kfree(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int pruss_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	struct uio_pruss_dev *gdev = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	pruss_cleanup(&dev->dev, gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static struct platform_driver pruss_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	.probe = pruss_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	.remove = pruss_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		   .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) module_platform_driver(pruss_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MODULE_VERSION(DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MODULE_AUTHOR("Pratheesh Gangadhar <pratheesh@ti.com>");