^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * UIO Hilscher CIF card driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2007 Hans J. Koch <hjk@hansjkoch.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Original code (C) 2005 Benedikt Spranger <b.spranger@linutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/uio_driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PLX9030_INTCSR 0x4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define INTSCR_INT1_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define INTSCR_INT1_STATUS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define INT1_ENABLED_AND_ACTIVE (INTSCR_INT1_ENABLE | INTSCR_INT1_STATUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PCI_SUBVENDOR_ID_PEP 0x1518
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CIF_SUBDEVICE_PROFIBUS 0x430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CIF_SUBDEVICE_DEVICENET 0x432
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static irqreturn_t hilscher_handler(int irq, struct uio_info *dev_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void __iomem *plx_intscr = dev_info->mem[0].internal_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) + PLX9030_INTCSR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if ((ioread8(plx_intscr) & INT1_ENABLED_AND_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) != INT1_ENABLED_AND_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) iowrite8(ioread8(plx_intscr) & ~INTSCR_INT1_ENABLE, plx_intscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int hilscher_pci_probe(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct uio_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (pci_enable_device(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (pci_request_regions(dev, "hilscher"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) goto out_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) info->mem[0].addr = pci_resource_start(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!info->mem[0].addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) goto out_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) info->mem[0].internal_addr = pci_ioremap_bar(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (!info->mem[0].internal_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) goto out_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) info->mem[0].size = pci_resource_len(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) info->mem[0].memtype = UIO_MEM_PHYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) info->mem[1].addr = pci_resource_start(dev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) info->mem[1].size = pci_resource_len(dev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) info->mem[1].memtype = UIO_MEM_PHYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) switch (id->subdevice) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case CIF_SUBDEVICE_PROFIBUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) info->name = "CIF_Profibus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case CIF_SUBDEVICE_DEVICENET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) info->name = "CIF_Devicenet";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) info->name = "CIF_???";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) info->version = "0.0.1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) info->irq = dev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) info->irq_flags = IRQF_SHARED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) info->handler = hilscher_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (uio_register_device(&dev->dev, info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) goto out_unmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pci_set_drvdata(dev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) out_unmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) iounmap(info->mem[0].internal_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) out_release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) out_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) out_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) kfree (info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static void hilscher_pci_remove(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct uio_info *info = pci_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) uio_unregister_device(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) iounmap(info->mem[0].internal_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) kfree (info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static struct pci_device_id hilscher_pci_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .vendor = PCI_VENDOR_ID_PLX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .device = PCI_DEVICE_ID_PLX_9030,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .subvendor = PCI_SUBVENDOR_ID_PEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .subdevice = CIF_SUBDEVICE_PROFIBUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .vendor = PCI_VENDOR_ID_PLX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .device = PCI_DEVICE_ID_PLX_9030,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .subvendor = PCI_SUBVENDOR_ID_PEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .subdevice = CIF_SUBDEVICE_DEVICENET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct pci_driver hilscher_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .name = "hilscher",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .id_table = hilscher_pci_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .probe = hilscher_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .remove = hilscher_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) module_pci_driver(hilscher_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MODULE_DEVICE_TABLE(pci, hilscher_pci_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MODULE_AUTHOR("Hans J. Koch, Benedikt Spranger");