^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * timbuart.c timberdale FPGA GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2009 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /* Supports:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Timberdale FPGA UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _TIMBUART_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _TIMBUART_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TIMBUART_FIFO_SIZE 2048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TIMBUART_RXFIFO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TIMBUART_TXFIFO 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TIMBUART_IER 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define TIMBUART_IPR 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TIMBUART_ISR 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TIMBUART_CTRL 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define TIMBUART_BAUDRATE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TIMBUART_CTRL_RTS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TIMBUART_CTRL_CTS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define TIMBUART_CTRL_FLSHTX 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TIMBUART_CTRL_FLSHRX 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define TXBF 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TXBAE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CTS_DELTA 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RXDP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RXBAF 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RXBF 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RXTT 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define RXBNAE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define TXBE 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define RXFLAGS (RXDP | RXBAF | RXBF | RXTT | RXBNAE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define TXFLAGS (TXBF | TXBAE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define TIMBUART_MAJOR 204
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TIMBUART_MINOR 192
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #endif /* _TIMBUART_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)