^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * rocket.h --- the exported interface of the rocket driver to its configuration program.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Written by Theodore Ts'o, Copyright 1997.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 1997 Comtrol Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* Model Information Struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) typedef struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) unsigned long model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) char modelString[80];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned long numPorts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int loadrm2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int startingPortNumber;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) } rocketModel_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct rocket_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int closing_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int close_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int reserved[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct rocket_ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int tty_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int callout_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) rocketModel_t rocketModel[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct rocket_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) char rocket_version[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) char rocket_date[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) char reserved[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Rocketport flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*#define ROCKET_CALLOUT_NOHUP 0x00000001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ROCKET_FORCE_CD 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define ROCKET_HUP_NOTIFY 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ROCKET_SPLIT_TERMIOS 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ROCKET_SPD_MASK 0x00000070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ROCKET_SPD_HI 0x00000010 /* Use 57600 instead of 38400 bps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ROCKET_SPD_VHI 0x00000020 /* Use 115200 instead of 38400 bps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ROCKET_SPD_SHI 0x00000030 /* Use 230400 instead of 38400 bps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ROCKET_SPD_WARP 0x00000040 /* Use 460800 instead of 38400 bps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define ROCKET_SAK 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ROCKET_SESSION_LOCKOUT 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ROCKET_PGRP_LOCKOUT 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define ROCKET_RTS_TOGGLE 0x00000400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define ROCKET_MODE_MASK 0x00003000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define ROCKET_MODE_RS232 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define ROCKET_MODE_RS485 0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define ROCKET_MODE_RS422 0x00002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ROCKET_FLAGS 0x00003FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ROCKET_USR_MASK 0x0071 /* Legal flags that non-privileged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * users can set or reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * For closing_wait and closing_wait2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define ROCKET_CLOSING_WAIT_NONE ASYNC_CLOSING_WAIT_NONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define ROCKET_CLOSING_WAIT_INF ASYNC_CLOSING_WAIT_INF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * Rocketport ioctls -- "RP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define RCKP_GET_CONFIG 0x00525002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define RCKP_SET_CONFIG 0x00525003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define RCKP_GET_PORTS 0x00525004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define RCKP_RESET_RM2 0x00525005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define RCKP_GET_VERSION 0x00525006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Rocketport Models */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define MODEL_RP32INTF 0x0001 /* RP 32 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define MODEL_RP8INTF 0x0002 /* RP 8 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define MODEL_RP16INTF 0x0003 /* RP 16 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define MODEL_RP8OCTA 0x0005 /* RP 8 port w/octa cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define MODEL_RP4QUAD 0x0004 /* RP 4 port w/quad cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MODEL_RP8J 0x0006 /* RP 8 port w/RJ11 connectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MODEL_RP4J 0x0007 /* RP 4 port w/RJ45 connectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MODEL_RP8SNI 0x0008 /* RP 8 port w/ DB78 SNI connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MODEL_RP16SNI 0x0009 /* RP 16 port w/ DB78 SNI connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MODEL_RPP4 0x000A /* RP Plus 4 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MODEL_RPP8 0x000B /* RP Plus 8 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define MODEL_RP2_232 0x000E /* RP Plus 2 port RS232 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define MODEL_RP2_422 0x000F /* RP Plus 2 port RS232 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Rocketmodem II Models */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define MODEL_RP6M 0x000C /* RM 6 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define MODEL_RP4M 0x000D /* RM 4 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Universal PCI boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define MODEL_UPCI_RP32INTF 0x0801 /* RP UPCI 32 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define MODEL_UPCI_RP8INTF 0x0802 /* RP UPCI 8 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define MODEL_UPCI_RP16INTF 0x0803 /* RP UPCI 16 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define MODEL_UPCI_RP8OCTA 0x0805 /* RP UPCI 8 port w/octa cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define MODEL_UPCI_RM3_8PORT 0x080C /* RP UPCI Rocketmodem III 8 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define MODEL_UPCI_RM3_4PORT 0x080C /* RP UPCI Rocketmodem III 4 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Compact PCI 16 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define MODEL_CPCI_RP16INTF 0x0903 /* RP Compact PCI 16 port w/external I/F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* All ISA boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define MODEL_ISA 0x1000
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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