^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * KUnit tests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2020, Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <kunit/test.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/idr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "tb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "tunnel.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static int __ida_init(struct kunit_resource *res, void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct ida *ida = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ida_init(ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) res->data = ida;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void __ida_destroy(struct kunit_resource *res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct ida *ida = res->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ida_destroy(ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static void kunit_ida_init(struct kunit *test, struct ida *ida)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) kunit_alloc_resource(test, __ida_init, __ida_destroy, GFP_KERNEL, ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static struct tb_switch *alloc_switch(struct kunit *test, u64 route,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 upstream_port, u8 max_port_number)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct tb_switch *sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) sw = kunit_kzalloc(test, sizeof(*sw), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (!sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) sw->config.upstream_port_number = upstream_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) sw->config.depth = tb_route_length(route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) sw->config.route_hi = upper_32_bits(route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) sw->config.route_lo = lower_32_bits(route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) sw->config.enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) sw->config.max_port_number = max_port_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) size = (sw->config.max_port_number + 1) * sizeof(*sw->ports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sw->ports = kunit_kzalloc(test, size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (!sw->ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) for (i = 0; i <= sw->config.max_port_number; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sw->ports[i].sw = sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) sw->ports[i].port = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) sw->ports[i].config.port_number = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) kunit_ida_init(test, &sw->ports[i].in_hopids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) kunit_ida_init(test, &sw->ports[i].out_hopids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct tb_switch *alloc_host(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct tb_switch *sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) sw = alloc_switch(test, 0, 7, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) sw->config.vendor_id = 0x8086;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) sw->config.device_id = 0x9a1b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) sw->ports[0].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) sw->ports[0].config.max_in_hop_id = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) sw->ports[0].config.max_out_hop_id = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) sw->ports[1].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) sw->ports[1].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) sw->ports[1].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) sw->ports[1].dual_link_port = &sw->ports[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) sw->ports[2].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) sw->ports[2].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) sw->ports[2].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) sw->ports[2].dual_link_port = &sw->ports[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) sw->ports[2].link_nr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) sw->ports[3].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) sw->ports[3].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) sw->ports[3].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) sw->ports[3].dual_link_port = &sw->ports[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) sw->ports[4].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) sw->ports[4].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) sw->ports[4].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) sw->ports[4].dual_link_port = &sw->ports[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) sw->ports[4].link_nr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) sw->ports[5].config.type = TB_TYPE_DP_HDMI_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) sw->ports[5].config.max_in_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) sw->ports[5].config.max_out_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) sw->ports[5].cap_adap = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) sw->ports[6].config.type = TB_TYPE_DP_HDMI_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) sw->ports[6].config.max_in_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) sw->ports[6].config.max_out_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) sw->ports[6].cap_adap = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) sw->ports[7].config.type = TB_TYPE_NHI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) sw->ports[7].config.max_in_hop_id = 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) sw->ports[7].config.max_out_hop_id = 11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) sw->ports[8].config.type = TB_TYPE_PCIE_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) sw->ports[8].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) sw->ports[8].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) sw->ports[9].config.type = TB_TYPE_PCIE_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) sw->ports[9].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) sw->ports[9].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) sw->ports[10].disabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) sw->ports[11].disabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) sw->ports[12].config.type = TB_TYPE_USB3_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) sw->ports[12].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) sw->ports[12].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) sw->ports[13].config.type = TB_TYPE_USB3_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) sw->ports[13].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) sw->ports[13].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static struct tb_switch *alloc_dev_default(struct kunit *test,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct tb_switch *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u64 route, bool bonded)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct tb_port *port, *upstream_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct tb_switch *sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) sw = alloc_switch(test, route, 1, 19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (!sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) sw->config.vendor_id = 0x8086;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) sw->config.device_id = 0x15ef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) sw->ports[0].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) sw->ports[0].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) sw->ports[0].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) sw->ports[1].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) sw->ports[1].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) sw->ports[1].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) sw->ports[1].dual_link_port = &sw->ports[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) sw->ports[2].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) sw->ports[2].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) sw->ports[2].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) sw->ports[2].dual_link_port = &sw->ports[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) sw->ports[2].link_nr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) sw->ports[3].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) sw->ports[3].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) sw->ports[3].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) sw->ports[3].dual_link_port = &sw->ports[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) sw->ports[4].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) sw->ports[4].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) sw->ports[4].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) sw->ports[4].dual_link_port = &sw->ports[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) sw->ports[4].link_nr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) sw->ports[5].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) sw->ports[5].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) sw->ports[5].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) sw->ports[5].dual_link_port = &sw->ports[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) sw->ports[6].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) sw->ports[6].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) sw->ports[6].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) sw->ports[6].dual_link_port = &sw->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) sw->ports[6].link_nr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) sw->ports[7].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) sw->ports[7].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) sw->ports[7].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) sw->ports[7].dual_link_port = &sw->ports[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) sw->ports[8].config.type = TB_TYPE_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) sw->ports[8].config.max_in_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) sw->ports[8].config.max_out_hop_id = 19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) sw->ports[8].dual_link_port = &sw->ports[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) sw->ports[8].link_nr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) sw->ports[9].config.type = TB_TYPE_PCIE_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) sw->ports[9].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) sw->ports[9].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) sw->ports[10].config.type = TB_TYPE_PCIE_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) sw->ports[10].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) sw->ports[10].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) sw->ports[11].config.type = TB_TYPE_PCIE_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) sw->ports[11].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) sw->ports[11].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) sw->ports[12].config.type = TB_TYPE_PCIE_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) sw->ports[12].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) sw->ports[12].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) sw->ports[13].config.type = TB_TYPE_DP_HDMI_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) sw->ports[13].config.max_in_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) sw->ports[13].config.max_out_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) sw->ports[13].cap_adap = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) sw->ports[14].config.type = TB_TYPE_DP_HDMI_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) sw->ports[14].config.max_in_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) sw->ports[14].config.max_out_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) sw->ports[14].cap_adap = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) sw->ports[15].disabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) sw->ports[16].config.type = TB_TYPE_USB3_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) sw->ports[16].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) sw->ports[16].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) sw->ports[17].config.type = TB_TYPE_USB3_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) sw->ports[17].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) sw->ports[17].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) sw->ports[18].config.type = TB_TYPE_USB3_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) sw->ports[18].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) sw->ports[18].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) sw->ports[19].config.type = TB_TYPE_USB3_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) sw->ports[19].config.max_in_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) sw->ports[19].config.max_out_hop_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (!parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* Link them */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) upstream_port = tb_upstream_port(sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) port = tb_port_at(route, parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) port->remote = upstream_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) upstream_port->remote = port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (port->dual_link_port && upstream_port->dual_link_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) port->dual_link_port->remote = upstream_port->dual_link_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) upstream_port->dual_link_port->remote = port->dual_link_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (bonded) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* Bonding is used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) port->bonded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) port->dual_link_port->bonded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) upstream_port->bonded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) upstream_port->dual_link_port->bonded = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static struct tb_switch *alloc_dev_with_dpin(struct kunit *test,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct tb_switch *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u64 route, bool bonded)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct tb_switch *sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) sw = alloc_dev_default(test, parent, route, bonded);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (!sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) sw->ports[13].config.type = TB_TYPE_DP_HDMI_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) sw->ports[13].config.max_in_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) sw->ports[13].config.max_out_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) sw->ports[14].config.type = TB_TYPE_DP_HDMI_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) sw->ports[14].config.max_in_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) sw->ports[14].config.max_out_hop_id = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return sw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static void tb_test_path_basic(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct tb_switch *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) src_port = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) dst_port = src_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) p = tb_next_port_on_path(src_port, dst_port, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) KUNIT_EXPECT_PTR_EQ(test, p, dst_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) p = tb_next_port_on_path(src_port, dst_port, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) KUNIT_EXPECT_TRUE(test, !p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static void tb_test_path_not_connected_walk(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct tb_switch *host, *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* No connection between host and dev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) dev = alloc_dev_default(test, NULL, 3, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) src_port = &host->ports[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) dst_port = &dev->ports[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) p = tb_next_port_on_path(src_port, dst_port, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) KUNIT_EXPECT_PTR_EQ(test, p, src_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) p = tb_next_port_on_path(src_port, dst_port, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) KUNIT_EXPECT_PTR_EQ(test, p, &host->ports[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) p = tb_next_port_on_path(src_port, dst_port, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) KUNIT_EXPECT_TRUE(test, !p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* Other direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) p = tb_next_port_on_path(dst_port, src_port, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) KUNIT_EXPECT_PTR_EQ(test, p, dst_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) p = tb_next_port_on_path(dst_port, src_port, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) KUNIT_EXPECT_PTR_EQ(test, p, &dev->ports[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) p = tb_next_port_on_path(dst_port, src_port, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) KUNIT_EXPECT_TRUE(test, !p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct port_expectation {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) u64 route;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) u8 port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) enum tb_port_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static void tb_test_path_single_hop_walk(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * Walks from Host PCIe downstream port to Device #1 PCIe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * upstream port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * [Device]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const struct port_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) { .route = 0x0, .port = 8, .type = TB_TYPE_PCIE_DOWN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) { .route = 0x0, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) { .route = 0x1, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) { .route = 0x1, .port = 9, .type = TB_TYPE_PCIE_UP },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) struct tb_switch *host, *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) dev = alloc_dev_default(test, host, 1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) src_port = &host->ports[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dst_port = &dev->ports[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* Walk both directions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) tb_for_each_port_on_path(src_port, dst_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) KUNIT_EXPECT_EQ(test, i, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) i = ARRAY_SIZE(test_data) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) tb_for_each_port_on_path(dst_port, src_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) i--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) KUNIT_EXPECT_EQ(test, i, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static void tb_test_path_daisy_chain_walk(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * Walks from Host DP IN to Device #2 DP OUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * 3 /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * 1 /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static const struct port_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) { .route = 0x0, .port = 5, .type = TB_TYPE_DP_HDMI_IN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) { .route = 0x0, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) { .route = 0x1, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) { .route = 0x1, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) { .route = 0x301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) { .route = 0x301, .port = 13, .type = TB_TYPE_DP_HDMI_OUT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct tb_switch *host, *dev1, *dev2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) dev2 = alloc_dev_default(test, dev1, 0x301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) src_port = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) dst_port = &dev2->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* Walk both directions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) tb_for_each_port_on_path(src_port, dst_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) KUNIT_EXPECT_EQ(test, i, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) i = ARRAY_SIZE(test_data) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) tb_for_each_port_on_path(dst_port, src_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) i--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) KUNIT_EXPECT_EQ(test, i, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static void tb_test_path_simple_tree_walk(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * Walks from Host DP IN to Device #3 DP OUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * 3 / | 5 \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * 1 / | \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * [Device #2] | [Device #4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static const struct port_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) { .route = 0x0, .port = 5, .type = TB_TYPE_DP_HDMI_IN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) { .route = 0x0, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) { .route = 0x1, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) { .route = 0x1, .port = 5, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) { .route = 0x501, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) { .route = 0x501, .port = 13, .type = TB_TYPE_DP_HDMI_OUT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) struct tb_switch *host, *dev1, *dev3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) alloc_dev_default(test, dev1, 0x301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) dev3 = alloc_dev_default(test, dev1, 0x501, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) alloc_dev_default(test, dev1, 0x701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) src_port = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) dst_port = &dev3->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /* Walk both directions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) tb_for_each_port_on_path(src_port, dst_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) KUNIT_EXPECT_EQ(test, i, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) i = ARRAY_SIZE(test_data) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) tb_for_each_port_on_path(dst_port, src_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) i--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) KUNIT_EXPECT_EQ(test, i, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static void tb_test_path_complex_tree_walk(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * Walks from Device #3 DP IN to Device #9 DP OUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * 3 / | 5 \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * 1 / | \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * [Device #2] | [Device #5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * 5 | | 1 \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * 1 | [Device #4] \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * [Device #3] [Device #6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * 3 /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * 1 /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * [Device #7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * 3 / | 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * 1 / |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * [Device #8] | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * [Device #9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static const struct port_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) { .route = 0x50301, .port = 13, .type = TB_TYPE_DP_HDMI_IN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) { .route = 0x50301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) { .route = 0x301, .port = 5, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) { .route = 0x301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) { .route = 0x1, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) { .route = 0x1, .port = 7, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) { .route = 0x701, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) { .route = 0x701, .port = 7, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) { .route = 0x70701, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) { .route = 0x70701, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) { .route = 0x3070701, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) { .route = 0x3070701, .port = 5, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) { .route = 0x503070701, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) { .route = 0x503070701, .port = 14, .type = TB_TYPE_DP_HDMI_OUT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) struct tb_switch *host, *dev1, *dev2, *dev3, *dev5, *dev6, *dev7, *dev9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) dev2 = alloc_dev_default(test, dev1, 0x301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) dev3 = alloc_dev_with_dpin(test, dev2, 0x50301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) alloc_dev_default(test, dev1, 0x501, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) dev5 = alloc_dev_default(test, dev1, 0x701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) dev6 = alloc_dev_default(test, dev5, 0x70701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) dev7 = alloc_dev_default(test, dev6, 0x3070701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) alloc_dev_default(test, dev7, 0x303070701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) dev9 = alloc_dev_default(test, dev7, 0x503070701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) src_port = &dev3->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) dst_port = &dev9->ports[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* Walk both directions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) tb_for_each_port_on_path(src_port, dst_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) KUNIT_EXPECT_EQ(test, i, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) i = ARRAY_SIZE(test_data) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) tb_for_each_port_on_path(dst_port, src_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) i--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) KUNIT_EXPECT_EQ(test, i, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) static void tb_test_path_max_length_walk(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) struct tb_switch *host, *dev1, *dev2, *dev3, *dev4, *dev5, *dev6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) struct tb_switch *dev7, *dev8, *dev9, *dev10, *dev11, *dev12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) struct tb_port *src_port, *dst_port, *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * Walks from Device #6 DP IN to Device #12 DP OUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * 1 / \ 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * 1 / \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * [Device #1] [Device #7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * [Device #2] [Device #8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * [Device #3] [Device #9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) * [Device #4] [Device #10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) * [Device #5] [Device #11]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) * [Device #6] [Device #12]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static const struct port_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) { .route = 0x30303030301, .port = 13, .type = TB_TYPE_DP_HDMI_IN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) { .route = 0x30303030301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) { .route = 0x303030301, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) { .route = 0x303030301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) { .route = 0x3030301, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) { .route = 0x3030301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) { .route = 0x30301, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) { .route = 0x30301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) { .route = 0x301, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) { .route = 0x301, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) { .route = 0x1, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) { .route = 0x1, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) { .route = 0x0, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) { .route = 0x0, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) { .route = 0x3, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) { .route = 0x3, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) { .route = 0x303, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) { .route = 0x303, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) { .route = 0x30303, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) { .route = 0x30303, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) { .route = 0x3030303, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) { .route = 0x3030303, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) { .route = 0x303030303, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) { .route = 0x303030303, .port = 3, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) { .route = 0x30303030303, .port = 1, .type = TB_TYPE_PORT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) { .route = 0x30303030303, .port = 13, .type = TB_TYPE_DP_HDMI_OUT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) dev2 = alloc_dev_default(test, dev1, 0x301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev3 = alloc_dev_default(test, dev2, 0x30301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) dev4 = alloc_dev_default(test, dev3, 0x3030301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) dev5 = alloc_dev_default(test, dev4, 0x303030301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) dev6 = alloc_dev_with_dpin(test, dev5, 0x30303030301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) dev7 = alloc_dev_default(test, host, 0x3, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) dev8 = alloc_dev_default(test, dev7, 0x303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) dev9 = alloc_dev_default(test, dev8, 0x30303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) dev10 = alloc_dev_default(test, dev9, 0x3030303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) dev11 = alloc_dev_default(test, dev10, 0x303030303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) dev12 = alloc_dev_default(test, dev11, 0x30303030303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) src_port = &dev6->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) dst_port = &dev12->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* Walk both directions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) tb_for_each_port_on_path(src_port, dst_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) KUNIT_EXPECT_EQ(test, i, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) i = ARRAY_SIZE(test_data) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) tb_for_each_port_on_path(dst_port, src_port, p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) KUNIT_EXPECT_TRUE(test, i < ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) KUNIT_EXPECT_EQ(test, tb_route(p->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) KUNIT_EXPECT_EQ(test, p->port, test_data[i].port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) KUNIT_EXPECT_EQ(test, (enum tb_port_type)p->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) test_data[i].type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) i--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) KUNIT_EXPECT_EQ(test, i, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static void tb_test_path_not_connected(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) struct tb_switch *host, *dev1, *dev2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) struct tb_port *down, *up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) dev1 = alloc_dev_default(test, host, 0x3, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) /* Not connected to anything */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) dev2 = alloc_dev_default(test, NULL, 0x303, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) down = &dev1->ports[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) up = &dev2->ports[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) path = tb_path_alloc(NULL, down, 8, up, 8, 0, "PCIe Down");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) KUNIT_ASSERT_TRUE(test, path == NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) path = tb_path_alloc(NULL, down, 8, up, 8, 1, "PCIe Down");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) KUNIT_ASSERT_TRUE(test, path == NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) struct hop_expectation {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) u64 route;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) u8 in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) enum tb_port_type in_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) u8 out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) enum tb_port_type out_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static void tb_test_path_not_bonded_lane0(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * PCIe path from host to device using lane 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * 3 |: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * 1 |: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * [Device]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) static const struct hop_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .route = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .in_port = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .in_type = TB_TYPE_PCIE_DOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .out_port = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) .route = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) .in_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .out_port = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .out_type = TB_TYPE_PCIE_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) struct tb_switch *host, *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct tb_port *down, *up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) dev = alloc_dev_default(test, host, 0x3, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) down = &host->ports[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) up = &dev->ports[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) path = tb_path_alloc(NULL, down, 8, up, 8, 0, "PCIe Down");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) KUNIT_ASSERT_TRUE(test, path != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) KUNIT_ASSERT_EQ(test, path->path_length, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) for (i = 0; i < ARRAY_SIZE(test_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) const struct tb_port *in_port, *out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) in_port = path->hops[i].in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) out_port = path->hops[i].out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) KUNIT_EXPECT_EQ(test, tb_route(in_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) KUNIT_EXPECT_EQ(test, in_port->port, test_data[i].in_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) KUNIT_EXPECT_EQ(test, (enum tb_port_type)in_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) test_data[i].in_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) KUNIT_EXPECT_EQ(test, tb_route(out_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) KUNIT_EXPECT_EQ(test, out_port->port, test_data[i].out_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) KUNIT_EXPECT_EQ(test, (enum tb_port_type)out_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) test_data[i].out_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) tb_path_free(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) static void tb_test_path_not_bonded_lane1(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) * DP Video path from host to device using lane 1. Paths like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) * these are only used with Thunderbolt 1 devices where lane
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) * bonding is not possible. USB4 specifically does not allow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) * paths like this (you either use lane 0 where lane 1 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) * disabled or both lanes are bonded).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) * [Device]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static const struct hop_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .route = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .in_port = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .in_type = TB_TYPE_DP_HDMI_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .route = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .out_port = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .out_type = TB_TYPE_DP_HDMI_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) struct tb_switch *host, *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) dev = alloc_dev_default(test, host, 0x1, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) in = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) out = &dev->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) path = tb_path_alloc(NULL, in, 9, out, 9, 1, "Video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) KUNIT_ASSERT_TRUE(test, path != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) KUNIT_ASSERT_EQ(test, path->path_length, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) for (i = 0; i < ARRAY_SIZE(test_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) const struct tb_port *in_port, *out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) in_port = path->hops[i].in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) out_port = path->hops[i].out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) KUNIT_EXPECT_EQ(test, tb_route(in_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) KUNIT_EXPECT_EQ(test, in_port->port, test_data[i].in_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) KUNIT_EXPECT_EQ(test, (enum tb_port_type)in_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) test_data[i].in_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) KUNIT_EXPECT_EQ(test, tb_route(out_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) KUNIT_EXPECT_EQ(test, out_port->port, test_data[i].out_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) KUNIT_EXPECT_EQ(test, (enum tb_port_type)out_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) test_data[i].out_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) tb_path_free(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static void tb_test_path_not_bonded_lane1_chain(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * DP Video path from host to device 3 using lane 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * 7 :| 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * 5 :| 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) static const struct hop_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .route = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .in_port = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .in_type = TB_TYPE_DP_HDMI_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .route = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .out_port = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) .route = 0x701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) .out_port = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) .route = 0x50701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) .out_port = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) .out_type = TB_TYPE_DP_HDMI_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct tb_switch *host, *dev1, *dev2, *dev3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) dev1 = alloc_dev_default(test, host, 0x1, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) dev2 = alloc_dev_default(test, dev1, 0x701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) dev3 = alloc_dev_default(test, dev2, 0x50701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) in = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) out = &dev3->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) path = tb_path_alloc(NULL, in, 9, out, 9, 1, "Video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) KUNIT_ASSERT_TRUE(test, path != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) KUNIT_ASSERT_EQ(test, path->path_length, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) for (i = 0; i < ARRAY_SIZE(test_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) const struct tb_port *in_port, *out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) in_port = path->hops[i].in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) out_port = path->hops[i].out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) KUNIT_EXPECT_EQ(test, tb_route(in_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) KUNIT_EXPECT_EQ(test, in_port->port, test_data[i].in_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) KUNIT_EXPECT_EQ(test, (enum tb_port_type)in_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) test_data[i].in_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) KUNIT_EXPECT_EQ(test, tb_route(out_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) KUNIT_EXPECT_EQ(test, out_port->port, test_data[i].out_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) KUNIT_EXPECT_EQ(test, (enum tb_port_type)out_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) test_data[i].out_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) tb_path_free(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) static void tb_test_path_not_bonded_lane1_chain_reverse(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) * DP Video path from device 3 to host using lane 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) * 7 :| 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) * 5 :| 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) static const struct hop_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) .route = 0x50701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) .in_port = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) .in_type = TB_TYPE_DP_HDMI_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) .route = 0x701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) .in_port = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .route = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .in_port = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) .route = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .out_port = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .out_type = TB_TYPE_DP_HDMI_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) struct tb_switch *host, *dev1, *dev2, *dev3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) dev1 = alloc_dev_default(test, host, 0x1, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) dev2 = alloc_dev_default(test, dev1, 0x701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) dev3 = alloc_dev_with_dpin(test, dev2, 0x50701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) in = &dev3->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) out = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) path = tb_path_alloc(NULL, in, 9, out, 9, 1, "Video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) KUNIT_ASSERT_TRUE(test, path != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) KUNIT_ASSERT_EQ(test, path->path_length, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) for (i = 0; i < ARRAY_SIZE(test_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) const struct tb_port *in_port, *out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) in_port = path->hops[i].in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) out_port = path->hops[i].out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) KUNIT_EXPECT_EQ(test, tb_route(in_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) KUNIT_EXPECT_EQ(test, in_port->port, test_data[i].in_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) KUNIT_EXPECT_EQ(test, (enum tb_port_type)in_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) test_data[i].in_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) KUNIT_EXPECT_EQ(test, tb_route(out_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) KUNIT_EXPECT_EQ(test, out_port->port, test_data[i].out_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) KUNIT_EXPECT_EQ(test, (enum tb_port_type)out_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) test_data[i].out_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) tb_path_free(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static void tb_test_path_mixed_chain(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * DP Video path from host to device 4 where first and last link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) * is bonded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) * 7 :| 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) * 5 :| 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) * 3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * [Device #4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) static const struct hop_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .route = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) .in_port = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .in_type = TB_TYPE_DP_HDMI_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .out_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) .route = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) .in_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) .out_port = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) .route = 0x701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) .out_port = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) .route = 0x50701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) .in_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) .out_port = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) .route = 0x3050701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) .in_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) .out_port = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) .out_type = TB_TYPE_DP_HDMI_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) struct tb_switch *host, *dev1, *dev2, *dev3, *dev4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) dev2 = alloc_dev_default(test, dev1, 0x701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) dev3 = alloc_dev_default(test, dev2, 0x50701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) dev4 = alloc_dev_default(test, dev3, 0x3050701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) in = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) out = &dev4->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) path = tb_path_alloc(NULL, in, 9, out, 9, 1, "Video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) KUNIT_ASSERT_TRUE(test, path != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) KUNIT_ASSERT_EQ(test, path->path_length, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) for (i = 0; i < ARRAY_SIZE(test_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) const struct tb_port *in_port, *out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) in_port = path->hops[i].in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) out_port = path->hops[i].out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) KUNIT_EXPECT_EQ(test, tb_route(in_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) KUNIT_EXPECT_EQ(test, in_port->port, test_data[i].in_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) KUNIT_EXPECT_EQ(test, (enum tb_port_type)in_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) test_data[i].in_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) KUNIT_EXPECT_EQ(test, tb_route(out_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) KUNIT_EXPECT_EQ(test, out_port->port, test_data[i].out_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) KUNIT_EXPECT_EQ(test, (enum tb_port_type)out_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) test_data[i].out_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) tb_path_free(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) static void tb_test_path_mixed_chain_reverse(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) * DP Video path from device 4 to host where first and last link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) * is bonded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) * 7 :| 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) * 5 :| 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) * 1 :| 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * 3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) * [Device #4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) static const struct hop_expectation test_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) .route = 0x3050701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) .in_port = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) .in_type = TB_TYPE_DP_HDMI_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) .out_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) .route = 0x50701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) .in_port = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) .route = 0x701,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) .in_port = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) .out_port = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) .route = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .in_port = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) .out_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) .out_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) .route = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) .in_port = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) .in_type = TB_TYPE_PORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) .out_port = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) .out_type = TB_TYPE_DP_HDMI_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) struct tb_switch *host, *dev1, *dev2, *dev3, *dev4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) struct tb_path *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) dev2 = alloc_dev_default(test, dev1, 0x701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) dev3 = alloc_dev_default(test, dev2, 0x50701, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) dev4 = alloc_dev_default(test, dev3, 0x3050701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) in = &dev4->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) out = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) path = tb_path_alloc(NULL, in, 9, out, 9, 1, "Video");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) KUNIT_ASSERT_TRUE(test, path != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) KUNIT_ASSERT_EQ(test, path->path_length, (int)ARRAY_SIZE(test_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) for (i = 0; i < ARRAY_SIZE(test_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) const struct tb_port *in_port, *out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) in_port = path->hops[i].in_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) out_port = path->hops[i].out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) KUNIT_EXPECT_EQ(test, tb_route(in_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) KUNIT_EXPECT_EQ(test, in_port->port, test_data[i].in_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) KUNIT_EXPECT_EQ(test, (enum tb_port_type)in_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) test_data[i].in_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) KUNIT_EXPECT_EQ(test, tb_route(out_port->sw), test_data[i].route);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) KUNIT_EXPECT_EQ(test, out_port->port, test_data[i].out_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) KUNIT_EXPECT_EQ(test, (enum tb_port_type)out_port->config.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) test_data[i].out_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) tb_path_free(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) static void tb_test_tunnel_pcie(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) struct tb_switch *host, *dev1, *dev2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) struct tb_tunnel *tunnel1, *tunnel2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) struct tb_port *down, *up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) * Create PCIe tunnel between host and two devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) * 5 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) dev2 = alloc_dev_default(test, dev1, 0x501, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) down = &host->ports[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) up = &dev1->ports[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) tunnel1 = tb_tunnel_alloc_pci(NULL, up, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) KUNIT_ASSERT_TRUE(test, tunnel1 != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) KUNIT_EXPECT_EQ(test, tunnel1->type, (enum tb_tunnel_type)TB_TUNNEL_PCI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) KUNIT_EXPECT_PTR_EQ(test, tunnel1->src_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) KUNIT_EXPECT_PTR_EQ(test, tunnel1->dst_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) KUNIT_ASSERT_EQ(test, tunnel1->npaths, (size_t)2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) KUNIT_ASSERT_EQ(test, tunnel1->paths[0]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[0]->hops[0].in_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[0]->hops[1].out_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) KUNIT_ASSERT_EQ(test, tunnel1->paths[1]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[1]->hops[0].in_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[1]->hops[1].out_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) down = &dev1->ports[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) up = &dev2->ports[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) tunnel2 = tb_tunnel_alloc_pci(NULL, up, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) KUNIT_ASSERT_TRUE(test, tunnel2 != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) KUNIT_EXPECT_EQ(test, tunnel2->type, (enum tb_tunnel_type)TB_TUNNEL_PCI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) KUNIT_EXPECT_PTR_EQ(test, tunnel2->src_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) KUNIT_EXPECT_PTR_EQ(test, tunnel2->dst_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) KUNIT_ASSERT_EQ(test, tunnel2->npaths, (size_t)2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) KUNIT_ASSERT_EQ(test, tunnel2->paths[0]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[0]->hops[0].in_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[0]->hops[1].out_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) KUNIT_ASSERT_EQ(test, tunnel2->paths[1]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[1]->hops[0].in_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[1]->hops[1].out_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) tb_tunnel_free(tunnel2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) tb_tunnel_free(tunnel1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) static void tb_test_tunnel_dp(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) struct tb_switch *host, *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) struct tb_tunnel *tunnel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) * Create DP tunnel between Host and Device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) * [Device]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) dev = alloc_dev_default(test, host, 0x3, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) in = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) out = &dev->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) tunnel = tb_tunnel_alloc_dp(NULL, in, out, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) KUNIT_ASSERT_TRUE(test, tunnel != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) KUNIT_EXPECT_EQ(test, tunnel->type, (enum tb_tunnel_type)TB_TUNNEL_DP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) KUNIT_EXPECT_PTR_EQ(test, tunnel->src_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) KUNIT_EXPECT_PTR_EQ(test, tunnel->dst_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) KUNIT_ASSERT_EQ(test, tunnel->npaths, (size_t)3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) KUNIT_ASSERT_EQ(test, tunnel->paths[0]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[1].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) KUNIT_ASSERT_EQ(test, tunnel->paths[1]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[1].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) KUNIT_ASSERT_EQ(test, tunnel->paths[2]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[0].in_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[1].out_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) tb_tunnel_free(tunnel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) static void tb_test_tunnel_dp_chain(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) struct tb_switch *host, *dev1, *dev4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) struct tb_tunnel *tunnel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) * Create DP tunnel from Host DP IN to Device #4 DP OUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) * 3 / | 5 \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) * 1 / | \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) * [Device #2] | [Device #4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) * | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) alloc_dev_default(test, dev1, 0x301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) alloc_dev_default(test, dev1, 0x501, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) dev4 = alloc_dev_default(test, dev1, 0x701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) in = &host->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) out = &dev4->ports[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) tunnel = tb_tunnel_alloc_dp(NULL, in, out, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) KUNIT_ASSERT_TRUE(test, tunnel != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) KUNIT_EXPECT_EQ(test, tunnel->type, (enum tb_tunnel_type)TB_TUNNEL_DP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) KUNIT_EXPECT_PTR_EQ(test, tunnel->src_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) KUNIT_EXPECT_PTR_EQ(test, tunnel->dst_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) KUNIT_ASSERT_EQ(test, tunnel->npaths, (size_t)3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) KUNIT_ASSERT_EQ(test, tunnel->paths[0]->path_length, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[2].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) KUNIT_ASSERT_EQ(test, tunnel->paths[1]->path_length, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[2].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) KUNIT_ASSERT_EQ(test, tunnel->paths[2]->path_length, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[0].in_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[2].out_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) tb_tunnel_free(tunnel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) static void tb_test_tunnel_dp_tree(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) struct tb_switch *host, *dev1, *dev2, *dev3, *dev5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) struct tb_tunnel *tunnel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) * Create DP tunnel from Device #2 DP IN to Device #5 DP OUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) * 3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) * 3 / | 5 \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) * 1 / | \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) * [Device #2] | [Device #4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) * | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) * | 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) * | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) * [Device #5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) dev1 = alloc_dev_default(test, host, 0x3, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) dev2 = alloc_dev_with_dpin(test, dev1, 0x303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) dev3 = alloc_dev_default(test, dev1, 0x503, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) alloc_dev_default(test, dev1, 0x703, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) dev5 = alloc_dev_default(test, dev3, 0x50503, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) in = &dev2->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) out = &dev5->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) tunnel = tb_tunnel_alloc_dp(NULL, in, out, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) KUNIT_ASSERT_TRUE(test, tunnel != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) KUNIT_EXPECT_EQ(test, tunnel->type, (enum tb_tunnel_type)TB_TUNNEL_DP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) KUNIT_EXPECT_PTR_EQ(test, tunnel->src_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) KUNIT_EXPECT_PTR_EQ(test, tunnel->dst_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) KUNIT_ASSERT_EQ(test, tunnel->npaths, (size_t)3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) KUNIT_ASSERT_EQ(test, tunnel->paths[0]->path_length, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[3].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) KUNIT_ASSERT_EQ(test, tunnel->paths[1]->path_length, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[3].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) KUNIT_ASSERT_EQ(test, tunnel->paths[2]->path_length, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[0].in_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[3].out_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) tb_tunnel_free(tunnel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) static void tb_test_tunnel_dp_max_length(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) struct tb_switch *host, *dev1, *dev2, *dev3, *dev4, *dev5, *dev6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) struct tb_switch *dev7, *dev8, *dev9, *dev10, *dev11, *dev12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) struct tb_port *in, *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) struct tb_tunnel *tunnel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) * Creates DP tunnel from Device #6 to Device #12.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) * 1 / \ 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) * 1 / \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) * [Device #1] [Device #7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) * [Device #2] [Device #8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) * [Device #3] [Device #9]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) * [Device #4] [Device #10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) * [Device #5] [Device #11]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) * 3 | | 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) * 1 | | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) * [Device #6] [Device #12]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) dev2 = alloc_dev_default(test, dev1, 0x301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) dev3 = alloc_dev_default(test, dev2, 0x30301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) dev4 = alloc_dev_default(test, dev3, 0x3030301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) dev5 = alloc_dev_default(test, dev4, 0x303030301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) dev6 = alloc_dev_with_dpin(test, dev5, 0x30303030301, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) dev7 = alloc_dev_default(test, host, 0x3, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) dev8 = alloc_dev_default(test, dev7, 0x303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) dev9 = alloc_dev_default(test, dev8, 0x30303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) dev10 = alloc_dev_default(test, dev9, 0x3030303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) dev11 = alloc_dev_default(test, dev10, 0x303030303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) dev12 = alloc_dev_default(test, dev11, 0x30303030303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) in = &dev6->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) out = &dev12->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) tunnel = tb_tunnel_alloc_dp(NULL, in, out, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) KUNIT_ASSERT_TRUE(test, tunnel != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) KUNIT_EXPECT_EQ(test, tunnel->type, (enum tb_tunnel_type)TB_TUNNEL_DP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) KUNIT_EXPECT_PTR_EQ(test, tunnel->src_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) KUNIT_EXPECT_PTR_EQ(test, tunnel->dst_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) KUNIT_ASSERT_EQ(test, tunnel->npaths, (size_t)3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) KUNIT_ASSERT_EQ(test, tunnel->paths[0]->path_length, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) /* First hop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) /* Middle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[6].in_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) &host->ports[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[6].out_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) &host->ports[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) /* Last */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[0]->hops[12].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) KUNIT_ASSERT_EQ(test, tunnel->paths[1]->path_length, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[0].in_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[6].in_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) &host->ports[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[6].out_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) &host->ports[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[1]->hops[12].out_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) KUNIT_ASSERT_EQ(test, tunnel->paths[2]->path_length, 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[0].in_port, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[6].in_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) &host->ports[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[6].out_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) &host->ports[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) KUNIT_EXPECT_PTR_EQ(test, tunnel->paths[2]->hops[12].out_port, in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) tb_tunnel_free(tunnel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) static void tb_test_tunnel_usb3(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) struct tb_switch *host, *dev1, *dev2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) struct tb_tunnel *tunnel1, *tunnel2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) struct tb_port *down, *up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) * Create USB3 tunnel between host and two devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) * \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) * \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) * [Device #2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) dev1 = alloc_dev_default(test, host, 0x1, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) dev2 = alloc_dev_default(test, dev1, 0x701, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) down = &host->ports[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) up = &dev1->ports[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) tunnel1 = tb_tunnel_alloc_usb3(NULL, up, down, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) KUNIT_ASSERT_TRUE(test, tunnel1 != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) KUNIT_EXPECT_EQ(test, tunnel1->type, (enum tb_tunnel_type)TB_TUNNEL_USB3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) KUNIT_EXPECT_PTR_EQ(test, tunnel1->src_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) KUNIT_EXPECT_PTR_EQ(test, tunnel1->dst_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) KUNIT_ASSERT_EQ(test, tunnel1->npaths, (size_t)2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) KUNIT_ASSERT_EQ(test, tunnel1->paths[0]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[0]->hops[0].in_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[0]->hops[1].out_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) KUNIT_ASSERT_EQ(test, tunnel1->paths[1]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[1]->hops[0].in_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) KUNIT_EXPECT_PTR_EQ(test, tunnel1->paths[1]->hops[1].out_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) down = &dev1->ports[17];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) up = &dev2->ports[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) tunnel2 = tb_tunnel_alloc_usb3(NULL, up, down, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) KUNIT_ASSERT_TRUE(test, tunnel2 != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) KUNIT_EXPECT_EQ(test, tunnel2->type, (enum tb_tunnel_type)TB_TUNNEL_USB3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) KUNIT_EXPECT_PTR_EQ(test, tunnel2->src_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) KUNIT_EXPECT_PTR_EQ(test, tunnel2->dst_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) KUNIT_ASSERT_EQ(test, tunnel2->npaths, (size_t)2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) KUNIT_ASSERT_EQ(test, tunnel2->paths[0]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[0]->hops[0].in_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[0]->hops[1].out_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) KUNIT_ASSERT_EQ(test, tunnel2->paths[1]->path_length, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[1]->hops[0].in_port, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) KUNIT_EXPECT_PTR_EQ(test, tunnel2->paths[1]->hops[1].out_port, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) tb_tunnel_free(tunnel2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) tb_tunnel_free(tunnel1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) static void tb_test_tunnel_port_on_path(struct kunit *test)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) struct tb_switch *host, *dev1, *dev2, *dev3, *dev4, *dev5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) struct tb_port *in, *out, *port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) struct tb_tunnel *dp_tunnel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) * [Host]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) * 3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) * 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) * [Device #1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) * 3 / | 5 \ 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) * 1 / | \ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) * [Device #2] | [Device #4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) * | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) * [Device #3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) * | 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) * | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) * [Device #5]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) host = alloc_host(test);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) dev1 = alloc_dev_default(test, host, 0x3, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) dev2 = alloc_dev_with_dpin(test, dev1, 0x303, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) dev3 = alloc_dev_default(test, dev1, 0x503, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) dev4 = alloc_dev_default(test, dev1, 0x703, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) dev5 = alloc_dev_default(test, dev3, 0x50503, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) in = &dev2->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) out = &dev5->ports[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) dp_tunnel = tb_tunnel_alloc_dp(NULL, in, out, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) KUNIT_ASSERT_TRUE(test, dp_tunnel != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) KUNIT_EXPECT_TRUE(test, tb_tunnel_port_on_path(dp_tunnel, in));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) KUNIT_EXPECT_TRUE(test, tb_tunnel_port_on_path(dp_tunnel, out));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) port = &host->ports[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) KUNIT_EXPECT_FALSE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) port = &host->ports[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) KUNIT_EXPECT_FALSE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) port = &dev1->ports[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) KUNIT_EXPECT_FALSE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) port = &dev1->ports[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) KUNIT_EXPECT_TRUE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) port = &dev1->ports[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) KUNIT_EXPECT_TRUE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) port = &dev1->ports[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) KUNIT_EXPECT_FALSE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) port = &dev3->ports[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) KUNIT_EXPECT_TRUE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) port = &dev5->ports[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) KUNIT_EXPECT_TRUE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) port = &dev4->ports[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) KUNIT_EXPECT_FALSE(test, tb_tunnel_port_on_path(dp_tunnel, port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) tb_tunnel_free(dp_tunnel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) static struct kunit_case tb_test_cases[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) KUNIT_CASE(tb_test_path_basic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) KUNIT_CASE(tb_test_path_not_connected_walk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) KUNIT_CASE(tb_test_path_single_hop_walk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) KUNIT_CASE(tb_test_path_daisy_chain_walk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) KUNIT_CASE(tb_test_path_simple_tree_walk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) KUNIT_CASE(tb_test_path_complex_tree_walk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) KUNIT_CASE(tb_test_path_max_length_walk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) KUNIT_CASE(tb_test_path_not_connected),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) KUNIT_CASE(tb_test_path_not_bonded_lane0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) KUNIT_CASE(tb_test_path_not_bonded_lane1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) KUNIT_CASE(tb_test_path_not_bonded_lane1_chain),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) KUNIT_CASE(tb_test_path_not_bonded_lane1_chain_reverse),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) KUNIT_CASE(tb_test_path_mixed_chain),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) KUNIT_CASE(tb_test_path_mixed_chain_reverse),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) KUNIT_CASE(tb_test_tunnel_pcie),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) KUNIT_CASE(tb_test_tunnel_dp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) KUNIT_CASE(tb_test_tunnel_dp_chain),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) KUNIT_CASE(tb_test_tunnel_dp_tree),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) KUNIT_CASE(tb_test_tunnel_dp_max_length),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) KUNIT_CASE(tb_test_tunnel_port_on_path),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) KUNIT_CASE(tb_test_tunnel_usb3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) static struct kunit_suite tb_test_suite = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) .name = "thunderbolt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) .test_cases = tb_test_cases,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) static struct kunit_suite *tb_test_suites[] = { &tb_test_suite, NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) int tb_test_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) return __kunit_test_suites_init(tb_test_suites);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) void tb_test_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) return __kunit_test_suites_exit(tb_test_suites);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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