Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * NVM helpers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2020, Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/idr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "tb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) static DEFINE_IDA(nvm_ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * tb_nvm_alloc() - Allocate new NVM structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * @dev: Device owning the NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * Allocates new NVM structure with unique @id and returns it. In case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * of error returns ERR_PTR().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct tb_nvm *tb_nvm_alloc(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct tb_nvm *nvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	if (!nvm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	ret = ida_simple_get(&nvm_ida, 0, 0, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		kfree(nvm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	nvm->id = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	nvm->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return nvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * tb_nvm_add_active() - Adds active NVMem device to NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * @nvm: NVM structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * @size: Size of the active NVM in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * @reg_read: Pointer to the function to read the NVM (passed directly to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  *	      NVMem device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * Registers new active NVmem device for @nvm. The @reg_read is called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * directly from NVMem so it must handle possible concurrent access if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * needed. The first parameter passed to @reg_read is @nvm structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * Returns %0 in success and negative errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct nvmem_config config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct nvmem_device *nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	memset(&config, 0, sizeof(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	config.name = "nvm_active";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	config.reg_read = reg_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	config.read_only = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	config.id = nvm->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	config.stride = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	config.word_size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	config.size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	config.dev = nvm->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	config.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	config.priv = nvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	nvmem = nvmem_register(&config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (IS_ERR(nvmem))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		return PTR_ERR(nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	nvm->active = nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * tb_nvm_write_buf() - Write data to @nvm buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * @nvm: NVM structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * @offset: Offset where to write the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * @val: Data buffer to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * @bytes: Number of bytes to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  * Helper function to cache the new NVM image before it is actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * written to the flash. Copies @bytes from @val to @nvm->buf starting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * from @offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		     size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (!nvm->buf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		nvm->buf = vmalloc(NVM_MAX_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		if (!nvm->buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	nvm->flushed = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	nvm->buf_data_size = offset + bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	memcpy(nvm->buf + offset, val, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  * tb_nvm_add_non_active() - Adds non-active NVMem device to NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * @nvm: NVM structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * @size: Size of the non-active NVM in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * @reg_write: Pointer to the function to write the NVM (passed directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  *	       to the NVMem device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  * Registers new non-active NVmem device for @nvm. The @reg_write is called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  * directly from NVMem so it must handle possible concurrent access if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  * needed. The first parameter passed to @reg_write is @nvm structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  * Returns %0 in success and negative errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			  nvmem_reg_write_t reg_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct nvmem_config config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct nvmem_device *nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	memset(&config, 0, sizeof(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	config.name = "nvm_non_active";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	config.reg_write = reg_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	config.root_only = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	config.id = nvm->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	config.stride = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	config.word_size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	config.size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	config.dev = nvm->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	config.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	config.priv = nvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	nvmem = nvmem_register(&config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (IS_ERR(nvmem))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		return PTR_ERR(nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	nvm->non_active = nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  * tb_nvm_free() - Release NVM and its resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)  * @nvm: NVM structure to release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)  * Releases NVM and the NVMem devices if they were registered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) void tb_nvm_free(struct tb_nvm *nvm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (nvm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		if (nvm->non_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			nvmem_unregister(nvm->non_active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		if (nvm->active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			nvmem_unregister(nvm->active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		vfree(nvm->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		ida_simple_remove(&nvm_ida, nvm->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	kfree(nvm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) void tb_nvm_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	ida_destroy(&nvm_ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }