^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <soc/tegra/fuse.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "soctherm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define NOMINAL_CALIB_FT 105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define NOMINAL_CALIB_CP 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define FUSE_TSENSOR_CALIB_CP_TS_BASE_MASK 0x1fff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK (0x1fff << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define FUSE_TSENSOR_COMMON 0x180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * | BASE_FT | BASE_CP | SHFT_FT | SHIFT_CP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Tegra12x, etc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * In chips prior to Tegra210, this fuse was incorrectly sized as 26 bits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * were obtained via the FUSE_SPARE_REALIGNMENT_REG register [5:0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * FUSE_TSENSOR_COMMON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * |-----------| SHFT_FT | BASE_FT | BASE_CP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * FUSE_SPARE_REALIGNMENT_REG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * |---------------------------------------------------| SHIFT_CP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CALIB_COEFFICIENT 1000000LL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * div64_s64_precise() - wrapper for div64_s64()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @a: the dividend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @b: the divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Implements division with fairly accurate rounding instead of truncation by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * shifting the dividend to the left by 16 so that the quotient has a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * much higher precision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Return: the quotient of a / b.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static s64 div64_s64_precise(s64 a, s32 b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) s64 r, al;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Scale up for increased precision division */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) al = a << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) r = div64_s64(al * 2 + 1, 2 * b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return r >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct tsensor_shared_calib *shared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) s32 shifted_cp, shifted_ft;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) err = tegra_fuse_readl(FUSE_TSENSOR_COMMON, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) shared->base_cp = (val & tfuse->fuse_base_cp_mask) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) tfuse->fuse_base_cp_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) shared->base_ft = (val & tfuse->fuse_base_ft_mask) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) tfuse->fuse_base_ft_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) shifted_ft = (val & tfuse->fuse_shift_ft_mask) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) tfuse->fuse_shift_ft_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) shifted_ft = sign_extend32(shifted_ft, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (tfuse->fuse_spare_realignment) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) err = tegra_fuse_readl(tfuse->fuse_spare_realignment, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) shifted_cp = sign_extend32(val, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) shared->actual_temp_cp = 2 * NOMINAL_CALIB_CP + shifted_cp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) shared->actual_temp_ft = 2 * NOMINAL_CALIB_FT + shifted_ft;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int tegra_calc_tsensor_calib(const struct tegra_tsensor *sensor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) const struct tsensor_shared_calib *shared,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u32 *calibration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) const struct tegra_tsensor_group *sensor_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u32 val, calib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) s32 actual_tsensor_ft, actual_tsensor_cp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) s32 delta_sens, delta_temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) s32 mult, div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) s16 therma, thermb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) s64 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) sensor_group = sensor->group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) err = tegra_fuse_readl(sensor->calib_fuse_offset, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) actual_tsensor_cp = (shared->base_cp * 64) + sign_extend32(val, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) val = (val & FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) actual_tsensor_ft = (shared->base_ft * 32) + sign_extend32(val, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) delta_sens = actual_tsensor_ft - actual_tsensor_cp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) delta_temp = shared->actual_temp_ft - shared->actual_temp_cp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) mult = sensor_group->pdiv * sensor->config->tsample_ate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) div = sensor->config->tsample * sensor_group->pdiv_ate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) temp = (s64)delta_temp * (1LL << 13) * mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) therma = div64_s64_precise(temp, (s64)delta_sens * div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) temp = ((s64)actual_tsensor_ft * shared->actual_temp_cp) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ((s64)actual_tsensor_cp * shared->actual_temp_ft);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) thermb = div64_s64_precise(temp, delta_sens);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) temp = (s64)therma * sensor->fuse_corr_alpha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) therma = div64_s64_precise(temp, CALIB_COEFFICIENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) temp = (s64)thermb * sensor->fuse_corr_alpha + sensor->fuse_corr_beta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) thermb = div64_s64_precise(temp, CALIB_COEFFICIENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) calib = ((u16)therma << SENSOR_CONFIG2_THERMA_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ((u16)thermb << SENSOR_CONFIG2_THERMB_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) *calibration = calib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_AUTHOR("Wei Ni <wni@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_DESCRIPTION("Tegra SOCTHERM fuse management");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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