^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * R-Car Gen3 THS thermal sensor driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2016 Renesas Electronics Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2016 Sang Engineering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/sys_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/thermal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "thermal_core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "thermal_hwmon.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Register offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_GEN3_IRQSTR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG_GEN3_IRQMSK 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define REG_GEN3_IRQCTL 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define REG_GEN3_IRQEN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define REG_GEN3_IRQTEMP1 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define REG_GEN3_IRQTEMP2 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define REG_GEN3_IRQTEMP3 0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define REG_GEN3_CTSR 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define REG_GEN3_THCTR 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define REG_GEN3_TEMP 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define REG_GEN3_THCODE1 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define REG_GEN3_THCODE2 0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define REG_GEN3_THCODE3 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* IRQ{STR,MSK,EN} bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define IRQ_TEMP1 BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define IRQ_TEMP2 BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define IRQ_TEMP3 BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define IRQ_TEMPD1 BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define IRQ_TEMPD2 BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define IRQ_TEMPD3 BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* CTSR bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define CTSR_PONM BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CTSR_AOUT BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define CTSR_THBGR BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define CTSR_VMEN BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define CTSR_VMST BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define CTSR_THSST BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* THCTR bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define THCTR_PONM BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define THCTR_THSST BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CTEMP_MASK 0xFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MCELSIUS(temp) ((temp) * 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define GEN3_FUSE_MASK 0xFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define TSC_MAX_NUM 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* default THCODE values if FUSEs are missing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const int thcodes[TSC_MAX_NUM][3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { 3397, 2800, 2221 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { 3393, 2795, 2216 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { 3389, 2805, 2237 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Structure for thermal temperature calculation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct equation_coefs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int a1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int b1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int a2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int b2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct rcar_gen3_thermal_tsc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct thermal_zone_device *zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct equation_coefs coef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int tj_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int id; /* thermal channel id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct rcar_gen3_thermal_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned int num_tscs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u32 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return ioread32(tsc->base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u32 reg, u32 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) iowrite32(data, tsc->base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Linear approximation for temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * The constants a and b are calculated using two triplets of int values PTAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * and THCODE. PTAT and THCODE can either be read from hardware or use hard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * coded values from driver. The formula to calculate a and b are taken from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * BSP and sparsely documented and understood.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Examining the linear formula and the formula used to calculate constants a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * and b while knowing that the span for PTAT and THCODE values are between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * Integer also needs to be signed so that leaves 7 bits for binary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * fixed point scaling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define FIXPT_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* no idea where these constants come from */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define TJ_3 -41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int *ptat, const int *thcode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int ths_tj_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* TODO: Find documentation and document constant calculation formula */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Division is not scaled in BSP and if scaled it might overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * (ths_tj_1 - TJ_3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) tsc->tj_t - FIXPT_INT(TJ_3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) tsc->tj_t - FIXPT_INT(ths_tj_1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int rcar_gen3_thermal_round(int temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int result, round_offs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) -RCAR3_THERMAL_GRAN / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return result * RCAR3_THERMAL_GRAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct rcar_gen3_thermal_tsc *tsc = devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int mcelsius, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* Read register and convert to mili Celsius */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (reg <= thcodes[tsc->id][1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) tsc->coef.a1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) tsc->coef.a2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) mcelsius = FIXPT_TO_MCELSIUS(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* Guaranteed operating range is -40C to 125C. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* Round value to device granularity setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) *temp = rcar_gen3_thermal_round(mcelsius);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int mcelsius)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int celsius, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (celsius <= INT_FIXPT(tsc->tj_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) val = celsius * tsc->coef.a1 + tsc->coef.b1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) val = celsius * tsc->coef.a2 + tsc->coef.b2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return INT_FIXPT(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int rcar_gen3_thermal_update_range(struct rcar_gen3_thermal_tsc *tsc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) int temperature, low, high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) rcar_gen3_thermal_get_temp(tsc, &temperature);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) low = temperature - MCELSIUS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) high = temperature + MCELSIUS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .get_temp = rcar_gen3_thermal_get_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) for (i = 0; i < priv->num_tscs; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct rcar_gen3_thermal_priv *priv = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) for (i = 0; i < priv->num_tscs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) rcar_gen3_thermal_update_range(priv->tscs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) thermal_zone_device_update(priv->tscs[i]->zone,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) THERMAL_EVENT_UNSPECIFIED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static const struct soc_device_attribute r8a7795es1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) { .soc_id = "r8a7795", .revision = "ES1.*" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) usleep_range(100, 200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) CTSR_VMST | CTSR_THSST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u32 reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) reg_val &= ~THCTR_PONM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) reg_val |= THCTR_THSST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static const int rcar_gen3_ths_tj_1 = 126;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static const int rcar_gen3_ths_tj_1_m3_w = 116;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .compatible = "renesas,r8a774a1-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .data = &rcar_gen3_ths_tj_1_m3_w,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .compatible = "renesas,r8a774b1-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .data = &rcar_gen3_ths_tj_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .compatible = "renesas,r8a774e1-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .data = &rcar_gen3_ths_tj_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .compatible = "renesas,r8a7795-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .data = &rcar_gen3_ths_tj_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .compatible = "renesas,r8a7796-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .data = &rcar_gen3_ths_tj_1_m3_w,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .compatible = "renesas,r8a77961-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .data = &rcar_gen3_ths_tj_1_m3_w,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .compatible = "renesas,r8a77965-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .data = &rcar_gen3_ths_tj_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .compatible = "renesas,r8a77980-thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .data = &rcar_gen3_ths_tj_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int rcar_gen3_thermal_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) rcar_thermal_irq_set(priv, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) pm_runtime_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static void rcar_gen3_hwmon_action(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct thermal_zone_device *zone = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) thermal_remove_hwmon_sysfs(zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static int rcar_gen3_thermal_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct rcar_gen3_thermal_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) const int *ths_tj_1 = of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct thermal_zone_device *zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) int ret, irq, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) char *irqname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* default values if FUSEs are missing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* TODO: Read values from hardware on supported platforms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) int ptat[3] = { 2631, 1509, 435 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) priv->thermal_init = rcar_gen3_thermal_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (soc_device_match(r8a7795es1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) platform_set_drvdata(pdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * Request 2 (of the 3 possible) IRQs, the driver only needs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * to trigger on the low and high trip points of the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * temp window at this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) irq = platform_get_irq(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) dev_name(dev), i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!irqname)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ret = devm_request_threaded_irq(dev, irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) rcar_gen3_thermal_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) IRQF_ONESHOT, irqname, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) pm_runtime_get_sync(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) for (i = 0; i < TSC_MAX_NUM; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) struct rcar_gen3_thermal_tsc *tsc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) res = platform_get_resource(pdev, IORESOURCE_MEM, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (!tsc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) tsc->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (IS_ERR(tsc->base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ret = PTR_ERR(tsc->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) tsc->id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) priv->tscs[i] = tsc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) priv->thermal_init(tsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i], *ths_tj_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) &rcar_gen3_tz_of_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (IS_ERR(zone)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) dev_err(dev, "Can't register thermal zone\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) ret = PTR_ERR(zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) tsc->zone = zone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) tsc->zone->tzp->no_hwmon = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) ret = thermal_add_hwmon_sysfs(tsc->zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) ret = of_thermal_get_ntrips(tsc->zone);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) rcar_gen3_thermal_update_range(tsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) priv->num_tscs = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (!priv->num_tscs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) goto error_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) rcar_thermal_irq_set(priv, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) error_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) rcar_gen3_thermal_remove(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) rcar_thermal_irq_set(priv, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) for (i = 0; i < priv->num_tscs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) priv->thermal_init(tsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) rcar_gen3_thermal_update_range(tsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) rcar_thermal_irq_set(priv, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) rcar_gen3_thermal_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static struct platform_driver rcar_gen3_thermal_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .name = "rcar_gen3_thermal",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .pm = &rcar_gen3_thermal_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .of_match_table = rcar_gen3_thermal_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .probe = rcar_gen3_thermal_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .remove = rcar_gen3_thermal_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) module_platform_driver(rcar_gen3_thermal_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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