Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include "tsens.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) /* ----- SROT ------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define SROT_CTRL_OFF 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) /* ----- TM ------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define TM_INT_EN_OFF				0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF	0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define TM_Sn_STATUS_OFF			0x0030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define TM_TRDY_OFF				0x005c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /* eeprom layout data for 8916 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define MSM8916_BASE0_MASK	0x0000007f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define MSM8916_BASE1_MASK	0xfe000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define MSM8916_BASE0_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define MSM8916_BASE1_SHIFT	25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MSM8916_S0_P1_MASK	0x00000f80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define MSM8916_S1_P1_MASK	0x003e0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MSM8916_S2_P1_MASK	0xf8000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MSM8916_S3_P1_MASK	0x000003e0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define MSM8916_S4_P1_MASK	0x000f8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MSM8916_S0_P2_MASK	0x0001f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MSM8916_S1_P2_MASK	0x07c00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MSM8916_S2_P2_MASK	0x0000001f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MSM8916_S3_P2_MASK	0x00007c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define MSM8916_S4_P2_MASK	0x01f00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define MSM8916_S0_P1_SHIFT	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define MSM8916_S1_P1_SHIFT	17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define MSM8916_S2_P1_SHIFT	27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define MSM8916_S3_P1_SHIFT	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define MSM8916_S4_P1_SHIFT	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define MSM8916_S0_P2_SHIFT	12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define MSM8916_S1_P2_SHIFT	22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define MSM8916_S2_P2_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MSM8916_S3_P2_SHIFT	10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define MSM8916_S4_P2_SHIFT	20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define MSM8916_CAL_SEL_MASK	0xe0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define MSM8916_CAL_SEL_SHIFT	29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) /* eeprom layout data for 8939 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define MSM8939_BASE0_MASK	0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define MSM8939_BASE1_MASK	0xff000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define MSM8939_BASE0_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define MSM8939_BASE1_SHIFT	24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define MSM8939_S0_P1_MASK	0x000001f8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define MSM8939_S1_P1_MASK	0x001f8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define MSM8939_S2_P1_MASK_0_4	0xf8000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define MSM8939_S2_P1_MASK_5	0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define MSM8939_S3_P1_MASK	0x00001f80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define MSM8939_S4_P1_MASK	0x01f80000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define MSM8939_S5_P1_MASK	0x00003f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define MSM8939_S6_P1_MASK	0x03f00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define MSM8939_S7_P1_MASK	0x0000003f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define MSM8939_S8_P1_MASK	0x0003f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define MSM8939_S9_P1_MASK	0x07e00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define MSM8939_S0_P2_MASK	0x00007e00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define MSM8939_S1_P2_MASK	0x07e00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define MSM8939_S2_P2_MASK	0x0000007e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define MSM8939_S3_P2_MASK	0x0007e000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define MSM8939_S4_P2_MASK	0x7e000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define MSM8939_S5_P2_MASK	0x000fc000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define MSM8939_S6_P2_MASK	0xfc000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define MSM8939_S7_P2_MASK	0x00000fc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define MSM8939_S8_P2_MASK	0x00fc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define MSM8939_S9_P2_MASK_0_4	0xf8000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define MSM8939_S9_P2_MASK_5	0x00002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define MSM8939_S0_P1_SHIFT	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define MSM8939_S1_P1_SHIFT	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define MSM8939_S2_P1_SHIFT_0_4	27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define MSM8939_S2_P1_SHIFT_5	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define MSM8939_S3_P1_SHIFT	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define MSM8939_S4_P1_SHIFT	19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define MSM8939_S5_P1_SHIFT	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define MSM8939_S6_P1_SHIFT	20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define MSM8939_S7_P1_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define MSM8939_S8_P1_SHIFT	12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define MSM8939_S9_P1_SHIFT	21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define MSM8939_S0_P2_SHIFT	9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define MSM8939_S1_P2_SHIFT	21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define MSM8939_S2_P2_SHIFT	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define MSM8939_S3_P2_SHIFT	13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define MSM8939_S4_P2_SHIFT	25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define MSM8939_S5_P2_SHIFT	14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define MSM8939_S6_P2_SHIFT	26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define MSM8939_S7_P2_SHIFT	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define MSM8939_S8_P2_SHIFT	18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define MSM8939_S9_P2_SHIFT_0_4	27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define MSM8939_S9_P2_SHIFT_5	13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define MSM8939_CAL_SEL_MASK	0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define MSM8939_CAL_SEL_SHIFT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* eeprom layout data for 8974 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define BASE1_MASK		0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define S0_P1_MASK		0x3f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define S1_P1_MASK		0xfc000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define S2_P1_MASK		0x3f00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define S3_P1_MASK		0xfc000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define S4_P1_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define S5_P1_MASK		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define S6_P1_MASK		0x3f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define S7_P1_MASK		0xfc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define S8_P1_MASK		0x3f000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define S8_P1_MASK_BKP		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define S9_P1_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define S9_P1_MASK_BKP		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define S10_P1_MASK		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define S10_P1_MASK_BKP		0x3f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define CAL_SEL_0_1		0xc0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define CAL_SEL_2		0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define CAL_SEL_SHIFT		30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define CAL_SEL_SHIFT_2		28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define S0_P1_SHIFT		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define S1_P1_SHIFT		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define S2_P1_SHIFT		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define S3_P1_SHIFT		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define S5_P1_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define S6_P1_SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define S7_P1_SHIFT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define S8_P1_SHIFT		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define S9_P1_BKP_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define S10_P1_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define S10_P1_BKP_SHIFT	12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define BASE2_SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define BASE2_BKP_SHIFT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define S0_P2_SHIFT		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define S0_P2_BKP_SHIFT		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define S1_P2_SHIFT		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define S2_P2_BKP_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define S3_P2_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define S3_P2_BKP_SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define S4_P2_SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define S4_P2_BKP_SHIFT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define S5_P2_SHIFT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define S5_P2_BKP_SHIFT		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define S6_P2_SHIFT		24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define S7_P2_BKP_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define S8_P2_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define S8_P2_BKP_SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define S9_P2_SHIFT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define S9_P2_BKP_SHIFT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define S10_P2_SHIFT		18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define S10_P2_BKP_SHIFT	24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define BASE2_MASK		0xff000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define BASE2_BKP_MASK		0xfc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define S0_P2_MASK		0x3f00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define S0_P2_BKP_MASK		0xfc000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define S1_P2_MASK		0xfc000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define S1_P2_BKP_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define S2_P2_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define S2_P2_BKP_MASK		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define S3_P2_MASK		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define S3_P2_BKP_MASK		0x3f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define S4_P2_MASK		0x3f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define S4_P2_BKP_MASK		0xfc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define S5_P2_MASK		0xfc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define S5_P2_BKP_MASK		0x3f000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define S6_P2_MASK		0x3f000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define S6_P2_BKP_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define S7_P2_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define S7_P2_BKP_MASK		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define S8_P2_MASK		0xfc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define S8_P2_BKP_MASK		0x3f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define S9_P2_MASK		0x3f000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define S9_P2_BKP_MASK		0xfc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define S10_P2_MASK		0xfc0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define S10_P2_BKP_MASK		0x3f000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define BKP_SEL			0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define BKP_REDUN_SEL		0xe0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define BKP_REDUN_SHIFT		29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define BIT_APPEND		0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int calibrate_8916(struct tsens_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	int base0 = 0, base1 = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	u32 p1[5], p2[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	u32 *qfprom_cdata, *qfprom_csel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (IS_ERR(qfprom_cdata))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return PTR_ERR(qfprom_cdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	qfprom_csel = (u32 *)qfprom_read(priv->dev, "calib_sel");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (IS_ERR(qfprom_csel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		kfree(qfprom_cdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		return PTR_ERR(qfprom_csel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	mode = (qfprom_csel[0] & MSM8916_CAL_SEL_MASK) >> MSM8916_CAL_SEL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	dev_dbg(priv->dev, "calibration mode is %d\n", mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	case TWO_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		base1 = (qfprom_cdata[1] & MSM8916_BASE1_MASK) >> MSM8916_BASE1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		p2[0] = (qfprom_cdata[0] & MSM8916_S0_P2_MASK) >> MSM8916_S0_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		p2[1] = (qfprom_cdata[0] & MSM8916_S1_P2_MASK) >> MSM8916_S1_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		p2[2] = (qfprom_cdata[1] & MSM8916_S2_P2_MASK) >> MSM8916_S2_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		p2[3] = (qfprom_cdata[1] & MSM8916_S3_P2_MASK) >> MSM8916_S3_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		p2[4] = (qfprom_cdata[1] & MSM8916_S4_P2_MASK) >> MSM8916_S4_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		for (i = 0; i < priv->num_sensors; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			p2[i] = ((base1 + p2[i]) << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	case ONE_PT_CALIB2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		base0 = (qfprom_cdata[0] & MSM8916_BASE0_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		p1[0] = (qfprom_cdata[0] & MSM8916_S0_P1_MASK) >> MSM8916_S0_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		p1[1] = (qfprom_cdata[0] & MSM8916_S1_P1_MASK) >> MSM8916_S1_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		p1[2] = (qfprom_cdata[0] & MSM8916_S2_P1_MASK) >> MSM8916_S2_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		p1[3] = (qfprom_cdata[1] & MSM8916_S3_P1_MASK) >> MSM8916_S3_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		p1[4] = (qfprom_cdata[1] & MSM8916_S4_P1_MASK) >> MSM8916_S4_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		for (i = 0; i < priv->num_sensors; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			p1[i] = (((base0) + p1[i]) << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		for (i = 0; i < priv->num_sensors; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			p1[i] = 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			p2[i] = 780;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	compute_intercept_slope(priv, p1, p2, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	kfree(qfprom_cdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	kfree(qfprom_csel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static int calibrate_8939(struct tsens_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	int base0 = 0, base1 = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	u32 p1[10], p2[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	int mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	u32 *qfprom_cdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	u32 cdata[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (IS_ERR(qfprom_cdata))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		return PTR_ERR(qfprom_cdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	/* Mapping between qfprom nvmem and calibration data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	cdata[0] = qfprom_cdata[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	cdata[1] = qfprom_cdata[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	cdata[2] = qfprom_cdata[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	cdata[3] = qfprom_cdata[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	cdata[4] = qfprom_cdata[22];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	cdata[5] = qfprom_cdata[21];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	mode = (cdata[0] & MSM8939_CAL_SEL_MASK) >> MSM8939_CAL_SEL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	dev_dbg(priv->dev, "calibration mode is %d\n", mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	case TWO_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		base1 = (cdata[3] & MSM8939_BASE1_MASK) >> MSM8939_BASE1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		p2[0] = (cdata[0] & MSM8939_S0_P2_MASK) >> MSM8939_S0_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		p2[1] = (cdata[0] & MSM8939_S1_P2_MASK) >> MSM8939_S1_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		p2[2] = (cdata[1] & MSM8939_S2_P2_MASK) >> MSM8939_S2_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		p2[3] = (cdata[1] & MSM8939_S3_P2_MASK) >> MSM8939_S3_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		p2[4] = (cdata[1] & MSM8939_S4_P2_MASK) >> MSM8939_S4_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		p2[5] = (cdata[2] & MSM8939_S5_P2_MASK) >> MSM8939_S5_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		p2[6] = (cdata[2] & MSM8939_S6_P2_MASK) >> MSM8939_S6_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		p2[7] = (cdata[3] & MSM8939_S7_P2_MASK) >> MSM8939_S7_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		p2[8] = (cdata[3] & MSM8939_S8_P2_MASK) >> MSM8939_S8_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		p2[9] = (cdata[4] & MSM8939_S9_P2_MASK_0_4) >> MSM8939_S9_P2_SHIFT_0_4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		p2[9] |= ((cdata[5] & MSM8939_S9_P2_MASK_5) >> MSM8939_S9_P2_SHIFT_5) << 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		for (i = 0; i < priv->num_sensors; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 			p2[i] = (base1 + p2[i]) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	case ONE_PT_CALIB2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		base0 = (cdata[2] & MSM8939_BASE0_MASK) >> MSM8939_BASE0_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		p1[0] = (cdata[0] & MSM8939_S0_P1_MASK) >> MSM8939_S0_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		p1[1] = (cdata[0] & MSM8939_S1_P1_MASK) >> MSM8939_S1_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		p1[2] = (cdata[0] & MSM8939_S2_P1_MASK_0_4) >> MSM8939_S2_P1_SHIFT_0_4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		p1[2] |= ((cdata[1] & MSM8939_S2_P1_MASK_5) >> MSM8939_S2_P1_SHIFT_5) << 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		p1[3] = (cdata[1] & MSM8939_S3_P1_MASK) >> MSM8939_S3_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		p1[4] = (cdata[1] & MSM8939_S4_P1_MASK) >> MSM8939_S4_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		p1[5] = (cdata[2] & MSM8939_S5_P1_MASK) >> MSM8939_S5_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		p1[6] = (cdata[2] & MSM8939_S6_P1_MASK) >> MSM8939_S6_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		p1[7] = (cdata[3] & MSM8939_S7_P1_MASK) >> MSM8939_S7_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		p1[8] = (cdata[3] & MSM8939_S8_P1_MASK) >> MSM8939_S8_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		p1[9] = (cdata[4] & MSM8939_S9_P1_MASK) >> MSM8939_S9_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		for (i = 0; i < priv->num_sensors; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			p1[i] = ((base0) + p1[i]) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		for (i = 0; i < priv->num_sensors; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			p1[i] = 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			p2[i] = 780;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	compute_intercept_slope(priv, p1, p2, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	kfree(qfprom_cdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int calibrate_8974(struct tsens_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	int base1 = 0, base2 = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	u32 p1[11], p2[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	int mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	u32 *calib, *bkp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	u32 calib_redun_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	calib = (u32 *)qfprom_read(priv->dev, "calib");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	if (IS_ERR(calib))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		return PTR_ERR(calib);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	bkp = (u32 *)qfprom_read(priv->dev, "calib_backup");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	if (IS_ERR(bkp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		kfree(calib);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		return PTR_ERR(bkp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	calib_redun_sel =  bkp[1] & BKP_REDUN_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	calib_redun_sel >>= BKP_REDUN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	if (calib_redun_sel == BKP_SEL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		mode = (calib[4] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		mode |= (calib[5] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		case TWO_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			base2 = (bkp[2] & BASE2_BKP_MASK) >> BASE2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			p2[0] = (bkp[2] & S0_P2_BKP_MASK) >> S0_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 			p2[1] = (bkp[3] & S1_P2_BKP_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			p2[2] = (bkp[3] & S2_P2_BKP_MASK) >> S2_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			p2[3] = (bkp[3] & S3_P2_BKP_MASK) >> S3_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 			p2[4] = (bkp[3] & S4_P2_BKP_MASK) >> S4_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 			p2[5] = (calib[4] & S5_P2_BKP_MASK) >> S5_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 			p2[6] = (calib[5] & S6_P2_BKP_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 			p2[7] = (calib[5] & S7_P2_BKP_MASK) >> S7_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 			p2[8] = (calib[5] & S8_P2_BKP_MASK) >> S8_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 			p2[9] = (calib[5] & S9_P2_BKP_MASK) >> S9_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 			p2[10] = (calib[5] & S10_P2_BKP_MASK) >> S10_P2_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 			fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		case ONE_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		case ONE_PT_CALIB2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			base1 = bkp[0] & BASE1_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 			p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 			p1[4] = (bkp[1] & S4_P1_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 			p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 			p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 			p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		case TWO_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 			base2 = (calib[2] & BASE2_MASK) >> BASE2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 			p2[0] = (calib[2] & S0_P2_MASK) >> S0_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 			p2[1] = (calib[2] & S1_P2_MASK) >> S1_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 			p2[2] = (calib[3] & S2_P2_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 			p2[3] = (calib[3] & S3_P2_MASK) >> S3_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			p2[4] = (calib[3] & S4_P2_MASK) >> S4_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 			p2[5] = (calib[3] & S5_P2_MASK) >> S5_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 			p2[6] = (calib[3] & S6_P2_MASK) >> S6_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 			p2[7] = (calib[4] & S7_P2_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 			p2[8] = (calib[4] & S8_P2_MASK) >> S8_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 			p2[9] = (calib[4] & S9_P2_MASK) >> S9_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			p2[10] = (calib[4] & S10_P2_MASK) >> S10_P2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 			fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 		case ONE_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		case ONE_PT_CALIB2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 			base1 = calib[0] & BASE1_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			p1[0] = (calib[0] & S0_P1_MASK) >> S0_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 			p1[1] = (calib[0] & S1_P1_MASK) >> S1_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			p1[2] = (calib[0] & S2_P1_MASK) >> S2_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 			p1[3] = (calib[0] & S3_P1_MASK) >> S3_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 			p1[4] = (calib[1] & S4_P1_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 			p1[5] = (calib[1] & S5_P1_MASK) >> S5_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 			p1[6] = (calib[1] & S6_P1_MASK) >> S6_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 			p1[7] = (calib[1] & S7_P1_MASK) >> S7_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 			p1[8] = (calib[1] & S8_P1_MASK) >> S8_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 			p1[9] = (calib[2] & S9_P1_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 			p1[10] = (calib[2] & S10_P1_MASK) >> S10_P1_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	case ONE_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		for (i = 0; i < priv->num_sensors; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 			p1[i] += (base1 << 2) | BIT_APPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	case TWO_PT_CALIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		for (i = 0; i < priv->num_sensors; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 			p2[i] += base2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 			p2[i] <<= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 			p2[i] |= BIT_APPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	case ONE_PT_CALIB2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		for (i = 0; i < priv->num_sensors; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 			p1[i] += base1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 			p1[i] <<= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 			p1[i] |= BIT_APPEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		for (i = 0; i < priv->num_sensors; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 			p2[i] = 780;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		p1[0] = 502;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 		p1[1] = 509;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		p1[2] = 503;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 		p1[3] = 509;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		p1[4] = 505;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		p1[5] = 509;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		p1[6] = 507;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		p1[7] = 510;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 		p1[8] = 508;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		p1[9] = 509;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		p1[10] = 508;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	compute_intercept_slope(priv, p1, p2, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	kfree(calib);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	kfree(bkp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /* v0.1: 8916, 8939, 8974 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static struct tsens_features tsens_v0_1_feat = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	.ver_major	= VER_0_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	.crit_int	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	.adc		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	.srot_split	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	.max_sensors	= 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	/* ----- SROT ------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	/* No VERSION information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	/* CTRL_OFFSET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	[TSENS_EN]     = REG_FIELD(SROT_CTRL_OFF, 0,  0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1,  1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	/* ----- TM ------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	/* INTERRUPT ENABLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	/* UPPER/LOWER TEMPERATURE THRESHOLDS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH,    TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF,  0,  9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH,     TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	/* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR,  TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	/* NO CRITICAL INTERRUPT SUPPORT on v0.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	/* Sn_STATUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP,    TM_Sn_STATUS_OFF,  0,  9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	/* No VALID field on v0.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	/* xxx_STATUS bits: 1 == threshold violated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS,   TM_Sn_STATUS_OFF, 10, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	/* No CRITICAL field on v0.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS,   TM_Sn_STATUS_OFF, 13, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	/* TRDY: 1=ready, 0=in progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static const struct tsens_ops ops_8916 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	.init		= init_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	.calibrate	= calibrate_8916,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	.get_temp	= get_temp_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) struct tsens_plat_data data_8916 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	.num_sensors	= 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	.ops		= &ops_8916,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	.hw_ids		= (unsigned int []){0, 1, 2, 4, 5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	.feat		= &tsens_v0_1_feat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	.fields	= tsens_v0_1_regfields,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static const struct tsens_ops ops_8939 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	.init		= init_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	.calibrate	= calibrate_8939,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	.get_temp	= get_temp_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) struct tsens_plat_data data_8939 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	.num_sensors	= 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	.ops		= &ops_8939,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	.hw_ids		= (unsigned int []){ 0, 1, 2, 4, 5, 6, 7, 8, 9, 10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	.feat		= &tsens_v0_1_feat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	.fields	= tsens_v0_1_regfields,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static const struct tsens_ops ops_8974 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	.init		= init_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	.calibrate	= calibrate_8974,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	.get_temp	= get_temp_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct tsens_plat_data data_8974 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	.num_sensors	= 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	.ops		= &ops_8974,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	.feat		= &tsens_v0_1_feat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	.fields	= tsens_v0_1_regfields,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) };