^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Sonics Silicon Backplane SoC host related functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Subsystem core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2005, Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Licensed under the GNU/GPL. See COPYING for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ssb_private.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/bcm47xx_nvram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/ssb/ssb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static u8 ssb_host_soc_read8(struct ssb_device *dev, u16 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) return readb(bus->mmio + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static u16 ssb_host_soc_read16(struct ssb_device *dev, u16 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) return readw(bus->mmio + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static u32 ssb_host_soc_read32(struct ssb_device *dev, u16 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return readl(bus->mmio + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #ifdef CONFIG_SSB_BLOCKIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static void ssb_host_soc_block_read(struct ssb_device *dev, void *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) size_t count, u16 offset, u8 reg_width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) addr = bus->mmio + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) switch (reg_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case sizeof(u8): {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 *buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *buf = __raw_readb(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case sizeof(u16): {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) __le16 *buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) WARN_ON(count & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *buf = (__force __le16)__raw_readw(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) count -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case sizeof(u32): {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) __le32 *buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) WARN_ON(count & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *buf = (__force __le32)__raw_readl(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) count -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #endif /* CONFIG_SSB_BLOCKIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static void ssb_host_soc_write8(struct ssb_device *dev, u16 offset, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) writeb(value, bus->mmio + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static void ssb_host_soc_write16(struct ssb_device *dev, u16 offset, u16 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) writew(value, bus->mmio + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static void ssb_host_soc_write32(struct ssb_device *dev, u16 offset, u32 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) writel(value, bus->mmio + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef CONFIG_SSB_BLOCKIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static void ssb_host_soc_block_write(struct ssb_device *dev, const void *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) size_t count, u16 offset, u8 reg_width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct ssb_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) offset += dev->core_index * SSB_CORE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) addr = bus->mmio + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) switch (reg_width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case sizeof(u8): {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) const u8 *buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) __raw_writeb(*buf, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) case sizeof(u16): {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) const __le16 *buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) WARN_ON(count & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) __raw_writew((__force u16)(*buf), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) count -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case sizeof(u32): {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const __le32 *buf = buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) WARN_ON(count & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) __raw_writel((__force u32)(*buf), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) count -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #endif /* CONFIG_SSB_BLOCKIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) const struct ssb_bus_ops ssb_host_soc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .read8 = ssb_host_soc_read8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .read16 = ssb_host_soc_read16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .read32 = ssb_host_soc_read32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .write8 = ssb_host_soc_write8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .write16 = ssb_host_soc_write16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .write32 = ssb_host_soc_write32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #ifdef CONFIG_SSB_BLOCKIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .block_read = ssb_host_soc_block_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .block_write = ssb_host_soc_block_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int ssb_host_soc_get_invariants(struct ssb_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct ssb_init_invariants *iv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) char buf[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int len, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* Fill boardinfo structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) memset(&iv->boardinfo, 0, sizeof(struct ssb_boardinfo));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) len = bcm47xx_nvram_getenv("boardvendor", buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) err = kstrtou16(strim(buf), 0, &iv->boardinfo.vendor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) pr_warn("Couldn't parse nvram board vendor entry with value \"%s\"\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (!iv->boardinfo.vendor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) len = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) err = kstrtou16(strim(buf), 0, &iv->boardinfo.type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) pr_warn("Couldn't parse nvram board type entry with value \"%s\"\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ssb_fill_sprom_with_fallback(bus, &iv->sprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }