Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * OpenCores tiny SPI master driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * https://opencores.org/project,tiny_spi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2011 Thomas Chou <thomas@wytron.com.tw>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Based on spi_s3c24xx.c, which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (c) 2006 Ben Dooks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (c) 2006 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *	Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/spi/spi_bitbang.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/spi/spi_oc_tiny.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define DRV_NAME "spi_oc_tiny"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define TINY_SPI_RXDATA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define TINY_SPI_TXDATA 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define TINY_SPI_STATUS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define TINY_SPI_CONTROL 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define TINY_SPI_BAUD 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define TINY_SPI_STATUS_TXE 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define TINY_SPI_STATUS_TXR 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) struct tiny_spi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* bitbang has to be first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct spi_bitbang bitbang;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct completion done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	unsigned int freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	unsigned int baudwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	unsigned int baud;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	unsigned int speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	unsigned int txc, rxc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	const u8 *txp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u8 *rxp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static inline struct tiny_spi *tiny_spi_to_hw(struct spi_device *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	return spi_master_get_devdata(sdev->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static unsigned int tiny_spi_baud(struct spi_device *spi, unsigned int hz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct tiny_spi *hw = tiny_spi_to_hw(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	return min(DIV_ROUND_UP(hw->freq, hz * 2), (1U << hw->baudwidth)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static int tiny_spi_setup_transfer(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 				   struct spi_transfer *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct tiny_spi *hw = tiny_spi_to_hw(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	unsigned int baud = hw->baud;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	if (t) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		if (t->speed_hz && t->speed_hz != hw->speed_hz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			baud = tiny_spi_baud(spi, t->speed_hz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	writel(baud, hw->base + TINY_SPI_BAUD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	writel(hw->mode, hw->base + TINY_SPI_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int tiny_spi_setup(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct tiny_spi *hw = tiny_spi_to_hw(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (spi->max_speed_hz != hw->speed_hz) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		hw->speed_hz = spi->max_speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		hw->baud = tiny_spi_baud(spi, hw->speed_hz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	hw->mode = spi->mode & (SPI_CPOL | SPI_CPHA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static inline void tiny_spi_wait_txr(struct tiny_spi *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	while (!(readb(hw->base + TINY_SPI_STATUS) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		 TINY_SPI_STATUS_TXR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline void tiny_spi_wait_txe(struct tiny_spi *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	while (!(readb(hw->base + TINY_SPI_STATUS) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		 TINY_SPI_STATUS_TXE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int tiny_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct tiny_spi *hw = tiny_spi_to_hw(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	const u8 *txp = t->tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	u8 *rxp = t->rx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (hw->irq >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		/* use interrupt driven data transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		hw->len = t->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		hw->txp = t->tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		hw->rxp = t->rx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		hw->txc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		hw->rxc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		/* send the first byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		if (t->len > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			writeb(hw->txp ? *hw->txp++ : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			       hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			hw->txc++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 			writeb(hw->txp ? *hw->txp++ : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 			       hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			hw->txc++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			writeb(TINY_SPI_STATUS_TXR, hw->base + TINY_SPI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 			writeb(hw->txp ? *hw->txp++ : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			       hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			hw->txc++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			writeb(TINY_SPI_STATUS_TXE, hw->base + TINY_SPI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		wait_for_completion(&hw->done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		/* we need to tighten the transfer loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		writeb(txp ? *txp++ : 0, hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		for (i = 1; i < t->len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			writeb(txp ? *txp++ : 0, hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			if (rxp || (i != t->len - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 				tiny_spi_wait_txr(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			if (rxp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				*rxp++ = readb(hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		tiny_spi_wait_txe(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		if (rxp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			*rxp++ = readb(hw->base + TINY_SPI_RXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return t->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static irqreturn_t tiny_spi_irq(int irq, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	struct tiny_spi *hw = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	writeb(0, hw->base + TINY_SPI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (hw->rxc + 1 == hw->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		if (hw->rxp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			*hw->rxp++ = readb(hw->base + TINY_SPI_RXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		hw->rxc++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		complete(&hw->done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		if (hw->rxp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			*hw->rxp++ = readb(hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		hw->rxc++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		if (hw->txc < hw->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			writeb(hw->txp ? *hw->txp++ : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			       hw->base + TINY_SPI_TXDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			hw->txc++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			writeb(TINY_SPI_STATUS_TXR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			       hw->base + TINY_SPI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			writeb(TINY_SPI_STATUS_TXE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			       hw->base + TINY_SPI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int tiny_spi_of_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	struct tiny_spi *hw = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	hw->bitbang.master->dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (!of_property_read_u32(np, "clock-frequency", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		hw->freq = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (!of_property_read_u32(np, "baud-width", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		hw->baudwidth = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #else /* !CONFIG_OF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int tiny_spi_of_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #endif /* CONFIG_OF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int tiny_spi_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	struct tiny_spi_platform_data *platp = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	struct tiny_spi *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	int err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	master = spi_alloc_master(&pdev->dev, sizeof(struct tiny_spi));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (!master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	/* setup the master state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	master->bus_num = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	master->setup = tiny_spi_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	master->use_gpio_descriptors = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	hw = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	platform_set_drvdata(pdev, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	/* setup the state for the bitbang driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	hw->bitbang.master = master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	hw->bitbang.setup_transfer = tiny_spi_setup_transfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	hw->bitbang.txrx_bufs = tiny_spi_txrx_bufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	/* find and map our resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	hw->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	if (IS_ERR(hw->base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		err = PTR_ERR(hw->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	/* irq is optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	hw->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (hw->irq >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		init_completion(&hw->done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		err = devm_request_irq(&pdev->dev, hw->irq, tiny_spi_irq, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 				       pdev->name, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	/* find platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (platp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		hw->freq = platp->freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		hw->baudwidth = platp->baudwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		err = tiny_spi_of_probe(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	/* register our spi controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	err = spi_bitbang_start(&hw->bitbang);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	spi_master_put(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int tiny_spi_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct tiny_spi *hw = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct spi_master *master = hw->bitbang.master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	spi_bitbang_stop(&hw->bitbang);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	spi_master_put(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const struct of_device_id tiny_spi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	{ .compatible = "opencores,tiny-spi-rtlsvn2", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MODULE_DEVICE_TABLE(of, tiny_spi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #endif /* CONFIG_OF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static struct platform_driver tiny_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.probe = tiny_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.remove = tiny_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		.name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		.pm = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		.of_match_table = of_match_ptr(tiny_spi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) module_platform_driver(tiny_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MODULE_DESCRIPTION("OpenCores tiny SPI driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MODULE_ALIAS("platform:" DRV_NAME);