^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SPI master driver for ICP DAS LP-8841 RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Sergei Ianovich
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Dallas DS1302 RTC Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2002 David McCullough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (C) 2003 - 2007 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DRIVER_NAME "spi_lp8841_rtc"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SPI_LP8841_RTC_CE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SPI_LP8841_RTC_CLK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SPI_LP8841_RTC_nWE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SPI_LP8841_RTC_MOSI 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SPI_LP8841_RTC_MISO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * REVISIT If there is support for SPI_3WIRE and SPI_LSB_FIRST in SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * GPIO driver, this SPI driver can be replaced by a simple GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * providing 3 GPIO pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct spi_lp8841_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void *iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned long state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) setsck(struct spi_lp8841_rtc *data, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) data->state |= SPI_LP8841_RTC_CLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) data->state &= ~SPI_LP8841_RTC_CLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) writeb(data->state, data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) setmosi(struct spi_lp8841_rtc *data, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) data->state |= SPI_LP8841_RTC_MOSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) data->state &= ~SPI_LP8841_RTC_MOSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) writeb(data->state, data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) getmiso(struct spi_lp8841_rtc *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return ioread8(data->iomem) & SPI_LP8841_RTC_MISO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static inline u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) bitbang_txrx_be_cpha0_lsb(struct spi_lp8841_rtc *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned usecs, unsigned cpol, unsigned flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u32 word, u8 bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 shift = 32 - bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* clock starts at inactive polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) for (; likely(bits); bits--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* setup LSB (to slave) on leading edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if ((flags & SPI_MASTER_NO_TX) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) setmosi(data, (word & 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) usleep_range(usecs, usecs + 1); /* T(setup) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* sample LSB (from slave) on trailing edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) word >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if ((flags & SPI_MASTER_NO_RX) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) word |= (getmiso(data) << 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) setsck(data, !cpol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) usleep_range(usecs, usecs + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) setsck(data, cpol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) word >>= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) spi_lp8841_rtc_transfer_one(struct spi_master *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct spi_transfer *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct spi_lp8841_rtc *data = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned count = t->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) const u8 *tx = t->tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u8 *rx = t->rx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 word = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (tx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) data->state &= ~SPI_LP8841_RTC_nWE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) writeb(data->state, data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) while (likely(count > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) word = *tx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) bitbang_txrx_be_cpha0_lsb(data, 1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) SPI_MASTER_NO_RX, word, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) } else if (rx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) data->state |= SPI_LP8841_RTC_nWE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) writeb(data->state, data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) while (likely(count > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) word = bitbang_txrx_be_cpha0_lsb(data, 1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) SPI_MASTER_NO_TX, word, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *rx++ = word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) spi_finalize_current_transfer(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) spi_lp8841_rtc_set_cs(struct spi_device *spi, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct spi_lp8841_rtc *data = spi_master_get_devdata(spi->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) data->state = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) writeb(data->state, data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) usleep_range(4, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) data->state |= SPI_LP8841_RTC_CE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) writeb(data->state, data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) usleep_range(4, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) spi_lp8841_rtc_setup(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if ((spi->mode & SPI_CS_HIGH) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) dev_err(&spi->dev, "unsupported active low chip select\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if ((spi->mode & SPI_LSB_FIRST) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) dev_err(&spi->dev, "unsupported MSB first mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if ((spi->mode & SPI_3WIRE) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_err(&spi->dev, "unsupported wiring. 3 wires required\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct of_device_id spi_lp8841_rtc_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { .compatible = "icpdas,lp8841-spi-rtc" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MODULE_DEVICE_TABLE(of, spi_lp8841_rtc_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) spi_lp8841_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct spi_lp8841_rtc *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) master = spi_alloc_master(&pdev->dev, sizeof(*data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (!master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) platform_set_drvdata(pdev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) master->flags = SPI_MASTER_HALF_DUPLEX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) master->mode_bits = SPI_CS_HIGH | SPI_3WIRE | SPI_LSB_FIRST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) master->bus_num = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) master->num_chipselect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) master->setup = spi_lp8841_rtc_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) master->set_cs = spi_lp8841_rtc_set_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) master->transfer_one = spi_lp8841_rtc_transfer_one;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) master->bits_per_word_mask = SPI_BPW_MASK(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) master->dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) data = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) data->iomem = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ret = PTR_ERR_OR_ZERO(data->iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) dev_err(&pdev->dev, "failed to get IO address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) goto err_put_master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* register with the SPI framework */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = devm_spi_register_master(&pdev->dev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) dev_err(&pdev->dev, "cannot register spi master\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) goto err_put_master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) err_put_master:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) spi_master_put(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MODULE_ALIAS("platform:" DRIVER_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static struct platform_driver spi_lp8841_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .of_match_table = of_match_ptr(spi_lp8841_rtc_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .probe = spi_lp8841_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) module_platform_driver(spi_lp8841_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_DESCRIPTION("SPI master driver for ICP DAS LP-8841 RTC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_AUTHOR("Sergei Ianovich");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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