^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SPI master driver using generic bitbanged GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2006,2008 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2017 Linus Walleij
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/spi/spi_bitbang.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/spi/spi_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * This bitbanging SPI master driver should help make systems usable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * when a native hardware SPI engine is not available, perhaps because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * its driver isn't yet working or because the I/O pins it requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * are used for other purposes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * platform_device->driver_data ... points to spi_gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * spi->controller_state ... reserved for bitbang framework code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * spi->master->dev.driver_data ... points to spi_gpio->bitbang
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct spi_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct spi_bitbang bitbang;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct gpio_desc *sck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct gpio_desc *miso;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct gpio_desc *mosi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct gpio_desc **cs_gpios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Because the overhead of going through four GPIO procedure calls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * per transferred bit can make performance a problem, this code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * is set up so that you can use it in either of two ways:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * - The slow generic way: set up platform_data to hold the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * numbers used for MISO/MOSI/SCK, and issue procedure calls for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * each of them. This driver can handle several such busses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * - The quicker inlined way: only helps with platform GPIO code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * that inlines operations for constant GPIOs. This can give
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * you tight (fast!) inner loops, but each such bus needs a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * new driver. You'll define a new C file, with Makefile and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Kconfig support; the C code can be a total of six lines:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * #define DRIVER_NAME "myboard_spi2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * #define SPI_MISO_GPIO 119
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * #define SPI_MOSI_GPIO 120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * #define SPI_SCK_GPIO 121
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * #define SPI_N_CHIPSEL 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * #include "spi-gpio.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifndef DRIVER_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define DRIVER_NAME "spi_gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define GENERIC_BITBANG /* vs tight inlines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline struct spi_gpio *__pure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) spi_to_spi_gpio(const struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) const struct spi_bitbang *bang;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct spi_gpio *spi_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) bang = spi_master_get_devdata(spi->master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) spi_gpio = container_of(bang, struct spi_gpio, bitbang);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return spi_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* These helpers are in turn called by the bitbang inlines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static inline void setsck(const struct spi_device *spi, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) gpiod_set_value_cansleep(spi_gpio->sck, is_on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static inline void setmosi(const struct spi_device *spi, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static inline int getmiso(const struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (spi->mode & SPI_3WIRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return !!gpiod_get_value_cansleep(spi_gpio->mosi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return !!gpiod_get_value_cansleep(spi_gpio->miso);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * NOTE: this clocks "as fast as we can". It "should" be a function of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * requested device clock. Software overhead means we usually have trouble
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * reaching even one Mbit/sec (except when we can inline bitops), so for now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * we'll just assume we never need additional per-bit slowdowns.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define spidelay(nsecs) do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #include "spi-bitbang-txrx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * These functions can leverage inline expansion of GPIO calls to shrink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * costs for a txrx bit, often by factors of around ten (by instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * count). That is particularly visible for larger word sizes, but helps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * even with default 8-bit words.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * REVISIT overheads calling these functions for each word also have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * significant performance costs. Having txrx_bufs() calls that inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * the txrx_word() logic would help performance, e.g. on larger blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * used with flash storage or MMC/SD. There should also be ways to make
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * GCC be less stupid about reloading registers inside the I/O loops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * These functions do not call setmosi or getmiso if respective flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * call when such pin is not present or defined in the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * A separate set of callbacks is defined to get highest possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * speed in the generic case (when both MISO and MOSI lines are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * available), as optimiser will remove the checks when argument is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * constant.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) flags = spi->master->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) flags = spi->master->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) flags = spi->master->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) unsigned nsecs, u32 word, u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) flags = spi->master->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* set initial clock line level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (is_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Drive chip select line, if we have one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (spi_gpio->cs_gpios) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* SPI chip selects are normally active-low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int spi_gpio_setup(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct gpio_desc *cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * The CS GPIOs have already been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * initialized from the descriptor lookup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (spi_gpio->cs_gpios) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) cs = spi_gpio->cs_gpios[spi->chip_select];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (!spi->controller_state && cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) status = gpiod_direction_output(cs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) !(spi->mode & SPI_CS_HIGH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (!status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) status = spi_bitbang_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static int spi_gpio_set_direction(struct spi_device *spi, bool output)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (output)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return gpiod_direction_output(spi_gpio->mosi, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = gpiod_direction_input(spi_gpio->mosi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * Send a turnaround high impedance cycle when switching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * from output to input. Theoretically there should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * a clock delay here, but as has been noted above, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * nsec delay function for bit-banged GPIO is simply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * {} because bit-banging just doesn't get fast enough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (spi->mode & SPI_3WIRE_HIZ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) gpiod_set_value_cansleep(spi_gpio->sck,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) !(spi->mode & SPI_CPOL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) gpiod_set_value_cansleep(spi_gpio->sck,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) !!(spi->mode & SPI_CPOL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static void spi_gpio_cleanup(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) spi_bitbang_cleanup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * It can be convenient to use this driver with pins that have alternate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * functions associated with a "native" SPI controller if a driver for that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * controller is not available, or is missing important functionality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * On platforms which can do so, configure MISO with a weak pullup unless
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * there's an external pullup on that signal. That saves power by avoiding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * floating signals. (A weak pulldown would save power too, but many
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * drivers expect to see all-ones data as the no slave "response".)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (IS_ERR(spi_gpio->mosi))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return PTR_ERR(spi_gpio->mosi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (IS_ERR(spi_gpio->miso))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return PTR_ERR(spi_gpio->miso);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return PTR_ERR_OR_ZERO(spi_gpio->sck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const struct of_device_id spi_gpio_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) { .compatible = "spi-gpio" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static int spi_gpio_probe_dt(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct spi_master *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) master->dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) master->use_gpio_descriptors = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static inline int spi_gpio_probe_dt(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct spi_master *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int spi_gpio_probe_pdata(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct spi_master *master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #ifdef GENERIC_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (!pdata || !pdata->num_chipselect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * The master needs to think there is a chipselect even if not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * connected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) master->num_chipselect = pdata->num_chipselect ?: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) sizeof(*spi_gpio->cs_gpios),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (!spi_gpio->cs_gpios)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) for (i = 0; i < master->num_chipselect; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (IS_ERR(spi_gpio->cs_gpios[i]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return PTR_ERR(spi_gpio->cs_gpios[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static int spi_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct spi_gpio *spi_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct spi_bitbang *bb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) master = devm_spi_alloc_master(dev, sizeof(*spi_gpio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (!master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (pdev->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) status = spi_gpio_probe_dt(pdev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) status = spi_gpio_probe_pdata(pdev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) spi_gpio = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) status = spi_gpio_request(dev, spi_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SPI_CS_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (!spi_gpio->mosi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* HW configuration without MOSI pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * No setting SPI_MASTER_NO_RX here - if there is only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) * a MOSI pin connected the host can still do RX by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * changing the direction of the line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) master->flags = SPI_MASTER_NO_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) master->bus_num = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) master->setup = spi_gpio_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) master->cleanup = spi_gpio_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) bb = &spi_gpio->bitbang;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) bb->master = master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * There is some additional business, apart from driving the CS GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * line, that we need to do on selection. This makes the local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * callback for chipselect always get called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) master->flags |= SPI_MASTER_GPIO_SS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) bb->chipselect = spi_gpio_chipselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) bb->set_line_direction = spi_gpio_set_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (master->flags & SPI_MASTER_NO_TX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) bb->setup_transfer = spi_bitbang_setup_transfer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) status = spi_bitbang_init(&spi_gpio->bitbang);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return devm_spi_register_master(&pdev->dev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) MODULE_ALIAS("platform:" DRIVER_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static struct platform_driver spi_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .of_match_table = of_match_ptr(spi_gpio_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .probe = spi_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) module_platform_driver(spi_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) MODULE_AUTHOR("David Brownell");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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