Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Freescale SPI controller driver cpm functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Maintainer: Kumar Gala
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2006 Polycom, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright 2010 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * CPM SPI and QE buffer descriptors mode support:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Copyright (c) 2009  MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifndef __SPI_FSL_CPM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define __SPI_FSL_CPM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "spi-fsl-lib.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #ifdef CONFIG_FSL_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern int fsl_spi_cpm_bufs(struct mpc8xxx_spi *mspi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 			    struct spi_transfer *t, bool is_dma_mapped);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) extern void fsl_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) extern void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) extern int fsl_spi_cpm_init(struct mpc8xxx_spi *mspi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) extern void fsl_spi_cpm_free(struct mpc8xxx_spi *mspi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static inline void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static inline int fsl_spi_cpm_bufs(struct mpc8xxx_spi *mspi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 				   struct spi_transfer *t,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 				   bool is_dma_mapped) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static inline void fsl_spi_cpm_bufs_complete(struct mpc8xxx_spi *mspi) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static inline int fsl_spi_cpm_init(struct mpc8xxx_spi *mspi) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static inline void fsl_spi_cpm_free(struct mpc8xxx_spi *mspi) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #endif /* __SPI_FSL_CPM_H__ */