Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  CLPS711X SPI bus driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mfd/syscon/clps711x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define DRIVER_NAME		"clps711x-spi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define SYNCIO_FRMLEN(x)	((x) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define SYNCIO_TXFRMEN		(1 << 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct spi_clps711x_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	void __iomem		*syncio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct regmap		*syscon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct clk		*spi_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	u8			*tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	u8			*rx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	unsigned int		bpw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	int			len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static int spi_clps711x_prepare_message(struct spi_master *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 					struct spi_message *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct spi_device *spi = msg->spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	/* Setup mode for transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 				  (spi->mode & SPI_CPHA) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 				  SYSCON3_ADCCKNSEN : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static int spi_clps711x_transfer_one(struct spi_master *master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 				     struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 				     struct spi_transfer *xfer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	clk_set_rate(hw->spi_clk, xfer->speed_hz ? : spi->max_speed_hz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	hw->len = xfer->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	hw->bpw = xfer->bits_per_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	hw->tx_buf = (u8 *)xfer->tx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	hw->rx_buf = (u8 *)xfer->rx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	/* Initiate transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	data = hw->tx_buf ? *hw->tx_buf++ : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct spi_master *master = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u8 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	/* Handle RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	data = readb(hw->syncio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (hw->rx_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		*hw->rx_buf++ = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	/* Handle TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	if (--hw->len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		data = hw->tx_buf ? *hw->tx_buf++ : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		       hw->syncio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		spi_finalize_current_transfer(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int spi_clps711x_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	struct spi_clps711x_data *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	master = spi_alloc_master(&pdev->dev, sizeof(*hw));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (!master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	master->use_gpio_descriptors = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	master->bus_num = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	master->bits_per_word_mask =  SPI_BPW_RANGE_MASK(1, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	master->dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	master->prepare_message = spi_clps711x_prepare_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	master->transfer_one = spi_clps711x_transfer_one;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	hw = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	hw->spi_clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	if (IS_ERR(hw->spi_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		ret = PTR_ERR(hw->spi_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	hw->syscon =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		syscon_regmap_lookup_by_compatible("cirrus,ep7209-syscon3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (IS_ERR(hw->syscon)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		ret = PTR_ERR(hw->syscon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	hw->syncio = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (IS_ERR(hw->syncio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		ret = PTR_ERR(hw->syncio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* Disable extended mode due hardware problems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	/* Clear possible pending interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	readl(hw->syncio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			       dev_name(&pdev->dev), master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	ret = devm_spi_register_master(&pdev->dev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	spi_master_put(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const struct of_device_id clps711x_spi_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	{ .compatible = "cirrus,ep7209-spi", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MODULE_DEVICE_TABLE(of, clps711x_spi_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static struct platform_driver clps711x_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		.name	= DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		.of_match_table = clps711x_spi_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.probe	= spi_clps711x_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) module_platform_driver(clps711x_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MODULE_DESCRIPTION("CLPS711X SPI bus driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MODULE_ALIAS("platform:" DRIVER_NAME);