^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Cavium ThunderX SPI driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Cavium Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Authors: Jan Glauber <jglauber@cavium.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "spi-cavium.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define DRV_NAME "spi-thunderx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define SYS_FREQ_DEFAULT 700000000 /* 700 Mhz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int thunderx_spi_probe(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct spi_master *master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct octeon_spi *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) master = spi_alloc_master(dev, sizeof(struct octeon_spi));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) if (!master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) p = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ret = pcim_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ret = pci_request_regions(pdev, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) p->register_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (!p->register_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) p->regs.config = 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) p->regs.status = 0x1008;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) p->regs.tx = 0x1010;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) p->regs.data = 0x1080;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) p->clk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (IS_ERR(p->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ret = PTR_ERR(p->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ret = clk_prepare_enable(p->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) p->sys_freq = clk_get_rate(p->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (!p->sys_freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) p->sys_freq = SYS_FREQ_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) dev_info(dev, "Set system clock to %u\n", p->sys_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) master->flags = SPI_MASTER_HALF_DUPLEX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) master->num_chipselect = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) SPI_LSB_FIRST | SPI_3WIRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) master->transfer_one_message = octeon_spi_transfer_one_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) master->bits_per_word_mask = SPI_BPW_MASK(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) master->dev.of_node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) pci_set_drvdata(pdev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ret = devm_spi_register_master(dev, master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) clk_disable_unprepare(p->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) spi_master_put(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void thunderx_spi_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct spi_master *master = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct octeon_spi *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) p = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (!p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) clk_disable_unprepare(p->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Put everything in a known state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) writeq(0, p->register_base + OCTEON_SPI_CFG(p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const struct pci_device_id thunderx_spi_pci_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa00b) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MODULE_DEVICE_TABLE(pci, thunderx_spi_pci_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static struct pci_driver thunderx_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .id_table = thunderx_spi_pci_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .probe = thunderx_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .remove = thunderx_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) module_pci_driver(thunderx_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_DESCRIPTION("Cavium, Inc. ThunderX SPI bus driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MODULE_AUTHOR("Jan Glauber");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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