Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * parport-to-butterfly adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2005 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/parport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/spi/spi_bitbang.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/spi/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * This uses SPI to talk with an "AVR Butterfly", which is a $US20 card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * with a battery powered AVR microcontroller and lots of goodies.  You
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * can use GCC to develop firmware for this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * See Documentation/spi/butterfly.rst for information about how to build
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * and use this custom parallel port cable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* DATA output bits (pins 2..9 == D0..D7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define	butterfly_nreset (1 << 1)		/* pin 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define	spi_sck_bit	(1 << 0)		/* pin 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define	spi_mosi_bit	(1 << 7)		/* pin 9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define	vcc_bits	((1 << 6) | (1 << 5))	/* pins 7, 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* STATUS input bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define	spi_miso_bit	PARPORT_STATUS_BUSY	/* pin 11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /* CONTROL output bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define	spi_cs_bit	PARPORT_CONTROL_SELECT	/* pin 17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) static inline struct butterfly *spidev_to_pp(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	return spi->controller_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) struct butterfly {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	/* REVISIT ... for now, this must be first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct spi_bitbang	bitbang;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct parport		*port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct pardevice	*pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u8			lastbyte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct spi_device	*dataflash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct spi_device	*butterfly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct spi_board_info	info[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) setsck(struct spi_device *spi, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct butterfly	*pp = spidev_to_pp(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u8			bit, byte = pp->lastbyte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	bit = spi_sck_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		byte |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		byte &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	parport_write_data(pp->port, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	pp->lastbyte = byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) setmosi(struct spi_device *spi, int is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	struct butterfly	*pp = spidev_to_pp(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	u8			bit, byte = pp->lastbyte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	bit = spi_mosi_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (is_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		byte |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		byte &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	parport_write_data(pp->port, byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	pp->lastbyte = byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static inline int getmiso(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	struct butterfly	*pp = spidev_to_pp(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	int			value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	u8			bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	bit = spi_miso_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	/* only STATUS_BUSY is NOT negated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	value = !(parport_read_status(pp->port) & bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return (bit == PARPORT_STATUS_BUSY) ? value : !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void butterfly_chipselect(struct spi_device *spi, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct butterfly	*pp = spidev_to_pp(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	/* set default clock polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (value != BITBANG_CS_INACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		setsck(spi, spi->mode & SPI_CPOL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	/* here, value == "activate or not";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 * most PARPORT_CONTROL_* bits are negated, so we must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	 * morph it to value == "bit value to write in control register"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (spi_cs_bit == PARPORT_CONTROL_INIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		value = !value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	parport_frob_control(pp->port, spi_cs_bit, value ? spi_cs_bit : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* we only needed to implement one mode here, and choose SPI_MODE_0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define spidelay(X)	do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* #define spidelay	ndelay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #include "spi-bitbang-txrx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) butterfly_txrx_word_mode0(struct spi_device *spi, unsigned nsecs, u32 word,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			  u8 bits, unsigned flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /*----------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* override default partitioning with cmdlinepart */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct mtd_partition partitions[] = { {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	/* JFFS2 wants partitions of 4*N blocks for this device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	 * so sectors 0 and 1 can't be partitions by themselves.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	/* sector 0 = 8 pages * 264 bytes/page (1 block)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	 * sector 1 = 248 pages * 264 bytes/page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.name		= "bookkeeping",	/* 66 KB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	.offset		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.size		= (8 + 248) * 264,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	/* .mask_flags	= MTD_WRITEABLE, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	/* sector 2 = 256 pages * 264 bytes/page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	 * sectors 3-5 = 512 pages * 264 bytes/page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	.name		= "filesystem",		/* 462 KB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.size		= MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static struct flash_platform_data flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.name		= "butterflash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.parts		= partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.nr_parts	= ARRAY_SIZE(partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* REVISIT remove this ugly global and its "only one" limitation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static struct butterfly *butterfly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void butterfly_attach(struct parport *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct pardevice	*pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int			status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	struct butterfly	*pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct spi_master	*master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct device		*dev = p->physport->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct pardev_cb	butterfly_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (butterfly || !dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	/* REVISIT:  this just _assumes_ a butterfly is there ... no probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	 * and no way to be selective about what it binds to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	master = spi_alloc_master(dev, sizeof(*pp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (!master) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		status = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	pp = spi_master_get_devdata(master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	 * SPI and bitbang hookup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 * use default setup(), cleanup(), and transfer() methods; and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 * only bother implementing mode 0.  Start it later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	master->bus_num = 42;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	master->num_chipselect = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	pp->bitbang.master = master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	pp->bitbang.chipselect = butterfly_chipselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	pp->bitbang.txrx_word[SPI_MODE_0] = butterfly_txrx_word_mode0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	 * parport hookup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	pp->port = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	memset(&butterfly_cb, 0, sizeof(butterfly_cb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	butterfly_cb.private = pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	pd = parport_register_dev_model(p, "spi_butterfly", &butterfly_cb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (!pd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		status = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		goto clean0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	pp->pd = pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	status = parport_claim(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		goto clean1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	 * Butterfly reset, powerup, run firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	pr_debug("%s: powerup/reset Butterfly\n", p->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	/* nCS for dataflash (this bit is inverted on output) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	parport_frob_control(pp->port, spi_cs_bit, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	/* stabilize power with chip in reset (nRESET), and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	 * spi_sck_bit clear (CPOL=0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	pp->lastbyte |= vcc_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	parport_write_data(pp->port, pp->lastbyte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	msleep(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	/* take it out of reset; assume long reset delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	pp->lastbyte |= butterfly_nreset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	parport_write_data(pp->port, pp->lastbyte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	 * Start SPI ... for now, hide that we're two physical busses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	status = spi_bitbang_start(&pp->bitbang);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		goto clean2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	/* Bus 1 lets us talk to at45db041b (firmware disables AVR SPI), AVR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	 * (firmware resets at45, acts as spi slave) or neither (we ignore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	 * both, AVR uses AT45).  Here we expect firmware for the first option.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	pp->info[0].max_speed_hz = 15 * 1000 * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	strcpy(pp->info[0].modalias, "mtd_dataflash");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	pp->info[0].platform_data = &flash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	pp->info[0].chip_select = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	pp->info[0].controller_data = pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	pp->dataflash = spi_new_device(pp->bitbang.master, &pp->info[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (pp->dataflash)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		pr_debug("%s: dataflash at %s\n", p->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			 dev_name(&pp->dataflash->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	pr_info("%s: AVR Butterfly\n", p->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	butterfly = pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) clean2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	/* turn off VCC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	parport_write_data(pp->port, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	parport_release(pp->pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) clean1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	parport_unregister_device(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) clean0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	spi_master_put(pp->bitbang.master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	pr_debug("%s: butterfly probe, fail %d\n", p->name, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static void butterfly_detach(struct parport *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct butterfly	*pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	/* FIXME this global is ugly ... but, how to quickly get from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	 * the parport to the "struct butterfly" associated with it?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	 * "old school" driver-internal device lists?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	if (!butterfly || butterfly->port != p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	pp = butterfly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	butterfly = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	/* stop() unregisters child devices too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	spi_bitbang_stop(&pp->bitbang);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	/* turn off VCC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	parport_write_data(pp->port, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	parport_release(pp->pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	parport_unregister_device(pp->pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	spi_master_put(pp->bitbang.master);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct parport_driver butterfly_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.name =		"spi_butterfly",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.match_port =	butterfly_attach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	.detach =	butterfly_detach,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.devmodel = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static int __init butterfly_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	return parport_register_driver(&butterfly_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) device_initcall(butterfly_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static void __exit butterfly_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	parport_unregister_driver(&butterfly_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) module_exit(butterfly_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MODULE_DESCRIPTION("Parport Adapter driver for AVR Butterfly");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MODULE_LICENSE("GPL");