^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) # SPI driver configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) menuconfig SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) bool "SPI support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) The "Serial Peripheral Interface" is a low level synchronous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) protocol. Chips that support SPI can have data transfer rates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) up to several tens of Mbit/sec. Chips are addressed with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) controller and a chipselect. Most SPI slaves don't support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) dynamic device discovery; some are even write-only or read-only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) SPI is widely used by microcontrollers to talk with sensors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) eeprom and flash memory, codecs and various other controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) chips, analog to digital (and d-to-a) converters, and more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MMC and SD cards can be accessed using SPI protocol; and for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) DataFlash cards used in MMC sockets, SPI must always be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SPI is one of a family of similar protocols using a four wire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) interface (select, clock, data in, data out) including Microwire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) (half duplex), SSP, SSI, and PSP. This driver framework should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) work with most such devices and controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) if SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) config SPI_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) bool "Debug support for SPI drivers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) depends on DEBUG_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) sysfs, and debugfs support in SPI controller and protocol drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) # MASTER side ... talking to discrete SPI slave chips including microcontrollers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) config SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) # bool "SPI Master Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) default SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) If your system has an master-capable SPI controller (which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) provides the clock and chipselect), you can enable that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) controller and the protocol drivers for the SPI slave chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) that are connected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) config SPI_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) bool "SPI memory extension"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Enable this option if you want to enable the SPI memory extension.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) This extension is meant to simplify interaction with SPI memories
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) by providing a high-level interface to send memory-like commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) comment "SPI Master Controller Drivers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) config SPI_ALTERA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) tristate "Altera SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) select REGMAP_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) This is the driver for the Altera SPI Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) config SPI_AR934X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) depends on ATH79 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) This enables support for the SPI controller present on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) Qualcomm Atheros AR934X/QCA95XX SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) config SPI_ATH79
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) depends on ATH79 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) This enables support for the SPI controller present on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) Atheros AR71XX/AR724X/AR913X SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) config SPI_ARMADA_3700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) tristate "Marvell Armada 3700 SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) depends on (ARCH_MVEBU && OF) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) This enables support for the SPI controller present on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) Marvell Armada 3700 SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) config SPI_ATMEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) tristate "Atmel SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) depends on ARCH_AT91 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) This selects a driver for the Atmel SPI Controller, present on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) many AT91 ARM chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) config SPI_AT91_USART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) tristate "Atmel USART Controller SPI driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) depends on (ARCH_AT91 || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) depends on MFD_AT91_USART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) This selects a driver for the AT91 USART Controller as SPI Master,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) present on AT91 and SAMA5 SoC series.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) config SPI_ATMEL_QUADSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) tristate "Atmel Quad SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) depends on ARCH_AT91 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) depends on OF && HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) This enables support for the Quad SPI controller in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) This driver does not support generic SPI. The implementation only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) supports spi-mem interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) config SPI_AU1550
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) tristate "Au1550/Au1200/Au1300 SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) depends on MIPS_ALCHEMY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) If you say yes to this option, support will be included for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PSC SPI controller found on Au1550, Au1200 and Au1300 series.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) config SPI_AXI_SPI_ENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) tristate "Analog Devices AXI SPI Engine controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) This enables support for the Analog Devices AXI SPI Engine SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) It is part of the SPI Engine framework that is used in some Analog Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) reference designs for FPGAs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) config SPI_BCM2835
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) tristate "BCM2835 SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) depends on GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) This selects a driver for the Broadcom BCM2835 SPI master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) The BCM2835 contains two types of SPI master controller; the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) "universal SPI master", and the regular SPI controller. This driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) is for the regular SPI controller. Slave mode operation is not also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) not supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) config SPI_BCM2835AUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) tristate "BCM2835 SPI auxiliary controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) depends on ((ARCH_BCM2835 || ARCH_BRCMSTB) && GPIOLIB) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) This selects a driver for the Broadcom BCM2835 SPI aux master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) The BCM2835 contains two types of SPI master controller; the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) "universal SPI master", and the regular SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) This driver is for the universal/auxiliary SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) config SPI_BCM63XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) tristate "Broadcom BCM63xx SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) config SPI_BCM63XX_HSSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) tristate "Broadcom BCM63XX HS SPI controller driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) depends on BCM63XX || BMIPS_GENERIC || ARCH_BCM_63XX || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) This enables support for the High Speed SPI controller present on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) newer Broadcom BCM63XX SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) config SPI_BCM_QSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) tristate "Broadcom BSPI and MSPI controller support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) BMIPS_GENERIC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) default ARCH_BCM_IPROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) Enables support for the Broadcom SPI flash and MSPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) based platforms. This driver works for both SPI master for SPI NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) flash device as well as MSPI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) config SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) tristate "Utilities for Bitbanging SPI masters"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) With a few GPIO pins, your system can bitbang the SPI protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) Select this to get SPI support through I/O pins (GPIO, parallel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) port, etc). Or, some systems' SPI master controller drivers use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) this code to manage the per-word or per-transfer accesses to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) hardware shift registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) This is library code, and is automatically selected by drivers that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) need it. You only need to select this explicitly to support driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) modules that aren't part of this kernel tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) config SPI_BUTTERFLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) depends on PARPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) This uses a custom parallel port cable to connect to an AVR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) Butterfly <http://www.atmel.com/products/avr/butterfly>, an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) inexpensive battery powered microcontroller evaluation board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) This same cable can be used to flash new firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) config SPI_CADENCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) tristate "Cadence SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) This selects the Cadence SPI controller master driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) used by Xilinx Zynq and ZynqMP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) config SPI_CADENCE_QUADSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) tristate "Cadence Quad SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) depends on OF && (ARM || ARM64 || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) Enable support for the Cadence Quad SPI Flash controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) Cadence QSPI is a specialized controller for connecting an SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) Flash over 1/2/4-bit wide bus. Enable this option if you have a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) device with a Cadence QSPI controller and want to access the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) Flash as an MTD device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) config SPI_CLPS711X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) tristate "CLPS711X host SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) depends on ARCH_CLPS711X || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) This enables dedicated general purpose SPI/Microwire1-compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) master mode interface (SSI1) for CLPS711X-based CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) config SPI_COLDFIRE_QSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) tristate "Freescale Coldfire QSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) This enables support for the Coldfire QSPI controller in master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) config SPI_DAVINCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) depends on ARCH_DAVINCI || ARCH_KEYSTONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) config SPI_DESIGNWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) tristate "DesignWare SPI controller core support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) imply SPI_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) general driver for SPI controller core from DesignWare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if SPI_DESIGNWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) config SPI_DW_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) bool "DMA support for DW SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) config SPI_DW_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) tristate "PCI interface driver for DW SPI core"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) config SPI_DW_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) tristate "Memory-mapped io interface driver for DW SPI core"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) config SPI_DW_BT1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) tristate "Baikal-T1 SPI driver for DW SPI core"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) depends on MIPS_BAIKAL_T1 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) select MULTIPLEXER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) select MUX_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) controllers. Two of them are pretty much normal: with IRQ, DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) FIFOs of 64 words depth, 4x CSs, but the third one as being a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) part of the Baikal-T1 System Boot Controller has got a very
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) limited resources: no IRQ, no DMA, only a single native
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) chip-select and Tx/Rx FIFO with just 8 words depth available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) The later one is normally connected to an external SPI-nor flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) of 128Mb (in general can be of bigger size).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) config SPI_DW_BT1_DIRMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) bool "Directly mapped Baikal-T1 Boot SPI flash support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) depends on SPI_DW_BT1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) Directly mapped SPI flash memory is an interface specific to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) Baikal-T1 System Boot Controller. It is a 16MB MMIO region, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) can be used to access a peripheral memory device just by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) reading/writing data from/to it. Note that the system APB bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) will stall during each IO from/to the dirmap region until the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) operation is finished. So try not to use it concurrently with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) time-critical tasks (like the SPI memory operations implemented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) in this driver).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) config SPI_DLN2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) tristate "Diolan DLN-2 USB SPI adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) depends on MFD_DLN2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) If you say yes to this option, support will be included for Diolan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) DLN2, a USB to SPI interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) This driver can also be built as a module. If so, the module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) will be called spi-dln2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) config SPI_EFM32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) tristate "EFM32 SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) Driver for the spi controller found on Energy Micro's EFM32 SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) config SPI_EP93XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) tristate "Cirrus Logic EP93xx SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) depends on ARCH_EP93XX || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) This enables using the Cirrus EP93xx SPI controller in master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) config SPI_FALCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) bool "Falcon SPI controller support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) depends on SOC_FALCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) The external bus unit (EBU) found on the FALC-ON SoC has SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) emulation that is designed for serial flash access. This driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) has only been tested with m25p80 type chips. The hardware has no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) support for other types of SPI peripherals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) config SPI_FSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) tristate "FSI SPI driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) depends on FSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) This enables support for the driver for FSI bus attached SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) config SPI_FSL_LPSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) tristate "Freescale i.MX LPSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) depends on ARCH_MXC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) This enables Freescale i.MX LPSPI controllers in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) config SPI_FSL_QUADSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) tristate "Freescale QSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) This enables support for the Quad SPI controller in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) Up to four flash chips can be connected on two buses with two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) chipselects each.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) This controller does not support generic SPI messages. It only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) supports the high-level SPI memory interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) config SPI_HISI_SFC_V3XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) depends on (ARM64 && ACPI) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) This enables support for HiSilicon v3xx SPI NOR flash controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) found in hi16xx chipsets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) config SPI_NXP_FLEXSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) tristate "NXP Flex SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) depends on ARCH_LAYERSCAPE || HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) This enables support for the Flex SPI controller in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) Up to four slave devices can be connected on two buses with two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) chipselects each.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) This controller does not support generic SPI messages and only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) supports the high-level SPI memory interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) config SPI_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) tristate "GPIO-based bitbanging SPI Master"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) depends on GPIOLIB || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) slaves connected to a bus using this driver are configured as usual,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) except that the spi_board_info.controller_data holds the GPIO number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) for the chipselect used by this controller driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) Note that this driver often won't achieve even 1 Mbit/sec speeds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) making it unusually slow for SPI. If your platform can inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) GPIO operations, you should be able to leverage that for better
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) speed with a custom version of this driver; see the source code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) config SPI_IMG_SPFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) tristate "IMG SPFI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) depends on MIPS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) This enables support for the SPFI master controller found on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) IMG SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) config SPI_IMX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) tristate "Freescale i.MX SPI controllers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) depends on ARCH_MXC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) This enables support for the Freescale i.MX SPI controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) config SPI_JCORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) tristate "J-Core SPI Master"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) depends on OF && (SUPERH || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) This enables support for the SPI master controller in the J-Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) synthesizable, open source SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) config SPI_LM70_LLP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) depends on PARPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) This driver supports the NS LM70 LLP Evaluation Board,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) which interfaces to an LM70 temperature sensor using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) a parallel port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) config SPI_LP8841_RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) tristate "ICP DAS LP-8841 SPI Controller for RTC"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) depends on MACH_PXA27X_DT || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) This driver provides an SPI master device to drive Maxim
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) DS-1302 real time clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) Say N here unless you plan to run the kernel on an ICP DAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) LP-8x4x industrial computer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) config SPI_MPC52xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) tristate "Freescale MPC52xx SPI (non-PSC) controller support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) depends on PPC_MPC52xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) This drivers supports the MPC52xx SPI controller in master SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) config SPI_MPC52xx_PSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) tristate "Freescale MPC52xx PSC SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) depends on PPC_MPC52xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) This enables using the Freescale MPC52xx Programmable Serial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) Controller in master SPI mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) config SPI_MPC512x_PSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) tristate "Freescale MPC512x PSC SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) depends on PPC_MPC512x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) This enables using the Freescale MPC5121 Programmable Serial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) Controller in SPI master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) config SPI_FSL_LIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) tristate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) config SPI_FSL_CPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) tristate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) depends on FSL_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) config SPI_FSL_SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) select SPI_FSL_LIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) select SPI_FSL_CPM if FSL_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) This enables using the Freescale SPI controllers in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) MPC83xx platform uses the controller in cpu mode or CPM/QE mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) MPC8569 uses the controller in QE mode, MPC8610 in cpu mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) This also enables using the Aeroflex Gaisler GRLIB SPI controller in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) config SPI_FSL_DSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) tristate "Freescale DSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) select REGMAP_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) This enables support for the Freescale DSPI controller in master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) mode. VF610, LS1021A and ColdFire platforms uses the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) config SPI_FSL_ESPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) tristate "Freescale eSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) depends on FSL_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) This enables using the Freescale eSPI controllers in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) From MPC8536, 85xx platform uses the controller, and all P10xx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) P20xx, P30xx,P40xx, P50xx uses this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) config SPI_MESON_SPICC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) tristate "Amlogic Meson SPICC controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) depends on COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) depends on ARCH_MESON || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) This enables master mode support for the SPICC (SPI communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) controller) available in Amlogic Meson SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) config SPI_MESON_SPIFC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) tristate "Amlogic Meson SPIFC controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) depends on ARCH_MESON || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) select REGMAP_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) This enables master mode support for the SPIFC (SPI flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) controller) available in Amlogic Meson SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) config SPI_MT65XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) tristate "MediaTek SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) depends on ARCH_MEDIATEK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) This selects the MediaTek(R) SPI bus driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) If you want to use MediaTek(R) SPI interface,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) say Y or M here.If you are not sure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) config SPI_MT7621
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) tristate "MediaTek MT7621 SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) depends on RALINK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) This selects a driver for the MediaTek MT7621 SPI Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) config SPI_MTK_NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) tristate "MediaTek SPI NOR controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) depends on ARCH_MEDIATEK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) This enables support for SPI NOR controller found on MediaTek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ARM SoCs. This is a controller specifically for SPI NOR flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) It can perform generic SPI transfers up to 6 bytes via generic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) SPI interface as well as several SPI NOR specific instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) via SPI MEM interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) config SPI_NPCM_FIU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) tristate "Nuvoton NPCM FLASH Interface Unit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) depends on ARCH_NPCM || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) depends on OF && HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) This enables support for the Flash Interface Unit SPI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) This driver does not support generic SPI. The implementation only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) supports spi-mem interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) config SPI_NPCM_PSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) tristate "Nuvoton NPCM PSPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) depends on ARCH_NPCM || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) This driver provides support for Nuvoton NPCM BMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) Peripheral SPI controller in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) config SPI_LANTIQ_SSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) tristate "Lantiq SSC SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) depends on LANTIQ || X86 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) This driver supports the Lantiq SSC SPI controller in master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) mode. This controller is found on Intel (former Lantiq) SoCs like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) the Danube, Falcon, xRX200, xRX300, Lightning Mountain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) config SPI_OC_TINY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) tristate "OpenCores tiny SPI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) depends on GPIOLIB || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) This is the driver for OpenCores tiny SPI master controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) config SPI_OCTEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) tristate "Cavium OCTEON SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) depends on CAVIUM_OCTEON_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) SPI host driver for the hardware found on some Cavium OCTEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) config SPI_OMAP_UWIRE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) tristate "OMAP1 MicroWire"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) depends on ARCH_OMAP1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) This hooks up to the MicroWire controller on OMAP1 chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) config SPI_OMAP24XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) tristate "McSPI driver for OMAP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) select SG_SPLIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) SPI master controller for OMAP24XX and later Multichannel SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) (McSPI) modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) config SPI_TI_QSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) tristate "DRA7xxx QSPI controller support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) depends on ARCH_OMAP2PLUS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) QSPI master controller for DRA7xxx used for flash devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) This device supports single, dual and quad read support, while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) it only supports single write mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) config SPI_OMAP_100K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) tristate "OMAP SPI 100K"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) OMAP SPI 100K master controller for omap7xx boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) config SPI_ORION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) tristate "Orion SPI master"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) This enables using the SPI master controller on the Orion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) and MVEBU chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) config SPI_PIC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) tristate "Microchip PIC32 series SPI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) depends on MACH_PIC32 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) SPI driver for Microchip PIC32 SPI master controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) config SPI_PIC32_SQI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) tristate "Microchip PIC32 Quad SPI driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) depends on MACH_PIC32 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) SPI driver for PIC32 Quad SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) config SPI_PL022
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) tristate "ARM AMBA PL022 SSP controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) depends on ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) default y if MACH_U300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) default y if ARCH_REALVIEW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) default y if INTEGRATOR_IMPD1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) default y if ARCH_VERSATILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) controller. If you have an embedded system with an AMBA(R)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) bus and a PL022 controller, say Y or M here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) config SPI_PPC4xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) tristate "PPC4xx SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) depends on PPC32 && 4xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) This selects a driver for the PPC4xx SPI Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) config SPI_PXA2XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) tristate "PXA2xx SSP SPI master"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) select PXA_SSP if ARCH_PXA || ARCH_MMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) This enables using a PXA2xx or Sodaville SSP port as a SPI master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) controller. The driver can be configured to use any SSP port and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) additional documentation can be found a Documentation/spi/pxa2xx.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) config SPI_PXA2XX_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) def_tristate SPI_PXA2XX && PCI && COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) config SPI_ROCKCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) tristate "Rockchip SPI controller driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) This selects a driver for Rockchip SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) If you say yes to this option, support will be included for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) RK3066, RK3188 and RK3288 families of SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) Rockchip SPI controller support DMA transport and PIO mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) The main usecase of this controller is to use spi flash as boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) config SPI_ROCKCHIP_MISCDEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) bool "Rockchip SPI controller misc devices"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) depends on SPI_ROCKCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) This selects a misc driver for Rockchip SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) If you say yes to this option, It will register rkspi-devN misc device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) for each spi controller and support to get the controller register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) resource by calling mmap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) config SPI_ROCKCHIP_SFC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) tristate "Rockchip Serial Flash Controller (SFC)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) imply ROCKCHIP_MTD_VENDOR_STORAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) depends on ARCH_ROCKCHIP || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) depends on HAS_IOMEM && HAS_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) This enables support for Rockchip serial flash controller. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) is a specialized controller used to access SPI flash on some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) Rockchip SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) ROCKCHIP SFC supports DMA and PIO modes. When DMA is not available,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) the driver automatically falls back to PIO mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) config SPI_RB4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) tristate "Mikrotik RB4XX SPI master"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) depends on SPI_MASTER && ATH79
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) SPI controller driver for the Mikrotik RB4xx series boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) config SPI_RPCIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) tristate "Renesas RPC-IF SPI driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) depends on RENESAS_RPCIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) SPI driver for Renesas R-Car Gen3 RPC-IF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) config SPI_RSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) tristate "Renesas RSPI/QSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) depends on SUPERH || ARCH_RENESAS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) SPI driver for Renesas RSPI and QSPI blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) config SPI_QCOM_QSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) tristate "QTI QSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) depends on ARCH_QCOM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) QSPI(Quad SPI) driver for Qualcomm QSPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) config SPI_QUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) tristate "Qualcomm SPI controller with QUP interface"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) depends on ARCH_QCOM || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) Qualcomm Universal Peripheral (QUP) core is an AHB slave that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) provides a common data path (an output FIFO and an input FIFO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) for serial peripheral interface (SPI) mini-core. SPI in master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) mode supports up to 50MHz, up to four chip selects, programmable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) data path from 4 bits to 32 bits and numerous protocol variants.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) This driver can also be built as a module. If so, the module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) will be called spi_qup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) config SPI_QCOM_GENI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) tristate "Qualcomm GENI based SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) depends on QCOM_GENI_SE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) This driver supports GENI serial engine based SPI controller in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) master mode on the Qualcomm Technologies Inc.'s SoCs. If you say
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) yes to this option, support will be included for the built-in SPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) interface on the Qualcomm Technologies Inc.'s SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) This driver can also be built as a module. If so, the module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) will be called spi-geni-qcom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) config SPI_S3C24XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) tristate "Samsung S3C24XX series SPI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) depends on ARCH_S3C24XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) SPI driver for Samsung S3C24XX series ARM SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) config SPI_S3C24XX_FIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) bool "S3C24XX driver with FIQ pseudo-DMA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) depends on SPI_S3C24XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) select FIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) Enable FIQ support for the S3C24XX SPI driver to provide pseudo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) DMA by using the fast-interrupt request framework, This allows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) the driver to get DMA-like performance when there are either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) no free DMA channels, or when doing transfers that required both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) TX and RX data paths.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) config SPI_S3C64XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) tristate "Samsung S3C64XX series type SPI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) SPI driver for Samsung S3C64XX and newer SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) config SPI_SC18IS602
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) tristate "NXP SC18IS602/602B/603 I2C to SPI bridge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) depends on I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) config SPI_SH_MSIOF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) tristate "SuperH MSIOF SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) depends on HAVE_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) depends on ARCH_SHMOBILE || ARCH_RENESAS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) SPI driver for SuperH and SH Mobile MSIOF blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) config SPI_SH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) tristate "SuperH SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) depends on SUPERH || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) SPI driver for SuperH SPI blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) config SPI_SH_SCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) tristate "SuperH SCI SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) depends on SUPERH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) SPI driver for SuperH SCI blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) config SPI_SH_HSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) tristate "SuperH HSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) depends on ARCH_RENESAS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) SPI driver for SuperH HSPI blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) config SPI_SIFIVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) tristate "SiFive SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) This exposes the SPI controller IP from SiFive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) config SPI_SIRF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) tristate "CSR SiRFprimaII SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) depends on SIRF_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) SPI driver for CSR SiRFprimaII SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) config SPI_SLAVE_MT27XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) tristate "MediaTek SPI slave device"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) depends on ARCH_MEDIATEK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) depends on SPI_SLAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) This selects the MediaTek(R) SPI slave device driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) If you want to use MediaTek(R) SPI slave interface,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) say Y or M here.If you are not sure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) SPI slave drivers for Mediatek MT27XX series ARM SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) config SPI_SPRD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) tristate "Spreadtrum SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) depends on ARCH_SPRD || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) SPI driver for Spreadtrum SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) config SPI_SPRD_ADI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) tristate "Spreadtrum ADI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) depends on ARCH_SPRD || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) depends on HWSPINLOCK || (COMPILE_TEST && !HWSPINLOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ADI driver based on SPI for Spreadtrum SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) config SPI_STM32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) tristate "STMicroelectronics STM32 SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) depends on ARCH_STM32 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) SPI driver for STMicroelectronics STM32 SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) STM32 SPI controller supports DMA and PIO modes. When DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) is not available, the driver automatically falls back to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) PIO mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) config SPI_STM32_QSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) tristate "STMicroelectronics STM32 QUAD SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) depends on ARCH_STM32 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) This enables support for the Quad SPI controller in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) This driver does not support generic SPI. The implementation only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) supports spi-mem interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) config SPI_ST_SSC4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) tristate "STMicroelectronics SPI SSC-based driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) depends on ARCH_STI || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) STMicroelectronics SoCs support for SPI. If you say yes to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) this option, support will be included for the SSC driven SPI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) config SPI_SUN4I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) tristate "Allwinner A10 SoCs SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) depends on ARCH_SUNXI || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) config SPI_SUN6I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) tristate "Allwinner A31 SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) depends on ARCH_SUNXI || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) depends on RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) This enables using the SPI controller on the Allwinner A31 SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) config SPI_SYNQUACER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) tristate "Socionext's SynQuacer HighSpeed SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) depends on ARCH_SYNQUACER || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) SPI driver for Socionext's High speed SPI controller which provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) various operating modes for interfacing to serial peripheral devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) that use the de-facto standard SPI protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) It also supports the new dual-bit and quad-bit SPI protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) config SPI_MXIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) tristate "Macronix MX25F0A SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) depends on SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) This selects the Macronix MX25F0A SPI controller driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) config SPI_MXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) tristate "Freescale MXS SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) depends on ARCH_MXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) select STMP_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) SPI driver for Freescale MXS devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) config SPI_TEGRA114
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) tristate "NVIDIA Tegra114 SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) depends on RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) is different than the older SoCs SPI controller and also register interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) get changed with this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) config SPI_TEGRA20_SFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) tristate "Nvidia Tegra20 Serial flash Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) depends on ARCH_TEGRA || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) depends on RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) SPI driver for Nvidia Tegra20 Serial flash Controller interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) The main usecase of this controller is to use spi flash as boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) config SPI_TEGRA20_SLINK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) depends on RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) config SPI_THUNDERX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) tristate "Cavium ThunderX SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) SPI host driver for the hardware found on Cavium ThunderX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) config SPI_TOPCLIFF_PCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) depends on PCI && (X86_32 || MIPS || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) used in some x86 embedded processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) This driver also supports the ML7213/ML7223/ML7831, a companion chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) for the Atom E6xx series and compatible with the Intel EG20T PCH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) config SPI_TXX9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) tristate "Toshiba TXx9 SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) SPI driver for Toshiba TXx9 MIPS SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) config SPI_UNIPHIER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) tristate "Socionext UniPhier SPI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) UniPhier SoCs have SCSSI and MCSSI SPI controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) Every UniPhier SoC has SCSSI which supports single channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) This driver supports SCSSI only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) If your SoC supports SCSSI, say Y here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) config SPI_XCOMM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) depends on I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) Support for the SPI-I2C bridge found on the Analog Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) AD-FMCOMMS1-EBZ board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) config SPI_XILINX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) tristate "Xilinx SPI controller common module"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) This exposes the SPI controller IP from the Xilinx EDK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) Product Specification document (DS464) for hardware details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) config SPI_XLP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) tristate "Netlogic XLP SPI controller driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) depends on CPU_XLP || ARCH_THUNDER2 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) Enable support for the SPI controller on the Netlogic XLP SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) Currently supported XLP variants are XLP8XX, XLP3XX, XLP2XX, XLP9XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) and XLP5XX.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) If you have a Netlogic XLP platform say Y here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) config SPI_XTENSA_XTFPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) tristate "Xtensa SPI controller for xtfpga"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) select SPI_BITBANG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) SPI driver for xtfpga SPI master controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) This simple SPI master controller is built into xtfpga bitstreams
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) and is used to control daughterboard audio codec. It always transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) 16 bit words in SPI mode 0, automatically asserting CS on transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) start and deasserting on end.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) config SPI_ZYNQ_QSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) tristate "Xilinx Zynq QSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) depends on ARCH_ZYNQ || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) This enables support for the Zynq Quad SPI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) in master mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) This controller only supports SPI memory interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) config SPI_ZYNQMP_GQSPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) tristate "Xilinx ZynqMP GQSPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) config SPI_AMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) tristate "AMD SPI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) depends on SPI_MASTER || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) Enables SPI controller driver for AMD SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) # Add new SPI master controllers in alphabetical order above this line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) comment "SPI Multiplexer support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) config SPI_MUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) tristate "SPI multiplexer support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) select MULTIPLEXER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) This adds support for SPI multiplexers. Each SPI mux will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) accessible as a SPI controller, the devices behind the mux will appear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) to be chip selects on this controller. It is still necessary to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) select one or more specific mux-controller drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) # There are lots of SPI device types, with sensors and memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) # being probably the most widely used ones.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) comment "SPI Protocol Masters"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) config SPI_SPIDEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) tristate "User mode SPI device driver support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) This supports user mode SPI protocol drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) Note that this application programming interface is EXPERIMENTAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) config SPI_LOOPBACK_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) tristate "spi loopback test framework support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) depends on m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) This enables the SPI loopback testing framework driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) primarily used for development of spi_master drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) and to detect regressions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) config SPI_TLE62X0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) tristate "Infineon TLE62X0 (for power switching)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) depends on SYSFS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) SPI driver for Infineon TLE62X0 series line driver chips,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) such as the TLE6220, TLE6230 and TLE6240. This provides a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) sysfs interface, with each line presented as a kind of GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) exposing both switch control and diagnostic feedback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) # Add new SPI protocol masters in alphabetical order above this line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) endif # SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) # SLAVE side ... listening to other SPI masters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) config SPI_SLAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) bool "SPI slave protocol handlers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) If your system has a slave-capable SPI controller, you can enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) slave protocol handlers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) if SPI_SLAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) config SPI_SLAVE_TIME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) tristate "SPI slave handler reporting boot up time"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) SPI slave handler responding with the time of reception of the last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) SPI message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) config SPI_SLAVE_SYSTEM_CONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) tristate "SPI slave handler controlling system state"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) SPI slave handler to allow remote control of system reboot, power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) off, halt, and suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) endif # SPI_SLAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) config SPI_DYNAMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) def_bool ACPI || OF_DYNAMIC || SPI_SLAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) endif # SPI
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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