^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Copyright(c) 2015-17 Intel Corporation. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #ifndef __SDW_BUS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define __SDW_BUS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define DEFAULT_BANK_SWITCH_TIMEOUT 3000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define DEFAULT_PROBE_TIMEOUT 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #if IS_ENABLED(CONFIG_ACPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) int sdw_acpi_find_slaves(struct sdw_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static inline int sdw_acpi_find_slaves(struct sdw_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int sdw_of_find_slaves(struct sdw_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) void sdw_extract_slave_id(struct sdw_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u64 addr, struct sdw_slave_id *id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int sdw_slave_add(struct sdw_bus *bus, struct sdw_slave_id *id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct fwnode_handle *fwnode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int sdw_master_device_add(struct sdw_bus *bus, struct device *parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct fwnode_handle *fwnode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int sdw_master_device_del(struct sdw_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void sdw_bus_debugfs_init(struct sdw_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void sdw_bus_debugfs_exit(struct sdw_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void sdw_slave_debugfs_init(struct sdw_slave *slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void sdw_slave_debugfs_exit(struct sdw_slave *slave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void sdw_debugfs_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void sdw_debugfs_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static inline void sdw_bus_debugfs_init(struct sdw_bus *bus) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static inline void sdw_bus_debugfs_exit(struct sdw_bus *bus) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static inline void sdw_slave_debugfs_init(struct sdw_slave *slave) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static inline void sdw_slave_debugfs_exit(struct sdw_slave *slave) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static inline void sdw_debugfs_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline void sdw_debugfs_exit(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SDW_MSG_FLAG_READ = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) SDW_MSG_FLAG_WRITE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * struct sdw_msg - Message structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @addr: Register address accessed in the Slave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @len: number of messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @dev_num: Slave device number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @addr_page1: SCP address page 1 Slave register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @addr_page2: SCP address page 2 Slave register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @flags: transfer flags, indicate if xfer is read or write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @buf: message data buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @ssp_sync: Send message at SSP (Stream Synchronization Point)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @page: address requires paging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct sdw_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u16 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u16 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u8 dev_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u8 addr_page1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 addr_page2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) bool ssp_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) bool page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define SDW_DOUBLE_RATE_FACTOR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define SDW_STRM_RATE_GROUPING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) extern int sdw_rows[SDW_FRAME_ROWS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) extern int sdw_cols[SDW_FRAME_COLS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int sdw_find_row_index(int row);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int sdw_find_col_index(int col);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * sdw_port_runtime: Runtime port parameters for Master or Slave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * @num: Port number. For audio streams, valid port number ranges from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * [1,14]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * @ch_mask: Channel mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * @transport_params: Transport parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * @port_params: Port parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * @port_node: List node for Master or Slave port_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * SoundWire spec has no mention of ports for Master interface but the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * concept is logically extended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct sdw_port_runtime {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int ch_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct sdw_transport_params transport_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct sdw_port_params port_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct list_head port_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * sdw_slave_runtime: Runtime Stream parameters for Slave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @slave: Slave handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @direction: Data direction for Slave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @ch_count: Number of channels handled by the Slave for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * this stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @m_rt_node: sdw_master_runtime list node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @port_list: List of Slave Ports configured for this stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct sdw_slave_runtime {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct sdw_slave *slave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) enum sdw_data_direction direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int ch_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct list_head m_rt_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct list_head port_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * sdw_master_runtime: Runtime stream parameters for Master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @bus: Bus handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @stream: Stream runtime handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * @direction: Data direction for Master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @ch_count: Number of channels handled by the Master for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * this stream, can be zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @slave_rt_list: Slave runtime list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @port_list: List of Master Ports configured for this stream, can be zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @stream_node: sdw_stream_runtime master_list node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @bus_node: sdw_bus m_rt_list node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct sdw_master_runtime {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct sdw_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct sdw_stream_runtime *stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) enum sdw_data_direction direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned int ch_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct list_head slave_rt_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct list_head port_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct list_head stream_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct list_head bus_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) enum sdw_data_direction direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned int port_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int sdw_configure_dpn_intr(struct sdw_slave *slave, int port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) bool enable, int mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct sdw_defer *defer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define SDW_READ_INTR_CLEAR_RETRY 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Retrieve and return channel count from channel mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static inline int sdw_ch_mask_to_ch(int ch_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int c = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) for (c = 0; ch_mask; ch_mask >>= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) c += ch_mask & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Fill transport parameter data structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static inline void sdw_fill_xport_params(struct sdw_transport_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) int port_num, bool grp_ctrl_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int grp_ctrl, int sample_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) int off1, int off2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) int hstart, int hstop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int pack_mode, int lane_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) params->port_num = port_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) params->blk_grp_ctrl_valid = grp_ctrl_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) params->blk_grp_ctrl = grp_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) params->sample_interval = sample_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) params->offset1 = off1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) params->offset2 = off2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) params->hstart = hstart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) params->hstop = hstop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) params->blk_pkg_mode = pack_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) params->lane_ctrl = lane_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* Fill port parameter data structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static inline void sdw_fill_port_params(struct sdw_port_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int port_num, int bps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int flow_mode, int data_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) params->num = port_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) params->bps = bps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) params->flow_mode = flow_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) params->data_mode = data_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Read-Modify-Write Slave register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static inline int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) tmp = sdw_read(slave, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (tmp < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) tmp = (tmp & ~mask) | val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return sdw_write(slave, addr, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /* broadcast read/write for tests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * At the moment we only track Master-initiated hw_reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * Additional fields can be added as needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define SDW_UNATTACH_REQUEST_MASTER_RESET BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) void sdw_clear_slave_status(struct sdw_bus *bus, u32 request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int sdw_slave_modalias(const struct sdw_slave *slave, char *buf, size_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #endif /* __SDW_BUS_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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