^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TI K3 NAVSS Ring Accelerator subsystem driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sys_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/soc/ti/k3-ringacc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/soc/ti/ti_sci_protocol.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/soc/ti/ti_sci_inta_msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static LIST_HEAD(k3_ringacc_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static DEFINE_MUTEX(k3_ringacc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define K3_RINGACC_CFG_RING_SIZE_ELCNT_MASK GENMASK(19, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * struct k3_ring_rt_regs - The RA realtime Control/Status Registers region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * @resv_16: Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @db: Ring Doorbell Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @resv_4: Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @occ: Ring Occupancy Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @indx: Ring Current Index Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @hwocc: Ring Hardware Occupancy Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @hwindx: Ring Hardware Current Index Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct k3_ring_rt_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 resv_16[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 db;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 resv_4[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u32 occ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 indx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u32 hwocc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 hwindx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define K3_RINGACC_RT_REGS_STEP 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * struct k3_ring_fifo_regs - The Ring Accelerator Queues Registers region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @head_data: Ring Head Entry Data Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @tail_data: Ring Tail Entry Data Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @peek_head_data: Ring Peek Head Entry Data Regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @peek_tail_data: Ring Peek Tail Entry Data Regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct k3_ring_fifo_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 head_data[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 tail_data[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 peek_head_data[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 peek_tail_data[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * struct k3_ringacc_proxy_gcfg_regs - RA Proxy Global Config MMIO Region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @revision: Revision Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * @config: Config Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct k3_ringacc_proxy_gcfg_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u32 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define K3_RINGACC_PROXY_CFG_THREADS_MASK GENMASK(15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * struct k3_ringacc_proxy_target_regs - Proxy Datapath MMIO Region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * @control: Proxy Control Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * @status: Proxy Status Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * @resv_512: Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @data: Proxy Data Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct k3_ringacc_proxy_target_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u32 control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 resv_512[504];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u32 data[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define K3_RINGACC_PROXY_TARGET_STEP 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define K3_RINGACC_PROXY_NOT_USED (-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) enum k3_ringacc_proxy_access_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PROXY_ACCESS_MODE_HEAD = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PROXY_ACCESS_MODE_TAIL = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PROXY_ACCESS_MODE_PEEK_HEAD = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PROXY_ACCESS_MODE_PEEK_TAIL = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define K3_RINGACC_FIFO_WINDOW_SIZE_BYTES (512U)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define K3_RINGACC_FIFO_REGS_STEP 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define K3_RINGACC_MAX_DB_RING_CNT (127U)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct k3_ring_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int (*push_tail)(struct k3_ring *ring, void *elm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int (*push_head)(struct k3_ring *ring, void *elm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int (*pop_tail)(struct k3_ring *ring, void *elm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int (*pop_head)(struct k3_ring *ring, void *elm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * struct k3_ring_state - Internal state tracking structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * @free: Number of free entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * @occ: Occupancy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @windex: Write index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @rindex: Read index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct k3_ring_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u32 free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u32 occ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u32 windex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u32 rindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * struct k3_ring - RA Ring descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @rt: Ring control/status registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @fifos: Ring queues registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @proxy: Ring Proxy Datapath registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @ring_mem_dma: Ring buffer dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * @ring_mem_virt: Ring buffer virt address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @ops: Ring operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @size: Ring size in elements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * @elm_size: Size of the ring element
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * @mode: Ring mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * @flags: flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * @ring_id: Ring Id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * @parent: Pointer on struct @k3_ringacc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * @use_count: Use count for shared rings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * @proxy_id: RA Ring Proxy Id (only if @K3_RINGACC_RING_USE_PROXY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct k3_ring {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct k3_ring_rt_regs __iomem *rt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct k3_ring_fifo_regs __iomem *fifos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct k3_ringacc_proxy_target_regs __iomem *proxy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) dma_addr_t ring_mem_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) void *ring_mem_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct k3_ring_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) u32 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) enum k3_ring_size elm_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) enum k3_ring_mode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define K3_RING_FLAG_BUSY BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define K3_RING_FLAG_SHARED BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct k3_ring_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u32 ring_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct k3_ringacc *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u32 use_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) int proxy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct k3_ringacc_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int (*init)(struct platform_device *pdev, struct k3_ringacc *ringacc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * struct k3_ringacc - Rings accelerator descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * @dev: pointer on RA device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * @proxy_gcfg: RA proxy global config registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * @proxy_target_base: RA proxy datapath region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * @num_rings: number of ring in RA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * @rings_inuse: bitfield for ring usage tracking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * @rm_gp_range: general purpose rings range from tisci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * @dma_ring_reset_quirk: DMA reset w/a enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * @num_proxies: number of RA proxies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * @proxy_inuse: bitfield for proxy usage tracking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * @rings: array of rings descriptors (struct @k3_ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * @list: list of RAs in the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @req_lock: protect rings allocation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @tisci: pointer ti-sci handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * @tisci_ring_ops: ti-sci rings ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * @tisci_dev_id: ti-sci device id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * @ops: SoC specific ringacc operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct k3_ringacc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct k3_ringacc_proxy_gcfg_regs __iomem *proxy_gcfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) void __iomem *proxy_target_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) u32 num_rings; /* number of rings in Ringacc module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) unsigned long *rings_inuse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct ti_sci_resource *rm_gp_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) bool dma_ring_reset_quirk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u32 num_proxies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) unsigned long *proxy_inuse;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct k3_ring *rings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct mutex req_lock; /* protect rings allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) const struct ti_sci_handle *tisci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) const struct ti_sci_rm_ringacc_ops *tisci_ring_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u32 tisci_dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) const struct k3_ringacc_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * struct k3_ringacc - Rings accelerator SoC data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * @dma_ring_reset_quirk: DMA reset w/a enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct k3_ringacc_soc_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) unsigned dma_ring_reset_quirk:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static long k3_ringacc_ring_get_fifo_pos(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return K3_RINGACC_FIFO_WINDOW_SIZE_BYTES -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) (4 << ring->elm_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static void *k3_ringacc_get_elm_addr(struct k3_ring *ring, u32 idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return (ring->ring_mem_virt + idx * (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static int k3_ringacc_ring_push_mem(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int k3_ringacc_ring_pop_mem(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static struct k3_ring_ops k3_ring_mode_ring_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .push_tail = k3_ringacc_ring_push_mem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .pop_head = k3_ringacc_ring_pop_mem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int k3_ringacc_ring_push_io(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int k3_ringacc_ring_pop_io(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int k3_ringacc_ring_push_head_io(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static int k3_ringacc_ring_pop_tail_io(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static struct k3_ring_ops k3_ring_mode_msg_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .push_tail = k3_ringacc_ring_push_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .push_head = k3_ringacc_ring_push_head_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .pop_tail = k3_ringacc_ring_pop_tail_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .pop_head = k3_ringacc_ring_pop_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int k3_ringacc_ring_push_head_proxy(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static int k3_ringacc_ring_push_tail_proxy(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static int k3_ringacc_ring_pop_head_proxy(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static int k3_ringacc_ring_pop_tail_proxy(struct k3_ring *ring, void *elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static struct k3_ring_ops k3_ring_mode_proxy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .push_tail = k3_ringacc_ring_push_tail_proxy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .push_head = k3_ringacc_ring_push_head_proxy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .pop_tail = k3_ringacc_ring_pop_tail_proxy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .pop_head = k3_ringacc_ring_pop_head_proxy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static void k3_ringacc_ring_dump(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct device *dev = ring->parent->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) dev_dbg(dev, "dump ring: %d\n", ring->ring_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) dev_dbg(dev, "dump mem virt %p, dma %pad\n", ring->ring_mem_virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) &ring->ring_mem_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) dev_dbg(dev, "dump elmsize %d, size %d, mode %d, proxy_id %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ring->elm_size, ring->size, ring->mode, ring->proxy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) dev_dbg(dev, "dump flags %08X\n", ring->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) dev_dbg(dev, "dump ring_rt_regs: db%08x\n", readl(&ring->rt->db));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_dbg(dev, "dump occ%08x\n", readl(&ring->rt->occ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) dev_dbg(dev, "dump indx%08x\n", readl(&ring->rt->indx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) dev_dbg(dev, "dump hwocc%08x\n", readl(&ring->rt->hwocc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) dev_dbg(dev, "dump hwindx%08x\n", readl(&ring->rt->hwindx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (ring->ring_mem_virt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) print_hex_dump_debug("dump ring_mem_virt ", DUMP_PREFIX_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 16, 1, ring->ring_mem_virt, 16 * 8, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct k3_ring *k3_ringacc_request_ring(struct k3_ringacc *ringacc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int id, u32 flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int proxy_id = K3_RINGACC_PROXY_NOT_USED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) mutex_lock(&ringacc->req_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (id == K3_RINGACC_RING_ID_ANY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Request for any general purpose ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct ti_sci_resource_desc *gp_rings =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) &ringacc->rm_gp_range->desc[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) unsigned long size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) size = gp_rings->start + gp_rings->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) id = find_next_zero_bit(ringacc->rings_inuse, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) gp_rings->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (id == size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) } else if (id < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (test_bit(id, ringacc->rings_inuse) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) !(ringacc->rings[id].flags & K3_RING_FLAG_SHARED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) else if (ringacc->rings[id].flags & K3_RING_FLAG_SHARED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (flags & K3_RINGACC_RING_USE_PROXY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) proxy_id = find_next_zero_bit(ringacc->proxy_inuse,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ringacc->num_proxies, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (proxy_id == ringacc->num_proxies)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (proxy_id != K3_RINGACC_PROXY_NOT_USED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) set_bit(proxy_id, ringacc->proxy_inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) ringacc->rings[id].proxy_id = proxy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) dev_dbg(ringacc->dev, "Giving ring#%d proxy#%d\n", id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) proxy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) dev_dbg(ringacc->dev, "Giving ring#%d\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) set_bit(id, ringacc->rings_inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ringacc->rings[id].use_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) mutex_unlock(&ringacc->req_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return &ringacc->rings[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) mutex_unlock(&ringacc->req_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) EXPORT_SYMBOL_GPL(k3_ringacc_request_ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) int k3_ringacc_request_rings_pair(struct k3_ringacc *ringacc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) int fwd_id, int compl_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct k3_ring **fwd_ring,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct k3_ring **compl_ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (!fwd_ring || !compl_ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) *fwd_ring = k3_ringacc_request_ring(ringacc, fwd_id, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (!(*fwd_ring))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) *compl_ring = k3_ringacc_request_ring(ringacc, compl_id, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (!(*compl_ring)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) k3_ringacc_ring_free(*fwd_ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) EXPORT_SYMBOL_GPL(k3_ringacc_request_rings_pair);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static void k3_ringacc_ring_reset_sci(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct k3_ringacc *ringacc = ring->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ret = ringacc->tisci_ring_ops->config(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ringacc->tisci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ringacc->tisci_dev_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ring->ring_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ring->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) dev_err(ringacc->dev, "TISCI reset ring fail (%d) ring_idx %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ret, ring->ring_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) void k3_ringacc_ring_reset(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) memset(&ring->state, 0, sizeof(ring->state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) k3_ringacc_ring_reset_sci(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) EXPORT_SYMBOL_GPL(k3_ringacc_ring_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static void k3_ringacc_ring_reconfig_qmode_sci(struct k3_ring *ring,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) enum k3_ring_mode mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct k3_ringacc *ringacc = ring->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ret = ringacc->tisci_ring_ops->config(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ringacc->tisci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) TI_SCI_MSG_VALUE_RM_RING_MODE_VALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) ringacc->tisci_dev_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) ring->ring_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) dev_err(ringacc->dev, "TISCI reconf qmode fail (%d) ring_idx %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) ret, ring->ring_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) void k3_ringacc_ring_reset_dma(struct k3_ring *ring, u32 occ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (!ring->parent->dma_ring_reset_quirk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) goto reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (!occ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) occ = readl(&ring->rt->occ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (occ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u32 db_ring_cnt, db_ring_cnt_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) dev_dbg(ring->parent->dev, "%s %u occ: %u\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ring->ring_id, occ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* TI-SCI ring reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) k3_ringacc_ring_reset_sci(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * Setup the ring in ring/doorbell mode (if not already in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (ring->mode != K3_RINGACC_RING_MODE_RING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) k3_ringacc_ring_reconfig_qmode_sci(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ring, K3_RINGACC_RING_MODE_RING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * Ring the doorbell 2**22 – ringOcc times.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * This will wrap the internal UDMAP ring state occupancy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * counter (which is 21-bits wide) to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) db_ring_cnt = (1U << 22) - occ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) while (db_ring_cnt != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * Ring the doorbell with the maximum count each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * iteration if possible to minimize the total
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * of writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (db_ring_cnt > K3_RINGACC_MAX_DB_RING_CNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) db_ring_cnt_cur = K3_RINGACC_MAX_DB_RING_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) db_ring_cnt_cur = db_ring_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) writel(db_ring_cnt_cur, &ring->rt->db);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) db_ring_cnt -= db_ring_cnt_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* Restore the original ring mode (if not ring mode) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (ring->mode != K3_RINGACC_RING_MODE_RING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) k3_ringacc_ring_reconfig_qmode_sci(ring, ring->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) reset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* Reset the ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) k3_ringacc_ring_reset(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) EXPORT_SYMBOL_GPL(k3_ringacc_ring_reset_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static void k3_ringacc_ring_free_sci(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) struct k3_ringacc *ringacc = ring->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) ret = ringacc->tisci_ring_ops->config(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) ringacc->tisci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ringacc->tisci_dev_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ring->ring_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) dev_err(ringacc->dev, "TISCI ring free fail (%d) ring_idx %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) ret, ring->ring_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) int k3_ringacc_ring_free(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct k3_ringacc *ringacc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (!ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ringacc = ring->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) dev_dbg(ring->parent->dev, "flags: 0x%08x\n", ring->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (!test_bit(ring->ring_id, ringacc->rings_inuse))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) mutex_lock(&ringacc->req_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (--ring->use_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (!(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) goto no_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) k3_ringacc_ring_free_sci(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) dma_free_coherent(ringacc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ring->size * (4 << ring->elm_size),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ring->ring_mem_virt, ring->ring_mem_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) ring->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ring->ops = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (ring->proxy_id != K3_RINGACC_PROXY_NOT_USED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) clear_bit(ring->proxy_id, ringacc->proxy_inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) ring->proxy = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) ring->proxy_id = K3_RINGACC_PROXY_NOT_USED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) no_init:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) clear_bit(ring->ring_id, ringacc->rings_inuse);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) mutex_unlock(&ringacc->req_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) EXPORT_SYMBOL_GPL(k3_ringacc_ring_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u32 k3_ringacc_get_ring_id(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (!ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return ring->ring_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) EXPORT_SYMBOL_GPL(k3_ringacc_get_ring_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) u32 k3_ringacc_get_tisci_dev_id(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (!ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return ring->parent->tisci_dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) EXPORT_SYMBOL_GPL(k3_ringacc_get_tisci_dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) int k3_ringacc_get_ring_irq_num(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) int irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (!ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) irq_num = ti_sci_inta_msi_get_virq(ring->parent->dev, ring->ring_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (irq_num <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) irq_num = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) return irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) EXPORT_SYMBOL_GPL(k3_ringacc_get_ring_irq_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static int k3_ringacc_ring_cfg_sci(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct k3_ringacc *ringacc = ring->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) u32 ring_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (!ringacc->tisci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) ring_idx = ring->ring_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) ret = ringacc->tisci_ring_ops->config(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) ringacc->tisci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ringacc->tisci_dev_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ring_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) lower_32_bits(ring->ring_mem_dma),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) upper_32_bits(ring->ring_mem_dma),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) ring->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) ring->mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) ring->elm_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dev_err(ringacc->dev, "TISCI config ring fail (%d) ring_idx %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ret, ring_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) struct k3_ringacc *ringacc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (!ring || !cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ringacc = ring->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (cfg->elm_size > K3_RINGACC_RING_ELSIZE_256 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) cfg->mode >= K3_RINGACC_RING_MODE_INVALID ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) cfg->size & ~K3_RINGACC_CFG_RING_SIZE_ELCNT_MASK ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) !test_bit(ring->ring_id, ringacc->rings_inuse))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (cfg->mode == K3_RINGACC_RING_MODE_MESSAGE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) ring->proxy_id == K3_RINGACC_PROXY_NOT_USED &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) cfg->elm_size > K3_RINGACC_RING_ELSIZE_8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) dev_err(ringacc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) "Message mode must use proxy for %u element size\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 4 << ring->elm_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * In case of shared ring only the first user (master user) can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * configure the ring. The sequence should be by the client:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * ring = k3_ringacc_request_ring(ringacc, ring_id, 0); # master user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * k3_ringacc_ring_cfg(ring, cfg); # master configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * k3_ringacc_request_ring(ringacc, ring_id, K3_RING_FLAG_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) * k3_ringacc_request_ring(ringacc, ring_id, K3_RING_FLAG_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (ring->use_count != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ring->size = cfg->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ring->elm_size = cfg->elm_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ring->mode = cfg->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) memset(&ring->state, 0, sizeof(ring->state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (ring->proxy_id != K3_RINGACC_PROXY_NOT_USED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) ring->proxy = ringacc->proxy_target_base +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) ring->proxy_id * K3_RINGACC_PROXY_TARGET_STEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) switch (ring->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) case K3_RINGACC_RING_MODE_RING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ring->ops = &k3_ring_mode_ring_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) case K3_RINGACC_RING_MODE_MESSAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (ring->proxy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) ring->ops = &k3_ring_mode_proxy_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) ring->ops = &k3_ring_mode_msg_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ring->ops = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) goto err_free_proxy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ring->ring_mem_virt = dma_alloc_coherent(ringacc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ring->size * (4 << ring->elm_size),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) &ring->ring_mem_dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (!ring->ring_mem_virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) dev_err(ringacc->dev, "Failed to alloc ring mem\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) goto err_free_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) ret = k3_ringacc_ring_cfg_sci(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) goto err_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) ring->flags |= K3_RING_FLAG_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) ring->flags |= (cfg->flags & K3_RINGACC_RING_SHARED) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) K3_RING_FLAG_SHARED : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) k3_ringacc_ring_dump(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) err_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) dma_free_coherent(ringacc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) ring->size * (4 << ring->elm_size),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) ring->ring_mem_virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) ring->ring_mem_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) err_free_ops:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) ring->ops = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) err_free_proxy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ring->proxy = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) EXPORT_SYMBOL_GPL(k3_ringacc_ring_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) u32 k3_ringacc_ring_get_size(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) return ring->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) EXPORT_SYMBOL_GPL(k3_ringacc_ring_get_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) u32 k3_ringacc_ring_get_free(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (!ring->state.free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ring->state.free = ring->size - readl(&ring->rt->occ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return ring->state.free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) EXPORT_SYMBOL_GPL(k3_ringacc_ring_get_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u32 k3_ringacc_ring_get_occ(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) return readl(&ring->rt->occ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) EXPORT_SYMBOL_GPL(k3_ringacc_ring_get_occ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) u32 k3_ringacc_ring_is_full(struct k3_ring *ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return !k3_ringacc_ring_get_free(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) EXPORT_SYMBOL_GPL(k3_ringacc_ring_is_full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) enum k3_ringacc_access_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) K3_RINGACC_ACCESS_MODE_PUSH_HEAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) K3_RINGACC_ACCESS_MODE_POP_HEAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) K3_RINGACC_ACCESS_MODE_PUSH_TAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) K3_RINGACC_ACCESS_MODE_POP_TAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) K3_RINGACC_ACCESS_MODE_PEEK_HEAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) K3_RINGACC_ACCESS_MODE_PEEK_TAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) #define K3_RINGACC_PROXY_MODE(x) (((x) & 0x3) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) #define K3_RINGACC_PROXY_ELSIZE(x) (((x) & 0x7) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static int k3_ringacc_ring_cfg_proxy(struct k3_ring *ring,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) enum k3_ringacc_proxy_access_mode mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) val = ring->ring_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) val |= K3_RINGACC_PROXY_MODE(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) val |= K3_RINGACC_PROXY_ELSIZE(ring->elm_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) writel(val, &ring->proxy->control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) static int k3_ringacc_ring_access_proxy(struct k3_ring *ring, void *elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) enum k3_ringacc_access_mode access_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) void __iomem *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) ptr = (void __iomem *)&ring->proxy->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) switch (access_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) case K3_RINGACC_ACCESS_MODE_POP_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) k3_ringacc_ring_cfg_proxy(ring, PROXY_ACCESS_MODE_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) case K3_RINGACC_ACCESS_MODE_POP_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) k3_ringacc_ring_cfg_proxy(ring, PROXY_ACCESS_MODE_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) ptr += k3_ringacc_ring_get_fifo_pos(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) switch (access_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) case K3_RINGACC_ACCESS_MODE_POP_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) case K3_RINGACC_ACCESS_MODE_POP_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) dev_dbg(ring->parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) "proxy:memcpy_fromio(x): --> ptr(%p), mode:%d\n", ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) access_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) memcpy_fromio(elem, ptr, (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ring->state.occ--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) dev_dbg(ring->parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) "proxy:memcpy_toio(x): --> ptr(%p), mode:%d\n", ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) access_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) memcpy_toio(ptr, elem, (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) ring->state.free--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) dev_dbg(ring->parent->dev, "proxy: free%d occ%d\n", ring->state.free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) ring->state.occ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static int k3_ringacc_ring_push_head_proxy(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) return k3_ringacc_ring_access_proxy(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) K3_RINGACC_ACCESS_MODE_PUSH_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static int k3_ringacc_ring_push_tail_proxy(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) return k3_ringacc_ring_access_proxy(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) K3_RINGACC_ACCESS_MODE_PUSH_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static int k3_ringacc_ring_pop_head_proxy(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) return k3_ringacc_ring_access_proxy(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) K3_RINGACC_ACCESS_MODE_POP_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) static int k3_ringacc_ring_pop_tail_proxy(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) return k3_ringacc_ring_access_proxy(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) K3_RINGACC_ACCESS_MODE_POP_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) static int k3_ringacc_ring_access_io(struct k3_ring *ring, void *elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) enum k3_ringacc_access_mode access_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) void __iomem *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) switch (access_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) case K3_RINGACC_ACCESS_MODE_POP_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) ptr = (void __iomem *)&ring->fifos->head_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) case K3_RINGACC_ACCESS_MODE_POP_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) ptr = (void __iomem *)&ring->fifos->tail_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) ptr += k3_ringacc_ring_get_fifo_pos(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) switch (access_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) case K3_RINGACC_ACCESS_MODE_POP_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) case K3_RINGACC_ACCESS_MODE_POP_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) dev_dbg(ring->parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) "memcpy_fromio(x): --> ptr(%p), mode:%d\n", ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) access_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) memcpy_fromio(elem, ptr, (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) ring->state.occ--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) dev_dbg(ring->parent->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) "memcpy_toio(x): --> ptr(%p), mode:%d\n", ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) access_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) memcpy_toio(ptr, elem, (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) ring->state.free--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) dev_dbg(ring->parent->dev, "free%d index%d occ%d index%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) ring->state.free, ring->state.windex, ring->state.occ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) ring->state.rindex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static int k3_ringacc_ring_push_head_io(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) return k3_ringacc_ring_access_io(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) K3_RINGACC_ACCESS_MODE_PUSH_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) static int k3_ringacc_ring_push_io(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) return k3_ringacc_ring_access_io(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) K3_RINGACC_ACCESS_MODE_PUSH_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static int k3_ringacc_ring_pop_io(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return k3_ringacc_ring_access_io(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) K3_RINGACC_ACCESS_MODE_POP_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static int k3_ringacc_ring_pop_tail_io(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) return k3_ringacc_ring_access_io(ring, elem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) K3_RINGACC_ACCESS_MODE_POP_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static int k3_ringacc_ring_push_mem(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) void *elem_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) elem_ptr = k3_ringacc_get_elm_addr(ring, ring->state.windex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) memcpy(elem_ptr, elem, (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) ring->state.windex = (ring->state.windex + 1) % ring->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) ring->state.free--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) writel(1, &ring->rt->db);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) dev_dbg(ring->parent->dev, "ring_push_mem: free%d index%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) ring->state.free, ring->state.windex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static int k3_ringacc_ring_pop_mem(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) void *elem_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) elem_ptr = k3_ringacc_get_elm_addr(ring, ring->state.rindex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) memcpy(elem, elem_ptr, (4 << ring->elm_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) ring->state.rindex = (ring->state.rindex + 1) % ring->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) ring->state.occ--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) writel(-1, &ring->rt->db);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) dev_dbg(ring->parent->dev, "ring_pop_mem: occ%d index%d pos_ptr%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) ring->state.occ, ring->state.rindex, elem_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) int k3_ringacc_ring_push(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) int ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) dev_dbg(ring->parent->dev, "ring_push: free%d index%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) ring->state.free, ring->state.windex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) if (k3_ringacc_ring_is_full(ring))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) if (ring->ops && ring->ops->push_tail)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) ret = ring->ops->push_tail(ring, elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) EXPORT_SYMBOL_GPL(k3_ringacc_ring_push);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) int k3_ringacc_ring_push_head(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) int ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) dev_dbg(ring->parent->dev, "ring_push_head: free%d index%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) ring->state.free, ring->state.windex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (k3_ringacc_ring_is_full(ring))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (ring->ops && ring->ops->push_head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) ret = ring->ops->push_head(ring, elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) EXPORT_SYMBOL_GPL(k3_ringacc_ring_push_head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) int k3_ringacc_ring_pop(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) int ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (!ring->state.occ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) ring->state.occ = k3_ringacc_ring_get_occ(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) dev_dbg(ring->parent->dev, "ring_pop: occ%d index%d\n", ring->state.occ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) ring->state.rindex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) if (!ring->state.occ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) if (ring->ops && ring->ops->pop_head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) ret = ring->ops->pop_head(ring, elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) EXPORT_SYMBOL_GPL(k3_ringacc_ring_pop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) int k3_ringacc_ring_pop_tail(struct k3_ring *ring, void *elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) int ret = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (!ring->state.occ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) ring->state.occ = k3_ringacc_ring_get_occ(ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) dev_dbg(ring->parent->dev, "ring_pop_tail: occ%d index%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) ring->state.occ, ring->state.rindex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) if (!ring->state.occ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) if (ring->ops && ring->ops->pop_tail)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) ret = ring->ops->pop_tail(ring, elem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) EXPORT_SYMBOL_GPL(k3_ringacc_ring_pop_tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) struct k3_ringacc *of_k3_ringacc_get_by_phandle(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) const char *property)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) struct device_node *ringacc_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) struct k3_ringacc *ringacc = ERR_PTR(-EPROBE_DEFER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) struct k3_ringacc *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) ringacc_np = of_parse_phandle(np, property, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (!ringacc_np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) mutex_lock(&k3_ringacc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) list_for_each_entry(entry, &k3_ringacc_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) if (entry->dev->of_node == ringacc_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) ringacc = entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) mutex_unlock(&k3_ringacc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) of_node_put(ringacc_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) return ringacc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) EXPORT_SYMBOL_GPL(of_k3_ringacc_get_by_phandle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) static int k3_ringacc_probe_dt(struct k3_ringacc *ringacc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) struct device_node *node = ringacc->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) struct device *dev = ringacc->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) struct platform_device *pdev = to_platform_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) if (!node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) dev_err(dev, "device tree info unavailable\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) ret = of_property_read_u32(node, "ti,num-rings", &ringacc->num_rings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) dev_err(dev, "ti,num-rings read failure %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) ringacc->tisci = ti_sci_get_by_phandle(node, "ti,sci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (IS_ERR(ringacc->tisci)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) ret = PTR_ERR(ringacc->tisci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) dev_err(dev, "ti,sci read fail %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) ringacc->tisci = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) ret = of_property_read_u32(node, "ti,sci-dev-id",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) &ringacc->tisci_dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) dev_err(dev, "ti,sci-dev-id read fail %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) pdev->id = ringacc->tisci_dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) ringacc->rm_gp_range = devm_ti_sci_get_of_resource(ringacc->tisci, dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) ringacc->tisci_dev_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) "ti,sci-rm-range-gp-rings");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (IS_ERR(ringacc->rm_gp_range)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) dev_err(dev, "Failed to allocate MSI interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return PTR_ERR(ringacc->rm_gp_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) return ti_sci_inta_msi_domain_alloc_irqs(ringacc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) ringacc->rm_gp_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) static const struct k3_ringacc_soc_data k3_ringacc_soc_data_sr1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) .dma_ring_reset_quirk = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) static const struct soc_device_attribute k3_ringacc_socinfo[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) { .family = "AM65X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) .revision = "SR1.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) .data = &k3_ringacc_soc_data_sr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) {/* sentinel */}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) static int k3_ringacc_init(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) struct k3_ringacc *ringacc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) const struct soc_device_attribute *soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) void __iomem *base_fifo, *base_rt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) dev->msi_domain = of_msi_get_domain(dev, dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) DOMAIN_BUS_TI_SCI_INTA_MSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) if (!dev->msi_domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) dev_err(dev, "Failed to get MSI domain\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) ret = k3_ringacc_probe_dt(ringacc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) soc = soc_device_match(k3_ringacc_socinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) if (soc && soc->data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) const struct k3_ringacc_soc_data *soc_data = soc->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) ringacc->dma_ring_reset_quirk = soc_data->dma_ring_reset_quirk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) base_rt = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if (IS_ERR(base_rt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) return PTR_ERR(base_rt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fifos");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) base_fifo = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) if (IS_ERR(base_fifo))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) return PTR_ERR(base_fifo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "proxy_gcfg");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) ringacc->proxy_gcfg = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (IS_ERR(ringacc->proxy_gcfg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) return PTR_ERR(ringacc->proxy_gcfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) "proxy_target");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) ringacc->proxy_target_base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (IS_ERR(ringacc->proxy_target_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) return PTR_ERR(ringacc->proxy_target_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) ringacc->num_proxies = readl(&ringacc->proxy_gcfg->config) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) K3_RINGACC_PROXY_CFG_THREADS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) ringacc->rings = devm_kzalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) sizeof(*ringacc->rings) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) ringacc->num_rings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) ringacc->rings_inuse = devm_kcalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) BITS_TO_LONGS(ringacc->num_rings),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) sizeof(unsigned long), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) ringacc->proxy_inuse = devm_kcalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) BITS_TO_LONGS(ringacc->num_proxies),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) sizeof(unsigned long), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) if (!ringacc->rings || !ringacc->rings_inuse || !ringacc->proxy_inuse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) for (i = 0; i < ringacc->num_rings; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) ringacc->rings[i].rt = base_rt +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) K3_RINGACC_RT_REGS_STEP * i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) ringacc->rings[i].fifos = base_fifo +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) K3_RINGACC_FIFO_REGS_STEP * i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) ringacc->rings[i].parent = ringacc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) ringacc->rings[i].ring_id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) ringacc->rings[i].proxy_id = K3_RINGACC_PROXY_NOT_USED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) ringacc->tisci_ring_ops = &ringacc->tisci->ops.rm_ring_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) dev_info(dev, "Ring Accelerator probed rings:%u, gp-rings[%u,%u] sci-dev-id:%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) ringacc->num_rings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) ringacc->rm_gp_range->desc[0].start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) ringacc->rm_gp_range->desc[0].num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) ringacc->tisci_dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) dev_info(dev, "dma-ring-reset-quirk: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) ringacc->dma_ring_reset_quirk ? "enabled" : "disabled");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) dev_info(dev, "RA Proxy rev. %08x, num_proxies:%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) readl(&ringacc->proxy_gcfg->revision), ringacc->num_proxies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) struct ringacc_match_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) struct k3_ringacc_ops ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) static struct ringacc_match_data k3_ringacc_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) .ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) .init = k3_ringacc_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) /* Match table for of_platform binding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) static const struct of_device_id k3_ringacc_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) { .compatible = "ti,am654-navss-ringacc", .data = &k3_ringacc_data, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) static int k3_ringacc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) const struct ringacc_match_data *match_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) struct k3_ringacc *ringacc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) match = of_match_node(k3_ringacc_of_match, dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) if (!match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) match_data = match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) if (!ringacc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) ringacc->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) mutex_init(&ringacc->req_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) ringacc->ops = &match_data->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) ret = ringacc->ops->init(pdev, ringacc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dev_set_drvdata(dev, ringacc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) mutex_lock(&k3_ringacc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) list_add_tail(&ringacc->list, &k3_ringacc_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) mutex_unlock(&k3_ringacc_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static struct platform_driver k3_ringacc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) .probe = k3_ringacc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) .name = "k3-ringacc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) .of_match_table = k3_ringacc_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) builtin_platform_driver(k3_ringacc_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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