^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <soc/tegra/fuse.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "fuse.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CPU_PROCESS_CORNERS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GPU_PROCESS_CORNERS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SOC_PROCESS_CORNERS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define FUSE_CPU_SPEEDO_0 0x014
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define FUSE_CPU_SPEEDO_1 0x02c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define FUSE_CPU_SPEEDO_2 0x030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define FUSE_SOC_SPEEDO_0 0x034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define FUSE_SOC_SPEEDO_1 0x038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define FUSE_SOC_SPEEDO_2 0x03c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FUSE_CPU_IDDQ 0x018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FUSE_SOC_IDDQ 0x040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define FUSE_GPU_IDDQ 0x128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FUSE_FT_REV 0x028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) THRESHOLD_INDEX_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) THRESHOLD_INDEX_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) THRESHOLD_INDEX_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static const u32 __initconst cpu_process_speedos[][CPU_PROCESS_CORNERS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { 2119, UINT_MAX },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) { 2119, UINT_MAX },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const u32 __initconst gpu_process_speedos[][GPU_PROCESS_CORNERS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { UINT_MAX, UINT_MAX },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { UINT_MAX, UINT_MAX },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static const u32 __initconst soc_process_speedos[][SOC_PROCESS_CORNERS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { 1950, 2100, UINT_MAX },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { 1950, 2100, UINT_MAX },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static u8 __init get_speedo_revision(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return tegra_fuse_read_spare(4) << 2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) tegra_fuse_read_spare(3) << 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) tegra_fuse_read_spare(2) << 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u8 speedo_rev, int *threshold)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int sku = sku_info->sku_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Assign to default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) sku_info->cpu_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) sku_info->soc_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) sku_info->gpu_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *threshold = THRESHOLD_INDEX_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) switch (sku) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case 0x00: /* Engineering SKU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case 0x01: /* Engineering SKU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) case 0x07:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case 0x17:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case 0x27:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (speedo_rev >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) sku_info->gpu_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) case 0x13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (speedo_rev >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) sku_info->gpu_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) sku_info->cpu_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pr_err("Tegra210: unknown SKU %#04x\n", sku);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Using the default for the error case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int get_process_id(int value, const u32 *speedos, unsigned int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) for (i = 0; i < num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (value < speedos[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) void __init tegra210_init_speedo_data(struct tegra_sku_info *sku_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int cpu_speedo[3], soc_speedo[3], cpu_iddq, gpu_iddq, soc_iddq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 speedo_revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) THRESHOLD_INDEX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) THRESHOLD_INDEX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) THRESHOLD_INDEX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Read speedo/IDDQ fuses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) cpu_speedo[0] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) cpu_speedo[1] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) cpu_speedo[2] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) soc_speedo[0] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) soc_speedo[1] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) soc_speedo[2] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) cpu_iddq = tegra_fuse_read_early(FUSE_CPU_IDDQ) * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) soc_iddq = tegra_fuse_read_early(FUSE_SOC_IDDQ) * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) gpu_iddq = tegra_fuse_read_early(FUSE_GPU_IDDQ) * 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * Determine CPU, GPU and SoC speedo values depending on speedo fusing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * revision. Note that GPU speedo value is fused in CPU_SPEEDO_2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) speedo_revision = get_speedo_revision();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) pr_info("Speedo Revision %u\n", speedo_revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (speedo_revision >= 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) sku_info->cpu_speedo_value = cpu_speedo[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) sku_info->gpu_speedo_value = cpu_speedo[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) sku_info->soc_speedo_value = soc_speedo[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } else if (speedo_revision == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) sku_info->cpu_speedo_value = (-1938 + (1095 * cpu_speedo[0] / 100)) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) sku_info->gpu_speedo_value = (-1662 + (1082 * cpu_speedo[2] / 100)) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) sku_info->soc_speedo_value = ( -705 + (1037 * soc_speedo[0] / 100)) / 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) sku_info->cpu_speedo_value = 2100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) sku_info->gpu_speedo_value = cpu_speedo[2] - 75;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) sku_info->soc_speedo_value = 1900;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if ((sku_info->cpu_speedo_value <= 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) (sku_info->gpu_speedo_value <= 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) (sku_info->soc_speedo_value <= 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) WARN(1, "speedo value not fused\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) rev_sku_to_speedo_ids(sku_info, speedo_revision, &index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) sku_info->gpu_process_id = get_process_id(sku_info->gpu_speedo_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) gpu_process_speedos[index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) GPU_PROCESS_CORNERS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) sku_info->cpu_process_id = get_process_id(sku_info->cpu_speedo_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) cpu_process_speedos[index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) CPU_PROCESS_CORNERS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) sku_info->soc_process_id = get_process_id(sku_info->soc_speedo_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) soc_process_speedos[index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) SOC_PROCESS_CORNERS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) pr_debug("Tegra GPU Speedo ID=%d, Speedo Value=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) sku_info->gpu_speedo_id, sku_info->gpu_speedo_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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