^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <soc/tegra/fuse.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "fuse.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CPU_PROCESS_CORNERS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GPU_PROCESS_CORNERS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SOC_PROCESS_CORNERS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define FUSE_CPU_SPEEDO_0 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define FUSE_CPU_SPEEDO_1 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define FUSE_CPU_SPEEDO_2 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define FUSE_SOC_SPEEDO_0 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define FUSE_SOC_SPEEDO_1 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define FUSE_SOC_SPEEDO_2 0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FUSE_CPU_IDDQ 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FUSE_SOC_IDDQ 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define FUSE_GPU_IDDQ 0x128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FUSE_FT_REV 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) THRESHOLD_INDEX_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) THRESHOLD_INDEX_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) THRESHOLD_INDEX_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static const u32 __initconst cpu_process_speedos[][CPU_PROCESS_CORNERS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {2190, UINT_MAX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {0, UINT_MAX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const u32 __initconst gpu_process_speedos[][GPU_PROCESS_CORNERS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {1965, UINT_MAX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {0, UINT_MAX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static const u32 __initconst soc_process_speedos[][SOC_PROCESS_CORNERS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {2101, UINT_MAX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {0, UINT_MAX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int *threshold)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int sku = sku_info->sku_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Assign to default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) sku_info->cpu_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) sku_info->soc_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) sku_info->gpu_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *threshold = THRESHOLD_INDEX_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) switch (sku) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case 0x00: /* Eng sku */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) case 0x0F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case 0x23:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Using the default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) case 0x83:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) sku_info->cpu_speedo_id = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) case 0x1F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) case 0x87:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case 0x27:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) sku_info->cpu_speedo_id = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) sku_info->soc_speedo_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) sku_info->gpu_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *threshold = THRESHOLD_INDEX_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case 0x81:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) case 0x21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case 0x07:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) sku_info->cpu_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) sku_info->soc_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) sku_info->gpu_speedo_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) *threshold = THRESHOLD_INDEX_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) case 0x49:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) case 0x4A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) case 0x48:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) sku_info->cpu_speedo_id = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) sku_info->soc_speedo_id = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) sku_info->gpu_speedo_id = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) *threshold = THRESHOLD_INDEX_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_err("Tegra Unknown SKU %d\n", sku);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* Using the default for the error case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void __init tegra124_init_speedo_data(struct tegra_sku_info *sku_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int i, threshold, cpu_speedo_0_value, soc_speedo_0_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int cpu_iddq_value, gpu_iddq_value, soc_iddq_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) THRESHOLD_INDEX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) THRESHOLD_INDEX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) THRESHOLD_INDEX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) cpu_speedo_0_value = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* GPU Speedo is stored in CPU_SPEEDO_2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) sku_info->gpu_speedo_value = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) soc_speedo_0_value = tegra_fuse_read_early(FUSE_SOC_SPEEDO_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) cpu_iddq_value = tegra_fuse_read_early(FUSE_CPU_IDDQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) soc_iddq_value = tegra_fuse_read_early(FUSE_SOC_IDDQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) gpu_iddq_value = tegra_fuse_read_early(FUSE_GPU_IDDQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) sku_info->cpu_speedo_value = cpu_speedo_0_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (sku_info->cpu_speedo_value == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) pr_warn("Tegra Warning: Speedo value not fused.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) rev_sku_to_speedo_ids(sku_info, &threshold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) sku_info->cpu_iddq_value = tegra_fuse_read_early(FUSE_CPU_IDDQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) for (i = 0; i < GPU_PROCESS_CORNERS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (sku_info->gpu_speedo_value <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) gpu_process_speedos[threshold][i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) sku_info->gpu_process_id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) for (i = 0; i < CPU_PROCESS_CORNERS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (sku_info->cpu_speedo_value <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) cpu_process_speedos[threshold][i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) sku_info->cpu_process_id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) for (i = 0; i < SOC_PROCESS_CORNERS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (soc_speedo_0_value <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) soc_process_speedos[threshold][i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) sku_info->soc_process_id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) pr_debug("Tegra GPU Speedo ID=%d, Speedo Value=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) sku_info->gpu_speedo_id, sku_info->gpu_speedo_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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