Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //		http://www.samsung.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // Exynos4 - CPU PMU(Power Management Unit) support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/soc/samsung/exynos-regs-pmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/soc/samsung/exynos-pmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "exynos-pmu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	/* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	{ S5P_ARM_CORE0_LOWPWR,			{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	{ S5P_DIS_IRQ_CORE0,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	{ S5P_DIS_IRQ_CENTRAL0,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	{ S5P_ARM_CORE1_LOWPWR,			{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	{ S5P_DIS_IRQ_CORE1,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	{ S5P_DIS_IRQ_CENTRAL1,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	{ S5P_ARM_COMMON_LOWPWR,		{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	{ S5P_L2_0_LOWPWR,			{ 0x2, 0x2, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	{ S5P_L2_1_LOWPWR,			{ 0x2, 0x2, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	{ S5P_CMU_ACLKSTOP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	{ S5P_CMU_SCLKSTOP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	{ S5P_CMU_RESET_LOWPWR,			{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	{ S5P_APLL_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	{ S5P_MPLL_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	{ S5P_VPLL_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	{ S5P_EPLL_SYSCLK_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	{ S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR,	{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	{ S5P_CMU_RESET_GPSALIVE_LOWPWR,	{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	{ S5P_CMU_CLKSTOP_CAM_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	{ S5P_CMU_CLKSTOP_TV_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	{ S5P_CMU_CLKSTOP_MFC_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	{ S5P_CMU_CLKSTOP_G3D_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	{ S5P_CMU_CLKSTOP_LCD0_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	{ S5P_CMU_CLKSTOP_LCD1_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	{ S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,	{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	{ S5P_CMU_CLKSTOP_GPS_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	{ S5P_CMU_RESET_CAM_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	{ S5P_CMU_RESET_TV_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	{ S5P_CMU_RESET_MFC_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	{ S5P_CMU_RESET_G3D_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	{ S5P_CMU_RESET_LCD0_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	{ S5P_CMU_RESET_LCD1_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	{ S5P_CMU_RESET_MAUDIO_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	{ S5P_CMU_RESET_GPS_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	{ S5P_TOP_BUS_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	{ S5P_TOP_RETENTION_LOWPWR,		{ 0x1, 0x0, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	{ S5P_TOP_PWR_LOWPWR,			{ 0x3, 0x0, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	{ S5P_LOGIC_RESET_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{ S5P_ONENAND_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	{ S5P_MODIMIF_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	{ S5P_G2D_ACP_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	{ S5P_USBOTG_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	{ S5P_HSMMC_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	{ S5P_CSSYS_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{ S5P_SECSS_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	{ S5P_PCIE_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	{ S5P_SATA_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	{ S5P_PAD_RETENTION_DRAM_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	{ S5P_PAD_RETENTION_MAUDIO_LOWPWR,	{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	{ S5P_PAD_RETENTION_GPIO_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	{ S5P_PAD_RETENTION_UART_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	{ S5P_PAD_RETENTION_MMCA_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	{ S5P_PAD_RETENTION_MMCB_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	{ S5P_PAD_RETENTION_EBIA_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	{ S5P_PAD_RETENTION_EBIB_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	{ S5P_PAD_RETENTION_ISOLATION_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	{ S5P_PAD_RETENTION_ALV_SEL_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	{ S5P_XUSBXTI_LOWPWR,			{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	{ S5P_XXTI_LOWPWR,			{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	{ S5P_EXT_REGULATOR_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	{ S5P_GPIO_MODE_LOWPWR,			{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	{ S5P_GPIO_MODE_MAUDIO_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{ S5P_CAM_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	{ S5P_TV_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	{ S5P_MFC_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	{ S5P_G3D_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	{ S5P_LCD0_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{ S5P_LCD1_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	{ S5P_MAUDIO_LOWPWR,			{ 0x7, 0x7, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	{ S5P_GPS_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	{ S5P_GPS_ALIVE_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	{ PMU_TABLE_END,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static const struct exynos_pmu_conf exynos4412_pmu_config[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	{ S5P_ARM_CORE0_LOWPWR,			{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	{ S5P_DIS_IRQ_CORE0,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	{ S5P_DIS_IRQ_CENTRAL0,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	{ S5P_ARM_CORE1_LOWPWR,			{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	{ S5P_DIS_IRQ_CORE1,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	{ S5P_DIS_IRQ_CENTRAL1,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	{ S5P_ISP_ARM_LOWPWR,			{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	{ S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR,	{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	{ S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR,	{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	{ S5P_ARM_COMMON_LOWPWR,		{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	{ S5P_L2_0_LOWPWR,			{ 0x0, 0x0, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/* XXX_OPTION register should be set other field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	{ S5P_ARM_L2_0_OPTION,			{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	{ S5P_L2_1_LOWPWR,			{ 0x0, 0x0, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	{ S5P_ARM_L2_1_OPTION,			{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	{ S5P_CMU_ACLKSTOP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	{ S5P_CMU_SCLKSTOP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	{ S5P_CMU_RESET_LOWPWR,			{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	{ S5P_DRAM_FREQ_DOWN_LOWPWR,		{ 0x1, 0x1, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	{ S5P_DDRPHY_DLLOFF_LOWPWR,		{ 0x1, 0x1, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	{ S5P_LPDDR_PHY_DLL_LOCK_LOWPWR,	{ 0x1, 0x1, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	{ S5P_CMU_ACLKSTOP_COREBLK_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	{ S5P_CMU_SCLKSTOP_COREBLK_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	{ S5P_CMU_RESET_COREBLK_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	{ S5P_APLL_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	{ S5P_MPLL_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	{ S5P_VPLL_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	{ S5P_EPLL_SYSCLK_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	{ S5P_MPLLUSER_SYSCLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	{ S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	{ S5P_CMU_RESET_GPSALIVE_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	{ S5P_CMU_CLKSTOP_CAM_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	{ S5P_CMU_CLKSTOP_TV_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	{ S5P_CMU_CLKSTOP_MFC_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	{ S5P_CMU_CLKSTOP_G3D_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	{ S5P_CMU_CLKSTOP_LCD0_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	{ S5P_CMU_CLKSTOP_ISP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	{ S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	{ S5P_CMU_CLKSTOP_GPS_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	{ S5P_CMU_RESET_CAM_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	{ S5P_CMU_RESET_TV_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	{ S5P_CMU_RESET_MFC_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{ S5P_CMU_RESET_G3D_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	{ S5P_CMU_RESET_LCD0_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	{ S5P_CMU_RESET_ISP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	{ S5P_CMU_RESET_MAUDIO_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	{ S5P_CMU_RESET_GPS_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	{ S5P_TOP_BUS_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	{ S5P_TOP_RETENTION_LOWPWR,		{ 0x1, 0x0, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	{ S5P_TOP_PWR_LOWPWR,			{ 0x3, 0x0, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	{ S5P_TOP_BUS_COREBLK_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	{ S5P_TOP_RETENTION_COREBLK_LOWPWR,	{ 0x1, 0x0, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	{ S5P_TOP_PWR_COREBLK_LOWPWR,		{ 0x3, 0x0, 0x3 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	{ S5P_LOGIC_RESET_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	{ S5P_OSCCLK_GATE_LOWPWR,		{ 0x1, 0x0, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	{ S5P_LOGIC_RESET_COREBLK_LOWPWR,	{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	{ S5P_OSCCLK_GATE_COREBLK_LOWPWR,	{ 0x1, 0x0, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	{ S5P_ONENAND_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	{ S5P_ONENAND_MEM_OPTION,		{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	{ S5P_HSI_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	{ S5P_HSI_MEM_OPTION,			{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	{ S5P_G2D_ACP_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	{ S5P_G2D_ACP_MEM_OPTION,		{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	{ S5P_USBOTG_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	{ S5P_USBOTG_MEM_OPTION,		{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	{ S5P_HSMMC_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	{ S5P_HSMMC_MEM_OPTION,			{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	{ S5P_CSSYS_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	{ S5P_CSSYS_MEM_OPTION,			{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	{ S5P_SECSS_MEM_LOWPWR,			{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	{ S5P_SECSS_MEM_OPTION,			{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	{ S5P_ROTATOR_MEM_LOWPWR,		{ 0x3, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	{ S5P_ROTATOR_MEM_OPTION,		{ 0x10, 0x10, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	{ S5P_PAD_RETENTION_DRAM_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	{ S5P_PAD_RETENTION_MAUDIO_LOWPWR,	{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	{ S5P_PAD_RETENTION_GPIO_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	{ S5P_PAD_RETENTION_UART_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	{ S5P_PAD_RETENTION_MMCA_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	{ S5P_PAD_RETENTION_MMCB_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	{ S5P_PAD_RETENTION_EBIA_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	{ S5P_PAD_RETENTION_EBIB_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	{ S5P_PAD_RETENTION_GPIO_COREBLK_LOWPWR, { 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	{ S5P_PAD_RETENTION_ISOLATION_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	{ S5P_PAD_ISOLATION_COREBLK_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	{ S5P_PAD_RETENTION_ALV_SEL_LOWPWR,	{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	{ S5P_XUSBXTI_LOWPWR,			{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	{ S5P_XXTI_LOWPWR,			{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	{ S5P_EXT_REGULATOR_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	{ S5P_GPIO_MODE_LOWPWR,			{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	{ S5P_GPIO_MODE_COREBLK_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	{ S5P_GPIO_MODE_MAUDIO_LOWPWR,		{ 0x1, 0x1, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	{ S5P_TOP_ASB_RESET_LOWPWR,		{ 0x1, 0x1, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	{ S5P_TOP_ASB_ISOLATION_LOWPWR,		{ 0x1, 0x0, 0x1 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	{ S5P_CAM_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	{ S5P_TV_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	{ S5P_MFC_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	{ S5P_G3D_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	{ S5P_LCD0_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	{ S5P_ISP_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	{ S5P_MAUDIO_LOWPWR,			{ 0x7, 0x7, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	{ S5P_GPS_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	{ S5P_GPS_ALIVE_LOWPWR,			{ 0x7, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	{ S5P_CMU_SYSCLK_ISP_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	{ S5P_CMU_SYSCLK_GPS_LOWPWR,		{ 0x1, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	{ S5P_ARM_CORE2_LOWPWR,			{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	{ S5P_DIS_IRQ_CORE2,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	{ S5P_DIS_IRQ_CENTRAL2,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	{ S5P_ARM_CORE3_LOWPWR,			{ 0x0, 0x0, 0x2 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	{ S5P_DIS_IRQ_CORE3,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	{ S5P_DIS_IRQ_CENTRAL3,			{ 0x0, 0x0, 0x0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	{ PMU_TABLE_END,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) const struct exynos_pmu_data exynos4210_pmu_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.pmu_config	= exynos4210_pmu_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) const struct exynos_pmu_data exynos4412_pmu_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.pmu_config		= exynos4412_pmu_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };