^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // http://www.samsung.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Exynos3250 - CPU PMU (Power Management Unit) support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/soc/samsung/exynos-regs-pmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/soc/samsung/exynos-pmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "exynos-pmu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct exynos_pmu_conf exynos3250_pmu_config[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* { .offset = offset, .val = { AFTR, W-AFTR, SLEEP } */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) { EXYNOS3_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) { EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) { EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) { EXYNOS3_ARM_CORE1_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) { EXYNOS3_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) { EXYNOS3_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) { EXYNOS3_ISP_ARM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) { EXYNOS3_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) { EXYNOS3_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) { EXYNOS3_ARM_COMMON_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) { EXYNOS3_ARM_L2_SYS_PWR_REG, { 0x0, 0x0, 0x3} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) { EXYNOS3_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) { EXYNOS3_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) { EXYNOS3_CMU_RESET_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) { EXYNOS3_DRAM_FREQ_DOWN_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) { EXYNOS3_DDRPHY_DLLOFF_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { EXYNOS3_LPDDR_PHY_DLL_LOCK_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { EXYNOS3_CMU_ACLKSTOP_COREBLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { EXYNOS3_CMU_SCLKSTOP_COREBLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { EXYNOS3_CMU_RESET_COREBLK_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) { EXYNOS3_APLL_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { EXYNOS3_MPLL_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) { EXYNOS3_BPLL_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) { EXYNOS3_VPLL_SYSCLK_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) { EXYNOS3_EPLL_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) { EXYNOS3_UPLL_SYSCLK_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { EXYNOS3_EPLLUSER_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { EXYNOS3_MPLLUSER_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { EXYNOS3_BPLLUSER_SYSCLK_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { EXYNOS3_CMU_CLKSTOP_CAM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { EXYNOS3_CMU_CLKSTOP_MFC_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { EXYNOS3_CMU_CLKSTOP_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { EXYNOS3_CMU_CLKSTOP_LCD0_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { EXYNOS3_CMU_CLKSTOP_ISP_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { EXYNOS3_CMU_CLKSTOP_MAUDIO_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { EXYNOS3_CMU_RESET_CAM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { EXYNOS3_CMU_RESET_MFC_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { EXYNOS3_CMU_RESET_G3D_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { EXYNOS3_CMU_RESET_LCD0_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { EXYNOS3_CMU_RESET_ISP_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { EXYNOS3_CMU_RESET_MAUDIO_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { EXYNOS3_TOP_BUS_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { EXYNOS3_TOP_RETENTION_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { EXYNOS3_TOP_PWR_SYS_PWR_REG, { 0x3, 0x3, 0x3} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { EXYNOS3_TOP_BUS_COREBLK_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { EXYNOS3_TOP_RETENTION_COREBLK_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { EXYNOS3_TOP_PWR_COREBLK_SYS_PWR_REG, { 0x3, 0x3, 0x3} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { EXYNOS3_LOGIC_RESET_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { EXYNOS3_OSCCLK_GATE_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { EXYNOS3_LOGIC_RESET_COREBLK_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { EXYNOS3_OSCCLK_GATE_COREBLK_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { EXYNOS3_PAD_RETENTION_DRAM_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { EXYNOS3_PAD_RETENTION_MAUDIO_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { EXYNOS3_PAD_RETENTION_GPIO_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { EXYNOS3_PAD_RETENTION_UART_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { EXYNOS3_PAD_RETENTION_MMC0_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { EXYNOS3_PAD_RETENTION_MMC1_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { EXYNOS3_PAD_RETENTION_MMC2_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { EXYNOS3_PAD_RETENTION_SPI_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { EXYNOS3_PAD_RETENTION_EBIA_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { EXYNOS3_PAD_RETENTION_EBIB_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { EXYNOS3_PAD_RETENTION_JTAG_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) { EXYNOS3_PAD_ISOLATION_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { EXYNOS3_PAD_ALV_SEL_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) { EXYNOS3_XUSBXTI_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { EXYNOS3_XXTI_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { EXYNOS3_EXT_REGULATOR_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) { EXYNOS3_EXT_REGULATOR_COREBLK_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { EXYNOS3_GPIO_MODE_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) { EXYNOS3_GPIO_MODE_MAUDIO_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) { EXYNOS3_TOP_ASB_RESET_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) { EXYNOS3_TOP_ASB_ISOLATION_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { EXYNOS3_TOP_ASB_RESET_COREBLK_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) { EXYNOS3_TOP_ASB_ISOLATION_COREBLK_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { EXYNOS3_CAM_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { EXYNOS3_MFC_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { EXYNOS3_G3D_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { EXYNOS3_LCD0_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { EXYNOS3_ISP_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { EXYNOS3_MAUDIO_SYS_PWR_REG, { 0x7, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { EXYNOS3_CMU_SYSCLK_ISP_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) { PMU_TABLE_END,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static unsigned int const exynos3250_list_feed[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) EXYNOS3_ARM_CORE_OPTION(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) EXYNOS3_ARM_CORE_OPTION(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) EXYNOS3_ARM_CORE_OPTION(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) EXYNOS3_ARM_CORE_OPTION(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) EXYNOS3_ARM_COMMON_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) EXYNOS3_TOP_PWR_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) EXYNOS3_CORE_TOP_PWR_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) S5P_CAM_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) S5P_MFC_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) S5P_G3D_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) S5P_LCD0_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) S5P_ISP_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static void exynos3250_powerdown_conf_extra(enum sys_powerdown mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Enable only SC_FEEDBACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) for (i = 0; i < ARRAY_SIZE(exynos3250_list_feed); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) tmp = pmu_raw_readl(exynos3250_list_feed[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) tmp &= ~(EXYNOS3_OPTION_USE_SC_COUNTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) tmp |= EXYNOS3_OPTION_USE_SC_FEEDBACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) pmu_raw_writel(tmp, exynos3250_list_feed[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (mode != SYS_SLEEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pmu_raw_writel(XUSBXTI_DURATION, EXYNOS3_XUSBXTI_DURATION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pmu_raw_writel(XXTI_DURATION, EXYNOS3_XXTI_DURATION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) pmu_raw_writel(EXT_REGULATOR_DURATION, EXYNOS3_EXT_REGULATOR_DURATION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pmu_raw_writel(EXT_REGULATOR_COREBLK_DURATION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) EXYNOS3_EXT_REGULATOR_COREBLK_DURATION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void exynos3250_pmu_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned int value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * To prevent from issuing new bus request form L2 memory system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * If core status is power down, should be set '1' to L2 power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) value = pmu_raw_readl(EXYNOS3_ARM_COMMON_OPTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) value |= EXYNOS3_OPTION_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) pmu_raw_writel(value, EXYNOS3_ARM_COMMON_OPTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* Enable USE_STANDBY_WFI for all CORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) pmu_raw_writel(S5P_USE_STANDBY_WFI_ALL, S5P_CENTRAL_SEQ_OPTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * Set PSHOLD port for output high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) value = pmu_raw_readl(S5P_PS_HOLD_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) value |= S5P_PS_HOLD_OUTPUT_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pmu_raw_writel(value, S5P_PS_HOLD_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * Enable signal for PSHOLD port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) value = pmu_raw_readl(S5P_PS_HOLD_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) value |= S5P_PS_HOLD_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) pmu_raw_writel(value, S5P_PS_HOLD_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) const struct exynos_pmu_data exynos3250_pmu_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .pmu_config = exynos3250_pmu_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .pmu_init = exynos3250_pmu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .powerdown_conf_extra = exynos3250_powerdown_conf_extra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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