^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2019 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * http://www.samsung.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Samsung Exynos SoC Adaptive Supply Voltage support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __LINUX_SOC_EXYNOS_ASV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __LINUX_SOC_EXYNOS_ASV_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* HPM, IDS values to select target group */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct asv_limit_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned int hpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) unsigned int ids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct exynos_asv_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) unsigned int num_rows;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned int num_cols;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct exynos_asv_subsys {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct exynos_asv *asv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) const char *cpu_dt_compat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct exynos_asv_table table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int base_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int offset_volt_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int offset_volt_l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct exynos_asv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct regmap *chipid_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct exynos_asv_subsys subsys[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int (*opp_get_voltage)(const struct exynos_asv_subsys *subs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int level, unsigned int voltage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned int group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) unsigned int table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* True if SG fields from PKG_ID register should be used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) bool use_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* ASV bin read from DT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int of_bin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static inline u32 __asv_get_table_entry(const struct exynos_asv_table *table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned int row, unsigned int col)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return table->buf[row * (table->num_cols) + col];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static inline u32 exynos_asv_opp_get_voltage(const struct exynos_asv_subsys *subsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned int level, unsigned int group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return __asv_get_table_entry(&subsys->table, level, group + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static inline u32 exynos_asv_opp_get_frequency(const struct exynos_asv_subsys *subsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return __asv_get_table_entry(&subsys->table, level, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #endif /* __LINUX_SOC_EXYNOS_ASV_H */