^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2019 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * http://www.samsung.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Samsung Exynos SoC Adaptive Supply Voltage support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pm_opp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/soc/samsung/exynos-chipid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "exynos-asv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "exynos5422-asv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MHZ 1000000U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int exynos_asv_update_cpu_opps(struct exynos_asv *asv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct device *cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct exynos_asv_subsys *subsys = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct dev_pm_opp *opp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int opp_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) for (i = 0; i < ARRAY_SIZE(asv->subsys); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (of_device_is_compatible(cpu->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) asv->subsys[i].cpu_dt_compat)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) subsys = &asv->subsys[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (!subsys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) for (i = 0; i < subsys->table.num_rows; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int new_volt, volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) opp_freq = exynos_asv_opp_get_frequency(subsys, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) opp = dev_pm_opp_find_freq_exact(cpu, opp_freq * MHZ, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (IS_ERR(opp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) dev_info(asv->dev, "cpu%d opp%d, freq: %u missing\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) cpu->id, i, opp_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) volt = dev_pm_opp_get_voltage(opp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) new_volt = asv->opp_get_voltage(subsys, i, volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) dev_pm_opp_put(opp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (new_volt == volt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ret = dev_pm_opp_adjust_voltage(cpu, opp_freq * MHZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) new_volt, new_volt, new_volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) dev_err(asv->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) "Failed to adjust OPP %u Hz/%u uV for cpu%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) opp_freq, new_volt, cpu->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) dev_dbg(asv->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) "Adjusted OPP %u Hz/%u -> %u uV, cpu%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) opp_freq, volt, new_volt, cpu->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int exynos_asv_update_opps(struct exynos_asv *asv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct opp_table *last_opp_table = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct device *cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int ret, cpuid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) for_each_possible_cpu(cpuid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct opp_table *opp_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) cpu = get_cpu_device(cpuid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (!cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) opp_table = dev_pm_opp_get_opp_table(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (IS_ERR(opp_table))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (!last_opp_table || opp_table != last_opp_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) last_opp_table = opp_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ret = exynos_asv_update_cpu_opps(asv, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) dev_err(asv->dev, "Couldn't udate OPPs for cpu%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) cpuid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) dev_pm_opp_put_opp_table(opp_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int exynos_asv_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int (*probe_func)(struct exynos_asv *asv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct exynos_asv *asv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct device *cpu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u32 product_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) asv = devm_kzalloc(&pdev->dev, sizeof(*asv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (!asv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) asv->chipid_regmap = device_node_to_regmap(pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (IS_ERR(asv->chipid_regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) dev_err(&pdev->dev, "Could not find syscon regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return PTR_ERR(asv->chipid_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ret = regmap_read(asv->chipid_regmap, EXYNOS_CHIPID_REG_PRO_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) &product_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_err(&pdev->dev, "Cannot read revision from ChipID: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) switch (product_id & EXYNOS_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) case 0xE5422000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) probe_func = exynos5422_asv_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) cpu_dev = get_cpu_device(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ret = dev_pm_opp_get_opp_count(cpu_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ret = of_property_read_u32(pdev->dev.of_node, "samsung,asv-bin",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) &asv->of_bin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) asv->of_bin = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) asv->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) dev_set_drvdata(&pdev->dev, asv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) for (i = 0; i < ARRAY_SIZE(asv->subsys); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) asv->subsys[i].asv = asv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = probe_func(asv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return exynos_asv_update_opps(asv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const struct of_device_id exynos_asv_of_device_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { .compatible = "samsung,exynos4210-chipid" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static struct platform_driver exynos_asv_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .name = "exynos-asv",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .of_match_table = exynos_asv_of_device_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .probe = exynos_asv_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) module_platform_driver(exynos_asv_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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