^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * R9A06G032 Second CA7 enabler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018 Renesas Electronics Europe Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Derived from actions,s500-smp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * The second CPU is parked in ROM at boot time. It requires waking it after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * writing an address into the BOOTADDR register of sysctrl.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * So the default value of the "cpu-release-addr" corresponds to BOOTADDR...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * *However* the BOOTADDR register is not available when the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * starts in NONSEC mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * So for NONSEC mode, the bootloader re-parks the second CPU into a pen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * in SRAM, and changes the "cpu-release-addr" of linux's DT to a SRAM address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * which is not restricted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void __iomem *cpu_bootaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static DEFINE_SPINLOCK(cpu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) r9a06g032_smp_boot_secondary(unsigned int cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct task_struct *idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) if (!cpu_bootaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) spin_lock(&cpu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) writel(__pa_symbol(secondary_startup), cpu_bootaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) arch_send_wakeup_ipi_mask(cpumask_of(cpu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) spin_unlock(&cpu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static void __init r9a06g032_smp_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct device_node *dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int ret = -EINVAL, dns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u32 bootaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dn = of_get_cpu_node(1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (!dn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) pr_err("CPU#1: missing device tree node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * Determine the address from which the CPU is polling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * The bootloader *does* change this property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Note: The property can be either 64 or 32 bits, so handle both cases
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (of_find_property(dn, "cpu-release-addr", &dns)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (dns == sizeof(u64)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u64 temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret = of_property_read_u64(dn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) "cpu-release-addr", &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) bootaddr = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = of_property_read_u32(dn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) "cpu-release-addr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) &bootaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) of_node_put(dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) pr_err("CPU#1: invalid cpu-release-addr property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pr_info("CPU#1: cpu-release-addr %08x\n", bootaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) cpu_bootaddr = ioremap(bootaddr, sizeof(bootaddr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static const struct smp_operations r9a06g032_smp_ops __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .smp_prepare_cpus = r9a06g032_smp_prepare_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .smp_boot_secondary = r9a06g032_smp_boot_secondary,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) CPU_METHOD_OF_DECLARE(r9a06g032_smp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) "renesas,r9a06g032-smp", &r9a06g032_smp_ops);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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