Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Renesas R-Car H2 System Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2016 Glider bvba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <dt-bindings/power/r8a7790-sysc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "rcar-sysc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static const struct rcar_sysc_area r8a7790_areas[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	{ "always-on",	    0, 0, R8A7790_PD_ALWAYS_ON,	-1, PD_ALWAYS_ON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	{ "ca15-scu",	0x180, 0, R8A7790_PD_CA15_SCU,	R8A7790_PD_ALWAYS_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	  PD_SCU },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	{ "ca15-cpu0",	 0x40, 0, R8A7790_PD_CA15_CPU0,	R8A7790_PD_CA15_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	{ "ca15-cpu1",	 0x40, 1, R8A7790_PD_CA15_CPU1,	R8A7790_PD_CA15_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	{ "ca15-cpu2",	 0x40, 2, R8A7790_PD_CA15_CPU2,	R8A7790_PD_CA15_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	{ "ca15-cpu3",	 0x40, 3, R8A7790_PD_CA15_CPU3,	R8A7790_PD_CA15_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	{ "ca7-scu",	0x100, 0, R8A7790_PD_CA7_SCU,	R8A7790_PD_ALWAYS_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	  PD_SCU },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	{ "ca7-cpu0",	0x1c0, 0, R8A7790_PD_CA7_CPU0,	R8A7790_PD_CA7_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	{ "ca7-cpu1",	0x1c0, 1, R8A7790_PD_CA7_CPU1,	R8A7790_PD_CA7_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	{ "ca7-cpu2",	0x1c0, 2, R8A7790_PD_CA7_CPU2,	R8A7790_PD_CA7_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	{ "ca7-cpu3",	0x1c0, 3, R8A7790_PD_CA7_CPU3,	R8A7790_PD_CA7_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	  PD_CPU_NOCR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	{ "sh-4a",	 0x80, 0, R8A7790_PD_SH_4A,	R8A7790_PD_ALWAYS_ON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	{ "rgx",	 0xc0, 0, R8A7790_PD_RGX,	R8A7790_PD_ALWAYS_ON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	{ "imp",	0x140, 0, R8A7790_PD_IMP,	R8A7790_PD_ALWAYS_ON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) const struct rcar_sysc_info r8a7790_sysc_info __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	.areas = r8a7790_areas,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	.num_areas = ARRAY_SIZE(r8a7790_areas),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };