Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2017-2019, Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/soc/qcom/smem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/sys_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * SoC version type with major number in the upper 16 bits and minor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * number in the lower 16 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define SOCINFO_VERSION(maj, min)  ((((maj) & 0xffff) << 16)|((min) & 0xffff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define SMEM_SOCINFO_BUILD_ID_LENGTH           32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define SMEM_SOCINFO_CHIP_ID_LENGTH            32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * SMEM item id, used to acquire handles to respective
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * SMEM region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define SMEM_HW_SW_BUILD_ID            137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define SMEM_IMAGE_VERSION_BLOCKS_COUNT        32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define SMEM_IMAGE_VERSION_SIZE                4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define SMEM_IMAGE_VERSION_NAME_SIZE           75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define SMEM_IMAGE_VERSION_VARIANT_SIZE        20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define SMEM_IMAGE_VERSION_OEM_SIZE            32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * SMEM Image table indices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define SMEM_IMAGE_TABLE_BOOT_INDEX     0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define SMEM_IMAGE_TABLE_TZ_INDEX       1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define SMEM_IMAGE_TABLE_RPM_INDEX      3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define SMEM_IMAGE_TABLE_APPS_INDEX     10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define SMEM_IMAGE_TABLE_MPSS_INDEX     11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define SMEM_IMAGE_TABLE_ADSP_INDEX     12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define SMEM_IMAGE_TABLE_CNSS_INDEX     13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define SMEM_IMAGE_TABLE_VIDEO_INDEX    14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define SMEM_IMAGE_VERSION_TABLE       469
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * SMEM Image table names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static const char *const socinfo_image_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	[SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	[SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	[SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	[SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	[SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	[SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	[SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	[SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static const char *const pmic_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	[0]  = "Unknown PMIC model",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	[9]  = "PM8994",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	[11] = "PM8916",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	[13] = "PM8058",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	[14] = "PM8028",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	[15] = "PM8901",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	[16] = "PM8027",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	[17] = "ISL9519",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	[18] = "PM8921",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	[19] = "PM8018",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	[20] = "PM8015",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	[21] = "PM8014",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	[22] = "PM8821",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	[23] = "PM8038",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	[24] = "PM8922",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	[25] = "PM8917",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #endif /* CONFIG_DEBUG_FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) /* Socinfo SMEM item structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) struct socinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	__le32 fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	__le32 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	__le32 ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	/* Version 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	__le32 raw_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	__le32 raw_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	/* Version 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	__le32 hw_plat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	/* Version 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	__le32 plat_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* Version 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	__le32 accessory_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	/* Version 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	__le32 hw_plat_subtype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	/* Version 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	__le32 pmic_model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	__le32 pmic_die_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	/* Version 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	__le32 pmic_model_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	__le32 pmic_die_rev_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	__le32 pmic_model_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	__le32 pmic_die_rev_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	/* Version 9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	__le32 foundry_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	/* Version 10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	__le32 serial_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	/* Version 11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	__le32 num_pmics;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	__le32 pmic_array_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	/* Version 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	__le32 chip_family;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	__le32 raw_device_family;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	__le32 raw_device_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	/* Version 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	__le32 nproduct_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	/* Version 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	__le32 num_clusters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	__le32 ncluster_array_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	__le32 num_defective_parts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	__le32 ndefective_parts_array_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* Version 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	__le32 nmodem_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct socinfo_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	u32 raw_device_family;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	u32 hw_plat_subtype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	u32 accessory_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	u32 raw_device_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	u32 chip_family;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u32 foundry_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u32 plat_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u32 raw_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	u32 hw_plat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	u32 fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	u32 nproduct_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	u32 num_clusters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	u32 ncluster_array_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	u32 num_defective_parts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u32 ndefective_parts_array_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	u32 nmodem_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct smem_image_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	char name[SMEM_IMAGE_VERSION_NAME_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	char pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif /* CONFIG_DEBUG_FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct qcom_socinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	struct soc_device *soc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct soc_device_attribute attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	struct dentry *dbg_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	struct socinfo_params info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #endif /* CONFIG_DEBUG_FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct soc_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const struct soc_id soc_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	{ 87, "MSM8960" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	{ 109, "APQ8064" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	{ 122, "MSM8660A" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	{ 123, "MSM8260A" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	{ 124, "APQ8060A" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	{ 126, "MSM8974" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	{ 130, "MPQ8064" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	{ 138, "MSM8960AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	{ 139, "APQ8060AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	{ 140, "MSM8260AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	{ 141, "MSM8660AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	{ 178, "APQ8084" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	{ 184, "APQ8074" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	{ 185, "MSM8274" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	{ 186, "MSM8674" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	{ 194, "MSM8974PRO" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	{ 206, "MSM8916" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	{ 207, "MSM8994" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	{ 208, "APQ8074-AA" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	{ 209, "APQ8074-AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	{ 210, "APQ8074PRO" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	{ 211, "MSM8274-AA" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	{ 212, "MSM8274-AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	{ 213, "MSM8274PRO" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	{ 214, "MSM8674-AA" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	{ 215, "MSM8674-AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	{ 216, "MSM8674PRO" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	{ 217, "MSM8974-AA" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	{ 218, "MSM8974-AB" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	{ 233, "MSM8936" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	{ 239, "MSM8939" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	{ 240, "APQ8036" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	{ 241, "APQ8039" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	{ 246, "MSM8996" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	{ 247, "APQ8016" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	{ 248, "MSM8216" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	{ 249, "MSM8116" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	{ 250, "MSM8616" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	{ 251, "MSM8992" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	{ 253, "APQ8094" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	{ 291, "APQ8096" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	{ 305, "MSM8996SG" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	{ 310, "MSM8996AU" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	{ 311, "APQ8096AU" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	{ 312, "APQ8096SG" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	{ 318, "SDM630" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	{ 321, "SDM845" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	{ 341, "SDA845" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	{ 356, "SM8250" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	{ 402, "IPQ6018" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	{ 425, "SC7180" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static const char *socinfo_machine(struct device *dev, unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		if (soc_id[idx].id == id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			return soc_id[idx].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define QCOM_OPEN(name, _func)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int qcom_open_##name(struct inode *inode, struct file *file)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	return single_open(file, _func, inode->i_private);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static const struct file_operations qcom_ ##name## _ops = {		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	.open = qcom_open_##name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	.read = seq_read,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	.llseek = seq_lseek,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	.release = single_release,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define DEBUGFS_ADD(info, name)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	debugfs_create_file(__stringify(name), 0400,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			    qcom_socinfo->dbg_root,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			    info, &qcom_ ##name## _ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int qcom_show_build_id(struct seq_file *seq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	struct socinfo *socinfo = seq->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	seq_printf(seq, "%s\n", socinfo->build_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int qcom_show_pmic_model(struct seq_file *seq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct socinfo *socinfo = seq->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	if (model < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		seq_printf(seq, "%s\n", pmic_models[model]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		seq_printf(seq, "unknown (%d)\n", model);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct socinfo *socinfo = seq->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	seq_printf(seq, "%u.%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		   SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		   SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int qcom_show_chip_id(struct seq_file *seq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	struct socinfo *socinfo = seq->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	seq_printf(seq, "%s\n", socinfo->chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) QCOM_OPEN(build_id, qcom_show_build_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) QCOM_OPEN(pmic_model, qcom_show_pmic_model);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) QCOM_OPEN(chip_id, qcom_show_chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define DEFINE_IMAGE_OPS(type)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static int show_image_##type(struct seq_file *seq, void *p)		  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {								  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	struct smem_image_version *image_version = seq->private;  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	seq_puts(seq, image_version->type);			  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	seq_putc(seq, '\n');					  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	return 0;						  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }								  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static int open_image_##type(struct inode *inode, struct file *file)	  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {									  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	return single_open(file, show_image_##type, inode->i_private); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }									  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 									  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static const struct file_operations qcom_image_##type##_ops = {	  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	.open = open_image_##type,					  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.read = seq_read,						  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.llseek = seq_lseek,						  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	.release = single_release,					  \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) DEFINE_IMAGE_OPS(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DEFINE_IMAGE_OPS(variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DEFINE_IMAGE_OPS(oem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 				 struct socinfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	struct smem_image_version *versions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	struct dentry *dentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	debugfs_create_x32("info_fmt", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 			   &qcom_socinfo->info.fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	switch (qcom_socinfo->info.fmt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	case SOCINFO_VERSION(0, 15):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		debugfs_create_u32("nmodem_supported", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 				   &qcom_socinfo->info.nmodem_supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	case SOCINFO_VERSION(0, 14):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		debugfs_create_u32("num_clusters", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 				   &qcom_socinfo->info.num_clusters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		debugfs_create_u32("ncluster_array_offset", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 				   &qcom_socinfo->info.ncluster_array_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		debugfs_create_u32("num_defective_parts", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 				   &qcom_socinfo->info.num_defective_parts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		debugfs_create_u32("ndefective_parts_array_offset", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 				   &qcom_socinfo->info.ndefective_parts_array_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	case SOCINFO_VERSION(0, 13):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		debugfs_create_u32("nproduct_id", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 				   &qcom_socinfo->info.nproduct_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 		DEBUGFS_ADD(info, chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	case SOCINFO_VERSION(0, 12):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		qcom_socinfo->info.chip_family =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			__le32_to_cpu(info->chip_family);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		qcom_socinfo->info.raw_device_family =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 			__le32_to_cpu(info->raw_device_family);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		qcom_socinfo->info.raw_device_num =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 			__le32_to_cpu(info->raw_device_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 				   &qcom_socinfo->info.chip_family);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 		debugfs_create_x32("raw_device_family", 0400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 				   qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 				   &qcom_socinfo->info.raw_device_family);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		debugfs_create_x32("raw_device_number", 0400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 				   qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 				   &qcom_socinfo->info.raw_device_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	case SOCINFO_VERSION(0, 11):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	case SOCINFO_VERSION(0, 10):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	case SOCINFO_VERSION(0, 9):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 		debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 				   &qcom_socinfo->info.foundry_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	case SOCINFO_VERSION(0, 8):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	case SOCINFO_VERSION(0, 7):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		DEBUGFS_ADD(info, pmic_model);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		DEBUGFS_ADD(info, pmic_die_rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	case SOCINFO_VERSION(0, 6):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		qcom_socinfo->info.hw_plat_subtype =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 			__le32_to_cpu(info->hw_plat_subtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		debugfs_create_u32("hardware_platform_subtype", 0400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 				   qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 				   &qcom_socinfo->info.hw_plat_subtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	case SOCINFO_VERSION(0, 5):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		qcom_socinfo->info.accessory_chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			__le32_to_cpu(info->accessory_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 		debugfs_create_u32("accessory_chip", 0400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 				   qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 				   &qcom_socinfo->info.accessory_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	case SOCINFO_VERSION(0, 4):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 		qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 		debugfs_create_u32("platform_version", 0400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 				   qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 				   &qcom_socinfo->info.plat_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	case SOCINFO_VERSION(0, 3):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 		qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		debugfs_create_u32("hardware_platform", 0400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 				   qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 				   &qcom_socinfo->info.hw_plat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	case SOCINFO_VERSION(0, 2):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		qcom_socinfo->info.raw_ver  = __le32_to_cpu(info->raw_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 				   &qcom_socinfo->info.raw_ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	case SOCINFO_VERSION(0, 1):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		DEBUGFS_ADD(info, build_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 				 &size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 		if (!socinfo_image_names[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		dentry = debugfs_create_dir(socinfo_image_names[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 					    qcom_socinfo->dbg_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		debugfs_create_file("name", 0400, dentry, &versions[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 				    &qcom_image_name_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 		debugfs_create_file("variant", 0400, dentry, &versions[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 				    &qcom_image_variant_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		debugfs_create_file("oem", 0400, dentry, &versions[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 				    &qcom_image_oem_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	debugfs_remove_recursive(qcom_socinfo->dbg_root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 				 struct socinfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) {  }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #endif /* CONFIG_DEBUG_FS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static int qcom_socinfo_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	struct qcom_socinfo *qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	struct socinfo *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	size_t item_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 			      &item_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	if (IS_ERR(info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		dev_err(&pdev->dev, "Couldn't find socinfo\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 		return PTR_ERR(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	if (!qs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	qs->attr.family = "Snapdragon";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	qs->attr.machine = socinfo_machine(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 					   le32_to_cpu(info->id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 					 le32_to_cpu(info->id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 					   SOCINFO_MAJOR(le32_to_cpu(info->ver)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 					   SOCINFO_MINOR(le32_to_cpu(info->ver)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	if (offsetof(struct socinfo, serial_num) <= item_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 		qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 							"%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 							le32_to_cpu(info->serial_num));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	qs->soc_dev = soc_device_register(&qs->attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	if (IS_ERR(qs->soc_dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 		return PTR_ERR(qs->soc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	socinfo_debugfs_init(qs, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	/* Feed the soc specific unique data into entropy pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	add_device_randomness(info, item_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	platform_set_drvdata(pdev, qs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static int qcom_socinfo_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	struct qcom_socinfo *qs = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	soc_device_unregister(qs->soc_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	socinfo_debugfs_exit(qs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static struct platform_driver qcom_socinfo_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	.probe = qcom_socinfo_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	.remove = qcom_socinfo_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	.driver  = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 		.name = "qcom-socinfo",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) module_platform_driver(qcom_socinfo_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) MODULE_ALIAS("platform:qcom-socinfo");