^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __RPM_INTERNAL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __RPM_INTERNAL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <soc/qcom/tcs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TCS_TYPE_NR 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define MAX_CMDS_PER_TCS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define MAX_TCS_PER_TYPE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MAX_TCS_NR (MAX_TCS_PER_TYPE * TCS_TYPE_NR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define MAX_TCS_SLOTS (MAX_CMDS_PER_TCS * MAX_TCS_PER_TYPE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct rsc_drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * to the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * @drv: The controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * @type: Type of the TCS in this group - active, sleep, wake.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * @mask: Mask of the TCSes relative to all the TCSes in the RSC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @offset: Start of the TCS group relative to the TCSes in the RSC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @num_tcs: Number of TCSes in this type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @ncpt: Number of commands in each TCS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * transfers (could be on a wake/sleep TCS if we are borrowing for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * an ACTIVE_ONLY transfer).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Start: grab drv->lock, set req, set tcs_in_use, drop drv->lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * End: get irq, access req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * grab drv->lock, clear tcs_in_use, drop drv->lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @slots: Indicates which of @cmd_addr are occupied; only used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * SLEEP / WAKE TCSs. Things are tightly packed in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * case that (ncpt < MAX_CMDS_PER_TCS). That is if ncpt = 2 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct tcs_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct rsc_drv *drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int num_tcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int ncpt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) const struct tcs_request *req[MAX_TCS_PER_TYPE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) DECLARE_BITMAP(slots, MAX_TCS_SLOTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * struct rpmh_request: the message to be sent to rpmh-rsc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @msg: the request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @cmd: the payload that will be part of the @msg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @completion: triggered when request is done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @dev: the device making the request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @err: err return from the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @needs_free: check to free dynamically allocated request object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct rpmh_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct tcs_request msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct tcs_cmd cmd[MAX_RPMH_PAYLOAD];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct completion *completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) const struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) bool needs_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * struct rpmh_ctrlr: our representation of the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * @cache: the list of cached requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @cache_lock: synchronize access to the cache data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * @dirty: was the cache updated since flush
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * @batch_cache: Cache sleep and wake requests sent as batch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct rpmh_ctrlr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct list_head cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) spinlock_t cache_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) bool dirty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct list_head batch_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * struct rsc_drv: the Direct Resource Voter (DRV) of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * Resource State Coordinator controller (RSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @name: Controller identifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @tcs_base: Start address of the TCS registers in this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @id: Instance id in the controller (Direct Resource Voter).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @num_tcs: Number of TCSes in this DRV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @rsc_pm: CPU PM notifier for controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Used when solver mode is not present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @cpus_in_pm: Number of CPUs not in idle power collapse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Used when solver mode is not present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @tcs: TCS groups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @tcs_in_use: S/W state of the TCS; only set for ACTIVE_ONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * transfers, but might show a sleep/wake TCS in use if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * it was borrowed for an active_only transfer. You
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * must hold the lock in this struct (AKA drv->lock) in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * order to update this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @lock: Synchronize state of the controller. If RPMH's cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * lock will also be held, the order is: drv->lock then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * cache_lock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @tcs_wait: Wait queue used to wait for @tcs_in_use to free up a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * slot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * @client: Handle to the DRV's client.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct rsc_drv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void __iomem *tcs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int num_tcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct notifier_block rsc_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) atomic_t cpus_in_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct tcs_group tcs[TCS_TYPE_NR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) DECLARE_BITMAP(tcs_in_use, MAX_TCS_NR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) wait_queue_head_t tcs_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct rpmh_ctrlr client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) const struct tcs_request *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) void rpmh_rsc_invalidate(struct rsc_drv *drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) void rpmh_tx_done(const struct tcs_request *msg, int r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int rpmh_flush(struct rpmh_ctrlr *ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #endif /* __RPM_INTERNAL_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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