^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2019, Linaro Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <dt-bindings/power/qcom-aoss-qmp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mailbox_client.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/pm_domain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/thermal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define QMP_DESC_MAGIC 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define QMP_DESC_VERSION 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define QMP_DESC_FEATURES 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* AOP-side offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define QMP_DESC_UCORE_LINK_STATE 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define QMP_DESC_UCORE_LINK_STATE_ACK 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define QMP_DESC_UCORE_CH_STATE 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define QMP_DESC_UCORE_CH_STATE_ACK 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define QMP_DESC_UCORE_MBOX_SIZE 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define QMP_DESC_UCORE_MBOX_OFFSET 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Linux-side offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define QMP_DESC_MCORE_LINK_STATE 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define QMP_DESC_MCORE_LINK_STATE_ACK 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define QMP_DESC_MCORE_CH_STATE 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define QMP_DESC_MCORE_CH_STATE_ACK 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define QMP_DESC_MCORE_MBOX_SIZE 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define QMP_DESC_MCORE_MBOX_OFFSET 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define QMP_STATE_UP GENMASK(15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define QMP_STATE_DOWN GENMASK(31, 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define QMP_MAGIC 0x4d41494c /* mail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define QMP_VERSION 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* 64 bytes is enough to store the requests and provides padding to 4 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define QMP_MSG_LEN 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define QMP_NUM_COOLING_RESOURCES 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static bool qmp_cdev_max_state = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct qmp_cooling_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct thermal_cooling_device *cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct qmp *qmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) bool state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * struct qmp - driver state for QMP implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @msgram: iomem referencing the message RAM used for communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @dev: reference to QMP device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @mbox_client: mailbox client used to ring the doorbell on transmit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @mbox_chan: mailbox channel used to ring the doorbell on transmit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @offset: offset within @msgram where messages should be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @size: maximum size of the messages to be transmitted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @event: wait_queue for synchronization with the IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * @tx_lock: provides synchronization between multiple callers of qmp_send()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @qdss_clk: QDSS clock hw struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * @pd_data: genpd data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct qmp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) void __iomem *msgram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct mbox_client mbox_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct mbox_chan *mbox_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) size_t offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) wait_queue_head_t event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct mutex tx_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct clk_hw qdss_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct genpd_onecell_data pd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct qmp_cooling_device *cooling_devs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct qmp_pd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct qmp *qmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct generic_pm_domain pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static void qmp_kick(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) mbox_send_message(qmp->mbox_chan, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) mbox_client_txdone(qmp->mbox_chan, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static bool qmp_magic_valid(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return readl(qmp->msgram + QMP_DESC_MAGIC) == QMP_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static bool qmp_link_acked(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return readl(qmp->msgram + QMP_DESC_MCORE_LINK_STATE_ACK) == QMP_STATE_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static bool qmp_mcore_channel_acked(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return readl(qmp->msgram + QMP_DESC_MCORE_CH_STATE_ACK) == QMP_STATE_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static bool qmp_ucore_channel_up(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return readl(qmp->msgram + QMP_DESC_UCORE_CH_STATE) == QMP_STATE_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int qmp_open(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!qmp_magic_valid(qmp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_err(qmp->dev, "QMP magic doesn't match\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) val = readl(qmp->msgram + QMP_DESC_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (val != QMP_VERSION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) dev_err(qmp->dev, "unsupported QMP version %d\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) qmp->offset = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) qmp->size = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!qmp->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) dev_err(qmp->dev, "invalid mailbox size\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* Ack remote core's link state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) val = readl(qmp->msgram + QMP_DESC_UCORE_LINK_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) writel(val, qmp->msgram + QMP_DESC_UCORE_LINK_STATE_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* Set local core's link state to up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) qmp_kick(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ret = wait_event_timeout(qmp->event, qmp_link_acked(qmp), HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_err(qmp->dev, "ucore didn't ack link\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) goto timeout_close_link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) qmp_kick(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ret = wait_event_timeout(qmp->event, qmp_ucore_channel_up(qmp), HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) dev_err(qmp->dev, "ucore didn't open channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) goto timeout_close_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Ack remote core's channel state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_UCORE_CH_STATE_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) qmp_kick(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ret = wait_event_timeout(qmp->event, qmp_mcore_channel_acked(qmp), HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) dev_err(qmp->dev, "ucore didn't ack channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) goto timeout_close_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) timeout_close_channel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) timeout_close_link:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) qmp_kick(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static void qmp_close(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) qmp_kick(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static irqreturn_t qmp_intr(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct qmp *qmp = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) wake_up_all(&qmp->event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static bool qmp_message_empty(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return readl(qmp->msgram + qmp->offset) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * qmp_send() - send a message to the AOSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * @qmp: qmp context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @data: message to be sent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @len: length of the message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * Transmit @data to AOSS and wait for the AOSS to acknowledge the message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * @len must be a multiple of 4 and not longer than the mailbox size. Access is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * synchronized by this implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * Return: 0 on success, negative errno on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int qmp_send(struct qmp *qmp, const void *data, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) long time_left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) size_t tlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (WARN_ON(len + sizeof(u32) > qmp->size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (WARN_ON(len % sizeof(u32)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) mutex_lock(&qmp->tx_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* The message RAM only implements 32-bit accesses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) __iowrite32_copy(qmp->msgram + qmp->offset + sizeof(u32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) data, len / sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) writel(len, qmp->msgram + qmp->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Read back len to confirm data written in message RAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) tlen = readl(qmp->msgram + qmp->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) qmp_kick(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) time_left = wait_event_interruptible_timeout(qmp->event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) qmp_message_empty(qmp), HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (!time_left) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) dev_err(qmp->dev, "ucore did not ack channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ret = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* Clear message from buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) writel(0, qmp->msgram + qmp->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) mutex_unlock(&qmp->tx_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int qmp_qdss_clk_prepare(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const char buf[QMP_MSG_LEN] = "{class: clock, res: qdss, val: 1}";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct qmp *qmp = container_of(hw, struct qmp, qdss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return qmp_send(qmp, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static void qmp_qdss_clk_unprepare(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static const char buf[QMP_MSG_LEN] = "{class: clock, res: qdss, val: 0}";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct qmp *qmp = container_of(hw, struct qmp, qdss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) qmp_send(qmp, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static const struct clk_ops qmp_qdss_clk_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .prepare = qmp_qdss_clk_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .unprepare = qmp_qdss_clk_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int qmp_qdss_clk_add(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static const struct clk_init_data qdss_init = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .ops = &qmp_qdss_clk_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .name = "qdss",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) qmp->qdss_clk.init = &qdss_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ret = clk_hw_register(qmp->dev, &qmp->qdss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) dev_err(qmp->dev, "failed to register qdss clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ret = of_clk_add_hw_provider(qmp->dev->of_node, of_clk_hw_simple_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) &qmp->qdss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) dev_err(qmp->dev, "unable to register of clk hw provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) clk_hw_unregister(&qmp->qdss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static void qmp_qdss_clk_remove(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) of_clk_del_provider(qmp->dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) clk_hw_unregister(&qmp->qdss_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static int qmp_pd_power_toggle(struct qmp_pd *res, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) char buf[QMP_MSG_LEN] = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) snprintf(buf, sizeof(buf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) "{class: image, res: load_state, name: %s, val: %s}",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) res->pd.name, enable ? "on" : "off");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return qmp_send(res->qmp, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static int qmp_pd_power_on(struct generic_pm_domain *domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return qmp_pd_power_toggle(to_qmp_pd_resource(domain), true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static int qmp_pd_power_off(struct generic_pm_domain *domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return qmp_pd_power_toggle(to_qmp_pd_resource(domain), false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static const char * const sdm845_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) [AOSS_QMP_LS_CDSP] = "cdsp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) [AOSS_QMP_LS_LPASS] = "adsp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) [AOSS_QMP_LS_MODEM] = "modem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) [AOSS_QMP_LS_SLPI] = "slpi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) [AOSS_QMP_LS_SPSS] = "spss",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) [AOSS_QMP_LS_VENUS] = "venus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int qmp_pd_add(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct genpd_onecell_data *data = &qmp->pd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct device *dev = qmp->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct qmp_pd *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) size_t num = ARRAY_SIZE(sdm845_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) res = devm_kcalloc(dev, num, sizeof(*res), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (!res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) data->domains = devm_kcalloc(dev, num, sizeof(*data->domains),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (!data->domains)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) for (i = 0; i < num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) res[i].qmp = qmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) res[i].pd.name = sdm845_resources[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) res[i].pd.power_on = qmp_pd_power_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) res[i].pd.power_off = qmp_pd_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret = pm_genpd_init(&res[i].pd, NULL, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) dev_err(dev, "failed to init genpd\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) goto unroll_genpds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) data->domains[i] = &res[i].pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) data->num_domains = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ret = of_genpd_add_provider_onecell(dev->of_node, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto unroll_genpds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) unroll_genpds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) for (i--; i >= 0; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) pm_genpd_remove(data->domains[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static void qmp_pd_remove(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct genpd_onecell_data *data = &qmp->pd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct device *dev = qmp->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) of_genpd_del_provider(dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) for (i = 0; i < data->num_domains; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) pm_genpd_remove(data->domains[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static int qmp_cdev_get_max_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) unsigned long *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) *state = qmp_cdev_max_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static int qmp_cdev_get_cur_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) unsigned long *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct qmp_cooling_device *qmp_cdev = cdev->devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) *state = qmp_cdev->state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) unsigned long state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct qmp_cooling_device *qmp_cdev = cdev->devdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) char buf[QMP_MSG_LEN] = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) bool cdev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /* Normalize state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) cdev_state = !!state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (qmp_cdev->state == state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) snprintf(buf, sizeof(buf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) "{class: volt_flr, event:zero_temp, res:%s, value:%s}",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) qmp_cdev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) cdev_state ? "on" : "off");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret = qmp_send(qmp_cdev->qmp, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) qmp_cdev->state = cdev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static struct thermal_cooling_device_ops qmp_cooling_device_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .get_max_state = qmp_cdev_get_max_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .get_cur_state = qmp_cdev_get_cur_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .set_cur_state = qmp_cdev_set_cur_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static int qmp_cooling_device_add(struct qmp *qmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct qmp_cooling_device *qmp_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) char *cdev_name = (char *)node->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) qmp_cdev->qmp = qmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) qmp_cdev->state = !qmp_cdev_max_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) qmp_cdev->name = cdev_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) qmp_cdev->cdev = devm_thermal_of_cooling_device_register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) (qmp->dev, node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) cdev_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) qmp_cdev, &qmp_cooling_device_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (IS_ERR(qmp_cdev->cdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) dev_err(qmp->dev, "unable to register %s cooling device\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) cdev_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return PTR_ERR_OR_ZERO(qmp_cdev->cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static int qmp_cooling_devices_register(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) struct device_node *np, *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) np = qmp->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) qmp->cooling_devs = devm_kcalloc(qmp->dev, QMP_NUM_COOLING_RESOURCES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) sizeof(*qmp->cooling_devs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (!qmp->cooling_devs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) for_each_available_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (!of_find_property(child, "#cooling-cells", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) ret = qmp_cooling_device_add(qmp, &qmp->cooling_devs[count++],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) goto unroll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (!count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) devm_kfree(qmp->dev, qmp->cooling_devs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) unroll:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) while (--count >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) thermal_cooling_device_unregister
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) (qmp->cooling_devs[count].cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) devm_kfree(qmp->dev, qmp->cooling_devs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static void qmp_cooling_devices_remove(struct qmp *qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) for (i = 0; i < QMP_NUM_COOLING_RESOURCES; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) thermal_cooling_device_unregister(qmp->cooling_devs[i].cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static int qmp_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct qmp *qmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) qmp = devm_kzalloc(&pdev->dev, sizeof(*qmp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (!qmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) qmp->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) init_waitqueue_head(&qmp->event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) mutex_init(&qmp->tx_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) qmp->msgram = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (IS_ERR(qmp->msgram))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return PTR_ERR(qmp->msgram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) qmp->mbox_client.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) qmp->mbox_client.knows_txdone = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) qmp->mbox_chan = mbox_request_channel(&qmp->mbox_client, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (IS_ERR(qmp->mbox_chan)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) dev_err(&pdev->dev, "failed to acquire ipc mailbox\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return PTR_ERR(qmp->mbox_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) ret = devm_request_irq(&pdev->dev, irq, qmp_intr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) "aoss-qmp", qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) dev_err(&pdev->dev, "failed to request interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) goto err_free_mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = qmp_open(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) goto err_free_mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) ret = qmp_qdss_clk_add(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) goto err_close_qmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ret = qmp_pd_add(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) goto err_remove_qdss_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ret = qmp_cooling_devices_register(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) dev_err(&pdev->dev, "failed to register aoss cooling devices\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) platform_set_drvdata(pdev, qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) err_remove_qdss_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) qmp_qdss_clk_remove(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) err_close_qmp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) qmp_close(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) err_free_mbox:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) mbox_free_channel(qmp->mbox_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) static int qmp_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) struct qmp *qmp = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) qmp_qdss_clk_remove(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) qmp_pd_remove(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) qmp_cooling_devices_remove(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) qmp_close(qmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) mbox_free_channel(qmp->mbox_chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static const struct of_device_id qmp_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) { .compatible = "qcom,sc7180-aoss-qmp", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) { .compatible = "qcom,sdm845-aoss-qmp", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) { .compatible = "qcom,sm8150-aoss-qmp", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) { .compatible = "qcom,sm8250-aoss-qmp", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) MODULE_DEVICE_TABLE(of, qmp_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static struct platform_driver qmp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .name = "qcom_aoss_qmp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .of_match_table = qmp_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .probe = qmp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .remove = qmp_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) module_platform_driver(qmp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) MODULE_DESCRIPTION("Qualcomm AOSS QMP driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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